Multiple exposure technique using OPC to correct distortion
    43.
    发明授权
    Multiple exposure technique using OPC to correct distortion 有权
    使用OPC多重曝光技术纠正失真

    公开(公告)号:US07829266B2

    公开(公告)日:2010-11-09

    申请号:US11834979

    申请日:2007-08-07

    IPC分类号: G03F7/00 G03F1/00 G03C5/00

    CPC分类号: G03B27/42

    摘要: Accurate ultrafine patterns are formed using a multiple exposure technique comprising implementing an OPC procedure to form an exposure reticle to compensate for distortion of an overlying resist pattern caused by an underlying resist pattern. Embodiments include forming a first resist pattern in a first resist layer over a target layer using a first exposure reticle, forming a second exposure reticle by an OPC technique to compensate for distortion of a second resist pattern caused by the underlying first resist pattern, depositing a second resist layer on the first resist pattern, forming the second resist pattern in the second resist layer using the second exposure reticle, the first and second resist patterns constituting a final resist mask, and forming a pattern in the target layer using the final resist mask.

    摘要翻译: 使用多重曝光技术形成精确的超细纹图形,其包括实施OPC过程以形成曝光掩模版,以补偿由下面的抗蚀剂图案引起的上覆抗蚀剂图案的变形。 实施例包括使用第一曝光掩模在目标层上在第一抗蚀剂层中形成第一抗蚀剂图案,通过OPC技术形成第二曝光掩模版,以补偿由下面的第一抗蚀剂图案引起的第二抗蚀剂图案的变形, 在第一抗蚀剂图案上的第二抗蚀剂层,使用第二曝光掩模在第二抗蚀剂层中形成第二抗蚀剂图案,第一和第二抗蚀剂图案构成最终抗蚀剂掩模,并且使用最终抗蚀剂掩模在目标层中形成图案 。

    Method and apparatus for reducing biological contamination in an immersion lithography system
    44.
    发明授权
    Method and apparatus for reducing biological contamination in an immersion lithography system 有权
    浸没光刻系统中减少生物污染的方法和装置

    公开(公告)号:US07315033B1

    公开(公告)日:2008-01-01

    申请号:US11121437

    申请日:2005-05-04

    IPC分类号: A61N5/00

    摘要: Disclosed are a method of reducing biological contamination in an immersion lithography system and an immersion lithography system configured to reduce biological contamination. A reflecting element and/or an irradiating element is used to direct radiation to kill biological contaminates present with respect to at least one of i) a volume adjacent a final element of the projection system or ii) an immersion medium supply device disposed adjacent the final element.

    摘要翻译: 公开了一种降低浸没式光刻系统中的生物污染物的方法以及被配置为减少生物污染的浸没式光刻系统。 反射元件和/或照射元件用于引导辐射以杀死相对于i)与投影系统的最终元件相邻的体积中的至少一个存在的生物污染物,或ii)与最终的邻近设置的浸没介质供给装置 元件。

    Immersion lithographic process using a conforming immersion medium
    45.
    发明授权
    Immersion lithographic process using a conforming immersion medium 失效
    浸渍光刻工艺使用一致的浸渍介质

    公开(公告)号:US07125652B2

    公开(公告)日:2006-10-24

    申请号:US10726413

    申请日:2003-12-03

    IPC分类号: G03F7/20

    CPC分类号: G03F7/70341

    摘要: A method of making a device using a lithographic system having a lens from which an exposure pattern is emitted. A conforming immersion medium can be positioned between a photo resist layer and the lens. The photo resist layer, which can be disposed over a wafer, and the lens can be brought into intimate contact with the conforming immersion medium. The photo resist can then be exposed with the exposure pattern so that the exposure pattern traverses the conforming immersion medium.

    摘要翻译: 一种制造使用具有透镜的光刻系统的装置的方法,曝光图案从该透镜发射。 适配浸没介质可以位于光致抗蚀剂层和透镜之间。 可以设置在晶片上的光致抗蚀剂层,并且透镜可以与合适的浸渍介质紧密接触。 然后可以用曝光图案曝光光致抗蚀剂,使得曝光图案穿过合适的浸渍介质。

    Silylation process for forming contacts
    46.
    发明授权
    Silylation process for forming contacts 有权
    用于形成接触的甲硅烷基化方法

    公开(公告)号:US06602794B1

    公开(公告)日:2003-08-05

    申请号:US09802437

    申请日:2001-03-09

    申请人: Jongwook Kye

    发明人: Jongwook Kye

    IPC分类号: H01L21302

    摘要: A method of forming narrow trenches in a layer of photoresist is disclosed. The method includes providing a photoresist layer and patterning the photoresist layer to form a plurality of apertures having sidewalls. The method can also include silylating the sidewalls of the apertures in the photoresist layer and reflowing the photoresist layer. The process can be utilized to form contacts having widths which are less than one lithographic feature wide.

    摘要翻译: 公开了一种在光致抗蚀剂层中形成窄沟槽的方法。 该方法包括提供光致抗蚀剂层并图案化光致抗蚀剂层以形成具有侧壁的多个孔。 该方法还可以包括使光致抗蚀剂层中的孔的侧壁甲硅烷基化并回流光致抗蚀剂层。 该方法可用于形成具有小于一个光刻特征宽度的宽度的接触。

    Process for observing overlay errors on lithographic masks
    47.
    发明授权
    Process for observing overlay errors on lithographic masks 有权
    在光刻掩模上观察重叠误差的过程

    公开(公告)号:US06489068B1

    公开(公告)日:2002-12-03

    申请号:US09790135

    申请日:2001-02-21

    申请人: Jongwook Kye

    发明人: Jongwook Kye

    IPC分类号: G03F900

    CPC分类号: G03F7/70633

    摘要: A method of observing overlay errors associated with two masks or reticles includes providing alignment marks to a substrate. The alignment marks can be observed to determine overlay errors. In one embodiment, the lightness or darkness of the alignment marks can indicate an overlay error. The technique can be utilized in any photolithographic system including an EUV, VUV, DUV or conventional patterning device.

    摘要翻译: 观察与两个掩模或掩模版相关联的覆盖误差的方法包括向衬底提供对准标记。 可以观察到对准标记以确定重叠误差。 在一个实施例中,对准标记的亮度或暗度可以指示重叠误差。 该技术可以用于包括EUV,VUV,DUV或常规图案形成装置的任何光刻系统中。

    Measurement method of Zernike coma aberration coefficient
    48.
    发明授权
    Measurement method of Zernike coma aberration coefficient 有权
    泽尼克斯彗形像差系数测量方法

    公开(公告)号:US06459480B1

    公开(公告)日:2002-10-01

    申请号:US09662016

    申请日:2000-09-14

    申请人: Jongwook Kye

    发明人: Jongwook Kye

    IPC分类号: G01B900

    摘要: The present invention provides a method for measuring lens aberration of light on a wafer. The method includes printing a pattern on the wafer by projecting the pattern through a lens in a plurality of pitches and directions; measuring a plurality of critical dimension (CD) differences between two locations on the printed pattern for each of the plurality of pitches and directions; and determining at least one Zernike coma aberration coefficient based on the measured plurality of CD differences. The method in accordance with the present invention measures the CD difference between two locations on the printed pattern on a wafer. This CD difference is then used to calculate the Zernike coma aberration coefficients. No projected reference pattern is required to measure the CD difference, and thus an absolute coma aberration can be calculated. Also, the coma aberration coefficients are based on the light projected onto the wafer, allowing chip manufacturers to more precisely select a stepper with an appropriate lens aberration. This in turn allows better quality control in the clarity of patterns printed on wafers.

    摘要翻译: 本发明提供一种测量晶片上的透镜像差的方法。 该方法包括通过以多个间距和方向通过透镜投射图案来在晶片上印刷图案; 测量所述多个间距和方向中的每一个的印刷图案上的两个位置之间的多个临界尺寸(CD)差异; 以及基于所测量的多个CD差异来确定至少一个泽尼克斯彗形像差系数。 根据本发明的方法测量晶片上印刷图案上的两个位置之间的CD差异。 然后使用该CD差异来计算泽尼克斯彗形像差系数。 不需要投影参考图案来测量CD差异,因此可以计算绝对彗差。 此外,彗形像差系数基于投射到晶片上的光,允许芯片制造商更精确地选择具有适当透镜像差的步进器。 这反过来允许在印刷在晶片上的图案的清晰度中更好地进行质量控制。

    Methods of forming contacts for semiconductor devices using a local interconnect processing scheme
    49.
    发明授权
    Methods of forming contacts for semiconductor devices using a local interconnect processing scheme 有权
    使用局部互连处理方案形成用于半导体器件的触点的方法

    公开(公告)号:US08809184B2

    公开(公告)日:2014-08-19

    申请号:US13465633

    申请日:2012-05-07

    摘要: One method disclosed herein includes forming a plurality of source/drain contacts that are conductively coupled to a source/drain region of a plurality of transistor devices, wherein at least one of the source/drain contacts is a local interconnect structure that spans the isolation region and is conductively coupled to a first source/drain region in a first active region and to a second source/drain region in a second active region, and forming a patterned mask layer that covers the first and second active regions and exposes at least a portion of the local interconnect structure positioned above an isolation region that separates the first and second active regions. The method further includes performing an etching process through the patterned mask layer to remove a portion of the local interconnect structure, thereby defining a recess positioned above a remaining portion of the local interconnect structure, and forming an insulating material in the recess.

    摘要翻译: 本文公开的一种方法包括形成导电耦合到多个晶体管器件的源极/漏极区域的多个源极/漏极接触,其中源极/漏极接触中的至少一个是跨越隔离区域的局部互连结构 并且导电地耦合到第一有源区域中的第一源极/漏极区域和第二有源区域中的第二源极/漏极区域,并且形成覆盖第一和第二有源区域并且暴露至少一部分的图案化掩模层 的局部互连结构位于分离第一和第二有源区域的隔离区域之上。 该方法还包括通过图案化掩模层执行蚀刻工艺以移除局部互连结构的一部分,从而限定位于局部互连结构的剩余部分上方的凹槽,以及在凹部中形成绝缘材料。

    Integrated circuits and methods for fabricating integrated circuits using double patterning processes
    50.
    发明授权
    Integrated circuits and methods for fabricating integrated circuits using double patterning processes 有权
    用于使用双重图案化工艺制造集成电路的集成电路和方法

    公开(公告)号:US08735050B2

    公开(公告)日:2014-05-27

    申请号:US13567233

    申请日:2012-08-06

    IPC分类号: G03F1/00 G06F17/50

    摘要: Integrated circuits and methods for fabricating integrated circuits are provided. One method includes creating a master pattern layout including first and second adjacent cells. The first adjacent cell has a first border pin with a first routing line. The second adjacent cell has a second border pin with a second routing line. The first and second routing lines overlap to define an edge-edge stitch to couple the first and second border pins. The master pattern layout is decomposed into sub-patterns.

    摘要翻译: 提供了用于制造集成电路的集成电路和方法。 一种方法包括创建包括第一和第二相邻单元格的主图案布局。 第一相邻单元具有带有第一路由线的第一边界引脚。 第二相邻单元具有带有第二路由线的第二边界引脚。 第一和第二路由线重叠以限定边缘线迹以耦合第一和第二边界引脚。 主模式布局被分解为子模式。