Aerogel substrate and method for preparing the same
    41.
    发明授权
    Aerogel substrate and method for preparing the same 有权
    气凝胶底物及其制备方法

    公开(公告)号:US06740416B1

    公开(公告)日:2004-05-25

    申请号:US09830572

    申请日:2001-05-08

    IPC分类号: B32B1304

    摘要: An aerogel substrate useful for an electrically conductive substrate, a heat insulating substrate, an optical waveguide substrate, a substrate for a light emitting device or a light emitting device is provided. The aerogel substrate is characterized by comprising a functional layer and an aerogel layer, and an intermediate layer formed between the functional layer and the aerogel layer to allow the functional layer to be formed uniformly thereon. The intermediate layer is formed on at least one surface of the aerogel layer by a gas phase method, by the Langmuir-Blodgett method or by adsorption of an inorganic layered compound; or formed by a hydrophilicizing treatment of at least one surface of the aerogel layer followed by coating and drying an aqueous coating fluid, by an annealing treatment of at least one surface of the aerogel layer, or by a hydrophilicizing treatment of at least one surface of the aerogel layer.

    摘要翻译: 提供了可用于导电基板,隔热基板,光波导基板,发光器件用基板或发光元件的气凝胶基板。气凝胶基板的特征在于,具有功能层和气凝胶层, 以及形成在功能层和气凝胶层之间的中间层,以使功能层均匀地形成。 中间层通过气相法,Langmuir-Blodgett法或通过无机层状化合物的吸附形成在气凝胶层的至少一个表面上; 或通过对气凝胶层的至少一个表面进行亲水化处理,然后通过涂覆和干燥水性涂布液,通过对气凝胶层的至少一个表面的退火处理,或通过亲水化处理至少一个表面 气凝胶层。

    Image input apparatus having interchangeable image pickup device and pan head
    42.
    发明授权
    Image input apparatus having interchangeable image pickup device and pan head 失效
    图像输入装置具有可互换的图像拾取装置和盘头

    公开(公告)号:US06445410B2

    公开(公告)日:2002-09-03

    申请号:US08547201

    申请日:1995-10-24

    申请人: Kenji Kawano

    发明人: Kenji Kawano

    IPC分类号: H04N5232

    CPC分类号: H04N5/23209 H04N7/142

    摘要: An image input apparatus has a pan head for mounting an image pickup device thereon and for changing the image pickup direction of the image pickup device. The image pickup device has an engaging device, and control terminals capable of transmitting specification information about an operation of the pan head from the image pickup device to the pan head. The pan head has a holding device to be engaged with the engaging device so as to interchangeably hold the image pickup device, identifying terminals capable of receiving the specification information when the image pickup device is held by the holding device, and a selection circuit for selecting an operation of the pan head corresponding to the held image pickup device based on the received specification information.

    摘要翻译: 图像输入装置具有用于在其上安装图像拾取装置并用于改变图像拾取装置的图像拾取方向的摇摄头。 图像拾取装置具有接合装置,以及控制端子,其能够将关于盘头的操作的规格信息从图像拾取装置发送到盘头。 摇头具有与接合装置接合的保持装置,以便可互换地保持图像拾取装置,当保持装置保持图像拾取装置时能够接收指定信息的识别终端;以及选择电路 基于所接收的指定信息,对应于所保持的图像拾取装置的平移头的操作。

    Pattern size evaluation apparatus
    43.
    发明授权
    Pattern size evaluation apparatus 失效
    图案尺寸评估装置

    公开(公告)号:US06423977B1

    公开(公告)日:2002-07-23

    申请号:US09030510

    申请日:1998-02-25

    IPC分类号: G01N2186

    CPC分类号: G01N21/956

    摘要: A pattern size evaluation apparatus comprising an illumination optical system for projecting parallel light rays of a predetermined wavelength on a monitoring area formed on an object, the monitoring area being formed at a position different from a device pattern formed on the object, a light intensity detection optical system for detecting diffracted light from the monitoring area, and a device pattern size evaluation section for evaluating a size of the device pattern based on an intensity of diffracted light from the monitoring area.

    摘要翻译: 一种图案尺寸评估装置,包括用于在形成在物体上的监视区域上投射预定波长的平行光线的照明光学系统,所述监视区域形成在与形成在物体上的装置图案不同的位置,光强度检测 用于检测来自监视区域的衍射光的光学系统,以及用于基于来自监视区域的衍射光的强度来评估装置图案的尺寸的装置图案尺寸评估部。

    Semiconductor integrated device and methods of detecting and correcting a voltage drop in an integrated circuit
    44.
    发明授权
    Semiconductor integrated device and methods of detecting and correcting a voltage drop in an integrated circuit 失效
    半导体集成器件及集成电路中的电压降检测和校正方法

    公开(公告)号:US06377083B1

    公开(公告)日:2002-04-23

    申请号:US09686062

    申请日:2000-10-11

    IPC分类号: H03D100

    CPC分类号: G06F1/28 H03K5/159 H03K5/19

    摘要: A semiconductor integrated device has a detection cell arranged in a power-supply line in the semiconductor integrated device and detecting a power-supply voltage. Further, a detection circuit detects a voltage drop of the power-supply voltage detected by the detection cell. Connection wiring connects the detection cell and the detection circuit and outputs the power-supply voltage detected by the detection cell to the detection circuit.

    摘要翻译: 半导体集成器件具有布置在半导体集成器件的电源线中并检测电源电压的检测单元。 此外,检测电路检测由检测单元检测到的电源电压的电压降。 连接线连接检测单元和检测电路,并将检测单元检测出的电源电压输出到检测电路。

    Optical element, optical system using optical element, and optical device with optical element
    45.
    发明授权
    Optical element, optical system using optical element, and optical device with optical element 失效
    光学元件,使用光学元件的光学系统和具有光学元件的光学装置

    公开(公告)号:US06243208B1

    公开(公告)日:2001-06-05

    申请号:US08915044

    申请日:1997-08-20

    IPC分类号: G02B2714

    摘要: In an optical element (B1) prepared by integrally forming, on surfaces of a transparent member, a refracting surface (R2) for receiving a light beam, a plurality of reflecting surfaces (R3, R4, R5) with curvatures, and a refracting surface (R6) for outputting the light beam reflected by the plurality of reflecting surfaces, a reference portion (7) for defining the position of the optical element in a predetermined direction with respect to a Y′-Z′ plane including an incident reference axis (5) and an exit reference axis (5) of at least one reflecting surface of the optical element (B1) is formed on the optical element.

    摘要翻译: 在通过在透明构件的表面上一体地形成用于接收光束的折射表面(R2),具有曲率的多个反射表面(R3,R4,R5)和折射表面(B1)而制备的光学元件 (R6),用于输出由多个反射表面反射的光束;基准部分(7),用于相对于包括入射参考轴线的Y'-Z'平面在预定方向上限定光学元件的位置( 5),并且光学元件(B1)的至少一个反射表面的出射参考轴线(5)形成在光学元件上。

    Physical property based cryptographics
    46.
    发明授权
    Physical property based cryptographics 失效
    基于物理属性的密码学

    公开(公告)号:US06233339B1

    公开(公告)日:2001-05-15

    申请号:US08956418

    申请日:1997-10-23

    IPC分类号: H04L900

    摘要: According to the present invention, piracy of secret data is prevented without an attack detecting circuit or data deleting circuit. In a secret data processing unit, a cell contains fluid in a sealed space. Code generators arranged in the sealed space receive a code generation request to generate codes specified by the pressure value of the fluid. A key generator disposed in the sealed space generates encryption keys/decryption keys specified by the generated codes. An encryptor/decryptor also disposed in the sealed space receives requests for secret data encryption/requests for encrypted secret data decryption, and outputs code generation requests to the code generator to encrypt the secret data/decrypt the encrypted secret data by using the generated encryption key/decryption key. Both codes and encryption keys/decryption keys generated and used, are not statically stored in the cryptographic processing unit.

    摘要翻译: 根据本发明,在没有攻击检测电路或数据删除电路的情况下,防止秘密数据的盗版。 在秘密数据处理单元中,电池在密封空间中容纳流体。 布置在密封空间中的代码生成器接收代码生成请求以生成由流体的压力值指定的代码。 设置在密封空间中的密钥发生器产生由生成的代码指定的加密密钥/解密密钥。 还设置在密封空间中的加密器/解密器接收对加密的秘密数据解密的秘密数据加密/请求的请求,并且向代码生成器输出代码生成请求以加密秘密数据/通过使用生成的加密密钥来解密加密的秘密数据 /解密密钥。 生成和使用的代码和加密密钥/解密密钥都不会静态存储在密码处理单元中。

    Method of testing integrated circuit including a DRAM
    47.
    发明授权
    Method of testing integrated circuit including a DRAM 失效
    包括DRAM的集成电路测试方法

    公开(公告)号:US06228666B1

    公开(公告)日:2001-05-08

    申请号:US09391000

    申请日:1999-09-07

    申请人: Kenji Kawano

    发明人: Kenji Kawano

    IPC分类号: H01L2166

    摘要: A method of testing a semiconductor integrated circuit device including a defective chip recognition circuit unit so that in testing a DRAM unit, if the DRAM unit cannot be made to conform to a specification, even using a redundancy circuit, defective data can be written in the defective chip recognition circuit unit. The method includes deciding whether a DRAM unit conforms and deciding whether a DRAM unit judged imperfect can be conformed using a redundancy circuit; deciding whether the semiconductor integrated circuit device is defective when the DRAM unit has been judged defective and writing the defective decision data into a defective chip recognition circuit unit; reading the defective decision data in the defective chip recognition circuit unit and deciding whether to test the logic unit; testing the logic unit when the test of the logic unit is to be performed; and deciding whether the logic unit conforms.

    摘要翻译: 一种测试包括有缺陷的芯片识别电路单元的半导体集成电路装置的方法,使得在测试DRAM单元时,如果不能使DRAM单元符合规范,即使使用冗余电路,也可以将错误数据写入 有缺陷的芯片识别电路单元。 该方法包括:确定DRAM单元是否符合并决定是否可以使用冗余电路来确定判断不完整的DRAM单元; 当DRAM单元已被判定为有缺陷并将缺陷判定数据写入缺陷芯片识别电路单元时,判断半导体集成电路器件是否有缺陷; 读取有缺陷的芯片识别电路单元中的有缺陷的判定数据,并决定是否测试逻辑单元; 当要执行逻辑单元的测试时测试逻辑单元; 并决定逻辑单元是否符合要求。

    Ultra high-speed semiconductor optical modulator with traveling-wave
electrode
    48.
    发明授权
    Ultra high-speed semiconductor optical modulator with traveling-wave electrode 有权
    具有行波电极的超高速半导体光调制器

    公开(公告)号:US6160654A

    公开(公告)日:2000-12-12

    申请号:US360759

    申请日:1999-07-26

    申请人: Kenji Kawano

    发明人: Kenji Kawano

    IPC分类号: G02F1/015 G02F1/017

    摘要: A wideband semiconductor electro-absorption optical modulator including a semiconductor core shorter in absorption-peak wavelength than a wavelength of optical signal, and an electrode for applying an electric signal to absorb the optical signal by shifting the absorption-peak wavelength to a long wavelength region when a voltage is applied, wherein an electric signal input port and an electric signal output port are disposed so that the electrode is constructed in the form of a traveling-wave electrode, and a total thickness of non-doped layers including the semiconductor core is reduced to decrease a driving voltage. Degradation of optical modulation bandwidth and reflection characteristics of the electric signal caused by mismatching of characteristic impedance to an outer circuit are reduced by decreasing an interaction length of the electric signal and the optical signal. Further, mismatching of characteristic impedance is corrected by adjusting a doping concentration of a p-type or n-type doped layer located above or beneath the semiconductor core.

    摘要翻译: 一种宽带半导体电吸收光调制器,其包括具有比光信号的波长更短的吸收峰值波长的半导体芯片,以及用于通过将吸收峰值波长移位到长波长区域来施加电信号以吸收光信号的电极 当施加电压时,其中设置电信号输入端口和电信号输出端口,使得电极构造为行波电极的形式,并且包括半导体芯的非掺杂层的总厚度为 降低驱动电压。 通过减小电信号和光信号的相互作用长度,降低由特性阻抗与外部电路失配引起的电信号的光调制带宽和反射特性的降低。 此外,通过调整位于半导体芯上方或下方的p型或n型掺杂层的掺杂浓度来校正特性阻抗的失配。