公开(公告)号：US11710524B2

公开(公告)日：2023-07-25

申请号：US17398914

申请日：2021-08-10

Applicant: Micron Technology, Inc.

Inventor： Glen E. Hush ,  Aaron P. Boehm ,  Fa-Long Luo

IPC: G11C7/00 ,  G11C16/10 ,  G11C7/10 ,  G11C16/08 ,  G06F17/16 ,  G11C8/14 ,  G11C5/02 ,  G11C16/04

CPC classification number: G11C16/10 ,  G06F17/16 ,  G11C5/02 ,  G11C7/1039 ,  G11C8/14 ,  G11C16/0483 ,  G11C16/08

Abstract: Systems, apparatuses, and methods related to organizing data to correspond to a matrix at a memory device are described. Data can be organized by circuitry coupled to an array of memory cells prior to the processing resources executing instructions on the data. The organization of data may thus occur on a memory device, rather than at an external processor. A controller coupled to the array of memory cells may direct the circuitry to organize the data in a matrix configuration to prepare the data for processing by the processing resources. The circuitry may be or include a column decode circuitry that organizes the data based on a command from the host associated with the processing resource. For example, data read in a prefetch operation may be selected to correspond to rows or columns of a matrix configuration.

公开(公告)号：US20230161491A1

公开(公告)日：2023-05-25

申请号：US18100825

申请日：2023-01-24

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm

IPC: G06F3/06

CPC classification number: G06F3/0632 ,  G06F3/0679 ,  G06F3/0655 ,  G06F3/0604

Abstract: Methods, systems, and devices for refresh counters in a memory system are described. In some examples, a memory device may include two or more counters configured to increment a respective count based on refresh operations performed on a memory array. A comparison may be made between two or more of the respective counts, which may include determining a difference between the respective counts or a difference in rate of incrementing. A memory device may transmit an indication to a host device based on determining a difference between counters, and the memory device, the host device, or both, may perform various operations or enter various operational modes based on the determined difference.

公开(公告)号：US11625170B2

公开(公告)日：2023-04-11

申请号：US17354658

申请日：2021-06-22

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm

IPC: G06F3/06

Abstract: Methods, systems, and devices for row hammer protection for a memory device are described. A memory device may identify a threshold of related row accesses (e.g., access commands or activates to a same row address or a row address space) for a memory array. In a first operation mode, the memory device may execute commands received from a host device on the memory array. The memory device may determine that a metric of the received row access commands satisfies the threshold of related row accesses. The memory device may switch the memory array from the first operation mode to a second operation mode based on satisfying the threshold. The second operation mode may restrict access to at least one row of the memory, while the first mode may be less restrictive. Additionally or alternatively, the memory device may notify the host device that the metric has satisfied the threshold.

公开(公告)号：US11561891B1

公开(公告)日：2023-01-24

申请号：US17500751

申请日：2021-10-13

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm ,  Todd Jackson Plum ,  Mark D. Ingram ,  Scott E. Schaefer ,  Scott D. Van De Graaff

IPC: G06F12/00 ,  G06F12/02 ,  G06F11/34

Abstract: Methods, systems, and devices for adaptive user defined health indications are described. A host device may be configured to dynamically indicate adaptive health flags for monitoring health and wear information for a memory device. The host device may indicate, to a memory device, a first index. The first index may correspond to a first level of wear of a set of multiple indexed levels of wear for the memory device. The memory device may determine that a metric of the memory device satisfies the first level of wear and indicate, to the host device, that the first level of wear is satisfied. The host device may receive the indication that the first level of wear is satisfied and indicate, to the memory device, a second level of wear of the set of indexed levels of wear that is different than the first level of wear.

公开(公告)号：US20220408459A1

公开(公告)日：2022-12-22

申请号：US17891746

申请日：2022-08-19

Applicant: Micron Technology, Inc.

Inventor： Fa-Long Luo ,  Glen E. Hush ,  Aaron P. Boehm

IPC: H04W72/12 ,  H04B1/38 ,  G06F9/30

Abstract: Systems, apparatuses and method related to remotely executable instructions are described. A device may be wirelessly coupled to (e.g., physically separated) another device, which may be in a physically separate device. The another device may remotely execute instructions associated with performing various operations, which would have been entirely executed at the device absent the another device. The outputs obtained as a result of the execution may be transmitted, via the transceiver, back to the device via a wireless communication link (e.g., using resources of an ultra high frequency (UHF), super high frequency (SHF), extremely high frequency (EHF), and/or tremendously high frequency (THF) bands). The another device at which the instructions are remotely executable may include memory resources, processing resources, and transceiver resources; they may be configured to use one or several communication protocols over licensed or shared frequency spectrum bands, directly (e.g., device-to-device) or indirectly (e.g., via a base station).

公开(公告)号：US11481265B2

公开(公告)日：2022-10-25

申请号：US16433820

申请日：2019-06-06

Applicant: Micron Technology, Inc.

Inventor： Debra M. Bell ,  Kristen M. Hopper ,  Erika Prosser ,  Aaron P. Boehm

IPC: G06F11/00 ,  G06F11/07 ,  G06F3/06 ,  G06F1/30 ,  G06F1/20 ,  G06F11/30

Abstract: Methods, systems, and devices for persistent health monitoring for volatile memory devices are described. A memory device may determine that an operating condition associated with an array of memory cells on the device, such as a temperature, current, voltage, or other metric of health status is outside of a range associated with a risk of device degradation. The memory device may monitor a duration over which the operating condition is outside of the range, and may determine whether the duration satisfies a threshold. In some cases, the memory device may store an indication of when (e.g., each time) the duration satisfied the threshold. The memory device may store the one or more indications in one or more non-volatile storage elements, such as fuses, which may enable the memory device to maintain a persistent indication of a cumulative duration over which the memory device is operated with operating conditions outside of the range.

公开(公告)号：US11442787B2

公开(公告)日：2022-09-13

申请号：US17469962

申请日：2021-09-09

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm ,  Glen E. Hush ,  Fa-Long Luo

IPC: G06F9/50 ,  G06F12/02 ,  G06F12/14

Abstract: Apparatuses, systems, and methods related to memory pooling between selected memory resources are described. A system using a memory pool formed as such may enable performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on increased access to data that may improve performance of a mission profile. For instance, one apparatus described herein includes a memory resource, a processing resource coupled to the memory resource, and a transceiver resource coupled to the processing resource. The memory resource, the processing resource, and the transceiver resource are configured to enable formation of a memory pool between the memory resource and another memory resource at another apparatus responsive to a request to access the other memory resource transmitted from the processing resource via the transceiver.

公开(公告)号：US11307929B2

公开(公告)日：2022-04-19

申请号：US16898354

申请日：2020-06-10

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm

IPC: G06F11/10 ,  G06F11/32 ,  G06F11/30 ,  G06F11/07

Abstract: Methods, systems, and devices for a memory device with status feedback for error correction are described. For example, during a read operation, a memory device may perform an error correction operation on first data read from a memory array of the memory device. The error correction operation may generate second data and an indicator of a state of error corresponding to the second data. In one example, the indicator may indicate one of multiple possible states of error. In another example, the indicator may indicate a corrected error or no detectable error. The memory device may output the first or second data and the indicator of the state of error during a same burst interval. The memory device may output the data on a first channel and the indicator of the state of error on a second channel.

公开(公告)号：US20220095087A1

公开(公告)日：2022-03-24

申请号：US17542691

申请日：2021-12-06

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm

IPC: H04W4/44 ,  H04L29/08

Abstract: Apparatuses, systems, and methods related to accessing a memory resource at one or more physically remote entities are described. A system accessing a memory resource at one or more physically remote entities may enable performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on increased access to data that may improve performance of a mission profile. For instance, one apparatus described herein includes a first vehicle configured to determine that a processing capability or a memory capacity, or both, at the first vehicle is insufficient to perform a processing operation at the first vehicle, identify additional processing resources or additional memory capacity, or both, at a second vehicle that is in wireless communication with the first vehicle based at least in part on determining that the processing capability or the memory capacity, or both, at the first vehicle is insufficient, and perform the processing operation at the first vehicle using the additional processing resources or the additional memory capacity, or both.

公开(公告)号：US20220066867A1

公开(公告)日：2022-03-03

申请号：US17470584

申请日：2021-09-09

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm

IPC: G06F11/10 ,  G11C29/44 ,  G11C7/10 ,  G11C29/42 ,  G06F11/07

Abstract: Methods, systems, and apparatus to selectively implement single-error correcting (SEC) operations or single-error correcting and double-error detecting (SECDED) operations, without noticeably impacting die size, for information received from a host device. For example, a host device may indicate that a memory system is to implement SECDED operations using one or more communications (e.g., messages). In another example, the memory system may be hardwired to perform SECDED for certain options. The memory system may adapt circuitry associated with SEC operations to implement SECDED operations without noticeably impacting die size. To implement SECDED operations using SEC circuitry, the memory system may include some additional circuitry to repurpose the SEC circuitry for SECDED operations.