公开(公告)号：US20060212056A1

公开(公告)日：2006-09-21

申请号：US10536545

申请日：2004-08-20

申请人： Larry Salvadori ,  Lee Gour ,  Martin Kerber

发明人： Larry Salvadori ,  Lee Gour ,  Martin Kerber

IPC分类号： A61B17/32

CPC分类号： A61M1/0047 ,  A61B2017/0042 ,  A61B2018/00916 ,  A61C3/00 ,  A61C17/02 ,  A61C17/08 ,  A61M1/00 ,  A61M1/0039 ,  A61M1/0041 ,  A61M1/0043 ,  A61M1/0064 ,  A61M1/008 ,  A61M1/0084

摘要： A surgical instrument (10) is provided that includes a handle (18) defining a longitudinal axis (20). The handle has an outer surface (22) including a plurality of longitudinal fins (24) that define a plurality of longitudinal grooves (26) therebetween. At least one of the longitudinal fins may project radially from the outer surface of the handle. A pair of the fins may project radially from the outer surface of the handle and are diametrically opposed. A pair of the fins may be opposed and disposed in a plane tangential to the outer surface of the handle. Two separate pairs of the fins can project radially from the outer surface of the handle and are diametrically disposed. The two separate pairs are offset 90° relative to the longitudinal axis. Two separate pairs of the fins can be opposed and disposed in alternate planes tangential to the outer surface of the handle.

摘要翻译： 提供了一种手术器械（10），其包括限定纵向轴线（20）的手柄（18）。 手柄具有包括在其间限定多个纵向凹槽（26）的多个纵向翅片（24）的外表面（22）。 纵向翅片中的至少一个可以从手柄的外表面径向伸出。 一对翅片可以从手柄的外表面径向突出并且直径相对。 一对翅片可以相对并设置在与手柄的外表面相切的平面中。 两个分开的翅片对可以从手柄的外表面径向突出并且直径设置。 两个分离的对相对于纵向轴线偏移90°。 两个分开的翅片对可以相对设置在与手柄的外表面相切的交替平面中。

公开(公告)号：US06404034B1

公开(公告)日：2002-06-11

申请号：US09621182

申请日：2000-07-21

申请人： Dietrich Widmann ,  Martin Kerber

发明人： Dietrich Widmann ,  Martin Kerber

IPC分类号： H01L2900

CPC分类号： H01L21/823814 ,  H01L21/76294 ,  H01L27/092 ,  H01L29/1083 ,  H01L29/7833

摘要： A CMOS circuit has all-around dielectrically insulated source-drain regions. Trenches are formed in the source-drain regions. The trenches are etched onto the mono-crystalline silicon and filled with undoped or very lightly doped silicon. The completely or nearly completely depleted silicon in the trenches represents a dielectrically insulating layer and insulates the source-drain regions towards the adjacent silicon substrate.

摘要翻译： CMOS电路具有全面的介电绝缘源极 - 漏极区域。 在源极 - 漏极区域中形成沟槽。 将沟槽蚀刻到单晶硅上，并填充未掺杂或非常轻掺杂的硅。 沟槽中完全或几乎完全耗尽的硅代表介电绝缘层，并使源极 - 漏极区域朝相邻的硅衬底绝缘。

公开(公告)号：US06239478B1

公开(公告)日：2001-05-29

申请号：US09095263

申请日：1998-06-10

申请人： Martin Kerber ,  Udo Schwalke

发明人： Martin Kerber ,  Udo Schwalke

IPC分类号： H01L2358

CPC分类号： H01L21/823462 ,  H01L21/28123 ,  Y10S438/911

摘要： The MOS transistor has field plates and a subarea of the gate formed from the same polysilicon layer. A gate oxide lying underneath them is produced at the beginning of the fabrication process and it therefore exhibits particularly high quality. The polysilicon in the active area is raised to the same level as the adjoining field oxide areas, resulting in a planar topology.

摘要翻译： MOS晶体管具有场板和由同一多晶硅层形成的栅极的子区域。 位于其下方的栅极氧化物在制造过程开始时产生，因此其显示出特别高的质量。 有源区域中的多晶硅被提高到与邻接的场氧化物区域相同的水平，导致平面拓扑。

公开(公告)号：US6157060A

公开(公告)日：2000-12-05

申请号：US111120

申请日：1998-07-06

申请人： Martin Kerber

发明人： Martin Kerber

IPC分类号： H01L27/115 ,  G11C16/02 ,  H01L21/8247 ,  H01L29/00 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11556 ,  H01L27/115

摘要： The high density integrated semiconductor memory has an EPROM cell in the form of a pillar. The cell has a floating gate and a control gate. The EPROM cell is dimensioned so thin that it is fully depleted. The control gate of the preferred split gate flash EPROM cell or of the dual gate flash EPROM cell is composed of p.sup.+ -doped semiconductor material, so that the fully depleted cylinders exhibit superior lower threshold behavior.

摘要翻译： 高密度集成半导体存储器具有柱状形式的EPROM单元。 电池具有浮动栅极和控制栅极。 EPROM单元的尺寸如此薄，使其完全耗尽。 优选的分裂栅极闪存EPROM单元或双栅极闪存EPROM单元的控制栅极由p +掺杂半导体材料组成，使得完全耗尽的气缸呈现出优异的较低阈值行为。

公开(公告)号：US5925919A

公开(公告)日：1999-07-20

申请号：US869101

申请日：1997-06-04

申请人： Martin Kerber

发明人： Martin Kerber

IPC分类号： H01L21/316 ,  H01L21/768 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/82 ,  G01B7/14 ,  H01L43/00 ,  G01B5/127

CPC分类号： H01L21/76877 ,  H01L21/823871 ,  H01L27/092

摘要： A CMOS semiconductor structure and a process for producing the structure permit particularly simple, self-aligned contact-hole etching. Magnetoresistors are fully encased by a nitride layer and a lateral covering, so that the magnetoresistors are protected even in the event of misaligned contact-hole etching. The magnetoresistors, which are formed from a polysilicon layer, are etched back laterally by isotropic etching and a dielectric layer is conformally deposited so that the etched-back magnetoresistor region is thereby filled. The dielectric layer is then removed again by isotropic etching outside the etched-back magnetoresistor regions.

摘要翻译： CMOS半导体结构和用于制造该结构的方法允许特别简单的自对准接触孔蚀刻。 磁阻电阻被氮化物层和横向覆盖物完全包围，使得即使在不对准的接触孔蚀刻的情况下也保护磁阻。 由多晶硅层形成的磁阻电阻器通过各向同性蚀刻被横向回蚀，并且电介质层被共形沉积，从而填充了蚀刻后的磁电阻区域。 然后通过在蚀刻后的磁阻电阻区域之外的各向同性蚀刻再次去除电介质层。

公开(公告)号：US5882963A

公开(公告)日：1999-03-16

申请号：US910055

申请日：1997-08-12

申请人： Martin Kerber ,  Helmut Klose ,  Andreas Vom Felde

发明人： Martin Kerber ,  Helmut Klose ,  Andreas Vom Felde

IPC分类号： H01L21/302 ,  H01L21/3065 ,  H01L21/768 ,  H01L23/522 ,  H01L21/44

CPC分类号： H01L23/5222 ,  H01L21/7682 ,  H01L2924/0002

摘要： A method of manufacturing a semiconductor component, wherein capacitances occurring between contacts, interconnects or metallizations are reduced by filling cavities with air or gas is provided. The cavities are produced between the semiconductor material and a passivation layer in a region wherein the interconnects are surrounded by dielectric and are subsequently closed by a further passivation layer.

摘要翻译： 提供了制造半导体部件的方法，其中通过用空气或气体填充空腔来减少在触点，互连或金属化之间出现的电容。 在半导体材料和钝化层之间产生空腔，其中互连由电介质围绕并且随后被另外的钝化层封闭。

公开(公告)号：US5817570A

公开(公告)日：1998-10-06

申请号：US870121

申请日：1997-06-03

申请人： Martin Kerber ,  Udo Schwalke

发明人： Martin Kerber ,  Udo Schwalke

IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L21/316 ,  H01L21/8234 ,  H01L27/08 ,  H01L21/3205 ,  H01L21/4763

CPC分类号： H01L21/823462 ,  H01L21/28123 ,  Y10S438/911

摘要： The MOS transistor has field plates and a subarea of the gate formed from the same polysilicon layer. A gate oxide lying underneath them is produced at the beginning of the fabrication process and it therefore exhibits particularly high quality. The polysilicon in the active area is raised to the same level as the adjoining field oxide areas, resulting in a planar topology.

摘要翻译： MOS晶体管具有场板和由同一多晶硅层形成的栅极的子区域。 位于其下方的栅极氧化物在制造过程开始时产生，因此其显示出特别高的质量。 有源区域中的多晶硅被提高到与邻接的场氧化物区域相同的水平，导致平面拓扑结构。

公开(公告)号：US5623155A

公开(公告)日：1997-04-22

申请号：US559485

申请日：1995-11-15

申请人： Martin Kerber ,  Reinhard Mahnkopf

发明人： Martin Kerber ,  Reinhard Mahnkopf

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L27/12 ,  H01L29/423 ,  H01L29/786 ,  H01L27/01

CPC分类号： H01L29/66772 ,  H01L29/41783 ,  H01L29/42384 ,  H01L29/78612

摘要： A MOSFET is provided in the body silicon layer of an SOI substrate, for example as a mesa. A source region, a channel region, and a drain region are present. A gate electrode having a portion as a ridge on this channel region is also provided. For electrical connection of the channel region, a highly doped, preferably laterally arranged channel terminal region that is electrically conductively connected to the channel region and that has a contact applied thereon.

摘要翻译： 在SOI衬底的体硅层中提供MOSFET，例如作为台面。 存在源极区，沟道区和漏极区。 还提供了在该沟道区上具有一部分作为脊的栅电极。 对于沟道区域的电连接，高度掺杂的，优选地横向布置的通道端子区域，其导电地连接到沟道区域并且具有施加在其上的接触。