公开(公告)号：US08786012B2

公开(公告)日：2014-07-22

申请号：US13542737

申请日：2012-07-06

申请人： Anton Mauder ,  Franz Hirler ,  Wolfgang Lehnert ,  Rudolf Berger ,  Klemens Pruegl ,  Hans-Joachim Schulze ,  Helmut Strack

发明人： Anton Mauder ,  Franz Hirler ,  Wolfgang Lehnert ,  Rudolf Berger ,  Klemens Pruegl ,  Hans-Joachim Schulze ,  Helmut Strack

IPC分类号： H01L29/66

CPC分类号： H01L21/28194 ,  H01L21/02109 ,  H01L21/02145 ,  H01L21/0228 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/407 ,  H01L29/408 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/51 ,  H01L29/513 ,  H01L29/66734 ,  H01L29/7393 ,  H01L29/7394 ,  H01L29/7397 ,  H01L29/7803 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7835 ,  H01L29/792 ,  H01L29/8611

摘要： A power semiconductor device has a semiconductor body which includes an active area and a peripheral area which both define a horizontal main surface of the semiconductor body. The semiconductor body further includes an n-type semiconductor layer, a pn junction and at least one trench. The n-type semiconductor layer is embedded in the semiconductor body and extends to the main surface in the peripheral area. The pn junction is arranged between the n-type semiconductor layer and the main surface in the active area. The at least one trench extends in the peripheral area from the main surface into the n-type semiconductor layer and includes a dielectric layer with fixed negative charges. In the vertical direction, the dielectric layer is arranged both below and above the pn junction. The dielectric layer with fixed negative charges typically has a negative net charge. Further, a method for forming a semiconductor device is provided.

摘要翻译： 功率半导体器件具有半导体本体，该半导体本体包括有源区域和限定半导体本体的水平主表面的周边区域。 半导体本体还包括n型半导体层，pn结和至少一个沟槽。 n型半导体层嵌入半导体本体中并延伸到周边区域的主表面。 pn结布置在有源区域中的n型半导体层和主表面之间。 至少一个沟槽在外围区域中从主表面延伸到n型半导体层中，并且包括具有固定的负电荷的电介质层。 在垂直方向上，介电层布置在pn结的下方和上方。 具有固定负电荷的电介质层通常具有负的净电荷。 此外，提供了一种用于形成半导体器件的方法。

公开(公告)号：US08748974B2

公开(公告)日：2014-06-10

申请号：US13542737

申请日：2012-07-06

申请人： Anton Mauder ,  Franz Hirler ,  Wolfgang Lehnert ,  Rudolf Berger ,  Klemens Pruegl ,  Hans-Joachim Schulze ,  Helmut Strack

发明人： Anton Mauder ,  Franz Hirler ,  Wolfgang Lehnert ,  Rudolf Berger ,  Klemens Pruegl ,  Hans-Joachim Schulze ,  Helmut Strack

IPC分类号： H01L29/66

摘要： A power semiconductor device has a semiconductor body which includes an active area and a peripheral area which both define a horizontal main surface of the semiconductor body. The semiconductor body further includes an n-type semiconductor layer, a pn junction and at least one trench. The n-type semiconductor layer is embedded in the semiconductor body and extends to the main surface in the peripheral area. The pn junction is arranged between the n-type semiconductor layer and the main surface in the active area. The at least one trench extends in the peripheral area from the main surface into the n-type semiconductor layer and includes a dielectric layer with fixed negative charges. In the vertical direction, the dielectric layer is arranged both below and above the pn junction. The dielectric layer with fixed negative charges typically has a negative net charge. Further, a method for forming a semiconductor device is provided.

公开(公告)号：US20140001547A1

公开(公告)日：2014-01-02

申请号：US13539959

申请日：2012-07-02

申请人： Hans-Joachim Schulze ,  Anton Mauder ,  Franz Hirler

发明人： Hans-Joachim Schulze ,  Anton Mauder ,  Franz Hirler

IPC分类号： H01L27/088 ,  H01L21/22 ,  H01L29/772

CPC分类号： H01L29/086 ,  H01L21/265 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/0878 ,  H01L29/167 ,  H01L29/36 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/8611

摘要： A semiconductor device includes a doped layer which contains a first dopant of a first conductivity type. In the doped layer, a counter-doped zone is formed in an edge area that surrounds an element area of the semiconductor device. The counter-doped zone contains at least the first dopant and a second dopant of a second conductivity type, which is the opposite of the first conductivity type. A concentration of the second dopant is at least 20% and at most 100% of a concentration of the first dopant. The dopants in the counter-doped zone decrease charge carrier mobility and minority carrier lifetime such that the dynamic robustness of the semiconductor device is increased.

摘要翻译： 半导体器件包括含有第一导电类型的第一掺杂剂的掺杂层。 在掺杂层中，在围绕半导体器件的元件区域的边缘区域中形成反掺杂区域。 反掺杂区至少包含与第一导电类型相反的第二导电类型的第一掺杂剂和第二掺杂剂。 第二掺杂剂的浓度为第一掺杂剂的浓度的至少20％且至多100％。 反掺杂区中的掺杂剂降低了载流子迁移率和少数载流子寿命，从而提高了半导体器件的动态鲁棒性。

公开(公告)号：US08466492B1

公开(公告)日：2013-06-18

申请号：US13362005

申请日：2012-01-31

申请人： Anton Mauder ,  Hans-Joachim Schulze ,  Franz Hirler

发明人： Anton Mauder ,  Hans-Joachim Schulze ,  Franz Hirler

IPC分类号： H01L29/02

CPC分类号： H01L29/7813 ,  H01L29/0638 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/405 ,  H01L29/408 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/8611 ,  H01L29/872

摘要： A semiconductor device includes a semiconductor body including a first surface, an inner region and an edge region, a first doped device region of a first doping type in the inner region and the edge region, a second device region forming a device junction in the inner region with the first device region, and a plurality of at least two dielectric regions extending from the first surface into the semiconductor body. Two dielectric regions that are adjacent in a lateral direction of the semiconductor body are separated by a semiconductor mesa region. The semiconductor device further includes a resistive layer connected to the second device region and connected to at least one semiconductor mesa region.

摘要翻译： 半导体器件包括半导体本体，其包括第一表面，内部区域和边缘区域，在内部区域和边缘区域中的第一掺杂型的第一掺杂器件区域，在内部形成器件结的第二器件区域 具有第一器件区域的区域，以及从第一表面延伸到半导体本体中的多个至少两个电介质区域。 在半导体本体的横向相邻的两个电介质区域被半导体台面区域隔开。 半导体器件还包括连接到第二器件区并连接到至少一个半导体台面区的电阻层。

公开(公告)号：US20130056731A1

公开(公告)日：2013-03-07

申请号：US13227206

申请日：2011-09-07

申请人： Anton Mauder ,  Franz Hirler ,  Hans Peter Felsl ,  Hans-Joachim Schulze

发明人： Anton Mauder ,  Franz Hirler ,  Hans Peter Felsl ,  Hans-Joachim Schulze

IPC分类号： H01L29/861 ,  H01L21/331 ,  H01L29/739

CPC分类号： H01L21/02576 ,  H01L21/302 ,  H01L29/0626 ,  H01L29/0692 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/4236 ,  H01L29/6609 ,  H01L29/66136 ,  H01L29/7803 ,  H01L29/7813 ,  H01L29/861

摘要： A semiconductor device includes a semiconductor diode. The semiconductor diode includes a drift region and a first semiconductor region of a first conductivity type formed in or on the drift region. The first semiconductor region is electrically coupled to a first terminal via a first surface of a semiconductor body. The semiconductor diode includes a channel region of a second conductivity type electrically coupled to the first terminal, wherein a bottom of the channel region adjoins the first semiconductor region. A first side of the channel region adjoins the first semiconductor region.

摘要翻译： 半导体器件包括半导体二极管。 半导体二极管包括形成在漂移区中或漂移区上的漂移区和第一导电类型的第一半导体区。 第一半导体区域经由半导体本体的第一表面电耦合到第一端子。 半导体二极管包括电耦合到第一端子的第二导电类型的沟道区，其中沟道区的底部与第一半导体区相邻。 沟道区的第一侧邻接第一半导体区。

公开(公告)号：US20130037906A1

公开(公告)日：2013-02-14

申请号：US13205759

申请日：2011-08-09

申请人： Franz Hirler ,  Anton Mauder ,  Hans-Joachim Schulze

发明人： Franz Hirler ,  Anton Mauder ,  Hans-Joachim Schulze

IPC分类号： H01L29/06 ,  H01L21/762

CPC分类号： H01L29/0649 ,  H01L21/761 ,  H01L29/045 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/66136 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7803 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/8613 ,  H01L29/868

摘要： A semiconductor device having a semiconductor die is provided. The semiconductor die includes a main horizontal surface, an outer edge, an active area, and a peripheral area. The peripheral area includes a dielectric structure surrounding the active area and extending from the main horizontal surface into the semiconductor die. The dielectric structure includes, in a horizontal cross-section, at least one substantially L-shaped portion that is inclined against the outer edge. Further, a method for forming a semiconductor device is provided.

摘要翻译： 提供具有半导体管芯的半导体器件。 半导体管芯包括主水平表面，外边缘，有效区域和周边区域。 周边区域包括围绕有源区域并从主水平表面延伸到半导体管芯中的电介质结构。 电介质结构在水平截面中包括至少一个相对于外边缘倾斜的大致L形的部分。 此外，提供了一种用于形成半导体器件的方法。

公开(公告)号：US20120286355A1

公开(公告)日：2012-11-15

申请号：US13542737

申请日：2012-07-06

申请人： Anton Mauder ,  Franz Hirler ,  Wolfgang Lehnert ,  Rudolf Berger ,  Klemens Pruegl ,  Hans-Joachim Schulze ,  Helmut Strack

发明人： Anton Mauder ,  Franz Hirler ,  Wolfgang Lehnert ,  Rudolf Berger ,  Klemens Pruegl ,  Hans-Joachim Schulze ,  Helmut Strack

IPC分类号： H01L29/78 ,  H01L21/302 ,  H01L29/02

CPC分类号： H01L21/28194 ,  H01L21/02109 ,  H01L21/02145 ,  H01L21/0228 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/407 ,  H01L29/408 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/51 ,  H01L29/513 ,  H01L29/66734 ,  H01L29/7393 ,  H01L29/7394 ,  H01L29/7397 ,  H01L29/7803 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7835 ,  H01L29/792 ,  H01L29/8611

摘要： A power semiconductor device has a semiconductor body which includes an active area and a peripheral area which both define a horizontal main surface of the semiconductor body. The semiconductor body further includes an n-type semiconductor layer, a pn junction and at least one trench. The n-type semiconductor layer is embedded in the semiconductor body and extends to the main surface in the peripheral area. The pn junction is arranged between the n-type semiconductor layer and the main surface in the active area. The at least one trench extends in the peripheral area from the main surface into the n-type semiconductor layer and includes a dielectric layer with fixed negative charges. In the vertical direction, the dielectric layer is arranged both below and above the pn junction. The dielectric layer with fixed negative charges typically has a negative net charge. Further, a method for forming a semiconductor device is provided.

摘要翻译： 功率半导体器件具有半导体本体，该半导体本体包括有源区域和限定半导体本体的水平主表面的周边区域。 半导体本体还包括n型半导体层，pn结和至少一个沟槽。 n型半导体层嵌入半导体本体中并延伸到周边区域的主表面。 pn结布置在有源区域中的n型半导体层和主表面之间。 至少一个沟槽在外围区域中从主表面延伸到n型半导体层中，并且包括具有固定的负电荷的电介质层。 在垂直方向上，介电层布置在pn结的下方和上方。 具有固定负电荷的电介质层通常具有负的净电荷。 此外，提供了一种用于形成半导体器件的方法。

公开(公告)号：US08198678B2

公开(公告)日：2012-06-12

申请号：US12633956

申请日：2009-12-09

申请人： Anton Mauder ,  Rudolf Berger ,  Franz Hirler ,  Ralf Siemieniec ,  Hans-Joachim Schulze

发明人： Anton Mauder ,  Rudolf Berger ,  Franz Hirler ,  Ralf Siemieniec ,  Hans-Joachim Schulze

IPC分类号： H01L29/78

CPC分类号： H01L29/66719 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/408 ,  H01L29/42368 ,  H01L29/513 ,  H01L29/66734 ,  H01L29/7813

摘要： A semiconductor device includes a source, a drain, and a gate configured to selectively enable a current to pass between the source and the drain. The semiconductor device includes a drift zone between the source and the drain and a first field plate adjacent the drift zone. The semiconductor device includes a dielectric layer electrically isolating the first field plate from the drift zone and charges within the dielectric layer close to an interface of the dielectric layer adjacent the drift zone.

摘要翻译： 半导体器件包括源极，漏极和被配置为选择性地使电流在源极和漏极之间通过的栅极。 半导体器件包括源极和漏极之间的漂移区和邻近漂移区的第一场板。 半导体器件包括将第一场板与漂移区电隔离的电介质层，并且电介质层内的电荷接近靠近漂移区的电介质层的界面。

公开(公告)号：US20110133272A1

公开(公告)日：2011-06-09

申请号：US12633956

申请日：2009-12-09

申请人： Anton Mauder ,  Rudolf Berger ,  Franz Hirler ,  Ralf Siemieniec ,  Hans-Joachim Schulze

发明人： Anton Mauder ,  Rudolf Berger ,  Franz Hirler ,  Ralf Siemieniec ,  Hans-Joachim Schulze

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66719 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/408 ,  H01L29/42368 ,  H01L29/513 ,  H01L29/66734 ,  H01L29/7813

摘要： A semiconductor device includes a source, a drain, and a gate configured to selectively enable a current to pass between the source and the drain. The semiconductor device includes a drift zone between the source and the drain and a first field plate adjacent the drift zone. The semiconductor device includes a dielectric layer electrically isolating the first field plate from the drift zone and charges within the dielectric layer close to an interface of the dielectric layer adjacent the drift zone.

摘要翻译： 半导体器件包括源极，漏极和被配置为选择性地使电流在源极和漏极之间通过的栅极。 半导体器件包括源极和漏极之间的漂移区和邻近漂移区的第一场板。 半导体器件包括将第一场板与漂移区电隔离的电介质层，并且电介质层内的电荷接近靠近漂移区的电介质层的界面。

公开(公告)号：US07696600B2

公开(公告)日：2010-04-13

申请号：US11713226

申请日：2007-03-02

申请人： Anton Mauder ,  Hans-Joachim Schulze ,  Frank Pfirsch ,  Elmar Falck ,  Josef Lutz

发明人： Anton Mauder ,  Hans-Joachim Schulze ,  Frank Pfirsch ,  Elmar Falck ,  Josef Lutz

IPC分类号： H01L29/10 ,  H01L29/72

CPC分类号： H01L29/0834 ,  H01L29/7395 ,  H01L29/861

摘要： A semiconductor device in the form of an IGBT has a front side contact, a rear side contact, and a semiconductor volume disposed between the front side contact and the rear side contact. The semiconductor volume includes a field stop layer for spatially delimiting an electric field that can be formed in the semiconductor volume. The semiconductor volume further includes a plurality of semiconductor zones, the plurality of semiconductor zones spaced apart from each other and each inversely doped with respect to adjacent areas. The plurality of semiconductor zones are located within the field stop layer.

摘要翻译： IGBT形式的半导体器件具有前侧触点，后侧触点和设置在前侧触点和后侧触点之间的半导体体。 半导体体积包括用于空间地限定可以形成在半导体体积中的电场的场停止层。 半导体体积还包括多个半导体区域，多个半导体区域彼此间隔开并且相对于相邻区域反向掺杂。 多个半导体区域位于场停止层内。