公开(公告)号：US11195927B2

公开(公告)日：2021-12-07

申请号：US16998493

申请日：2020-08-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wonkeun Chung ,  HeonBok Lee ,  Chunghwan Shin ,  Youngsuk Chai ,  Sangjin Hyun

IPC: H01L29/08 ,  H01L27/092 ,  H01L29/423 ,  H01L29/78 ,  H01L29/66

Abstract: A semiconductor device includes a substrate having an active pattern therein, a gate electrode extending across the active pattern and a source/drain region on the active pattern laterally adjacent the gate electrode. The device further includes a contact structure including a first contact on the source/drain region, a second contact on the first contact and a spacer on sidewalls of the first and second contacts.

公开(公告)号：US11121131B2

公开(公告)日：2021-09-14

申请号：US16592330

申请日：2019-10-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongsoo Lee ,  Wonkeun Chung ,  Hoonjoo Na ,  Suyoung Bae ,  Jaeyeol Song ,  Jonghan Lee ,  HyungSuk Jung ,  Sangjin Hyun

IPC: H01L27/092 ,  H01L29/786 ,  H01L29/49 ,  H01L29/51 ,  H01L29/423 ,  H01L29/66 ,  H01L29/06 ,  H01L21/8238

Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.

公开(公告)号：US10784262B2

公开(公告)日：2020-09-22

申请号：US16273572

申请日：2019-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Guyoung Cho ,  Subin Shin ,  Donghyun Roh ,  Byung-Suk Jung ,  Sangjin Hyun

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/78

Abstract: Disclosed is a semiconductor device comprising a substrate, a plurality of active patterns that protrude from the substrate, a device isolation layer between the active patterns, and a passivation layer that covers a top surface of the device isolation layer and exposes upper portions of the active patterns. The device isolation layer includes a plurality of first isolation parts adjacent to facing sidewalls of the active patterns, and a second isolation part between the first isolation parts. A top surface of the second isolation part is located at a lower level than that of top surfaces of the first isolation parts.

公开(公告)号：US10461167B2

公开(公告)日：2019-10-29

申请号：US15861949

申请日：2018-01-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongsoo Lee ,  Wonkeun Chung ,  Hoonjoo Na ,  Suyoung Bae ,  Jaeyeol Song ,  Jonghan Lee ,  HyungSuk Jung ,  Sangjin Hyun

IPC: H01L29/49 ,  H01L21/82 ,  H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L29/06 ,  H01L29/36

Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.

公开(公告)号：US09786759B2

公开(公告)日：2017-10-10

申请号：US15017789

申请日：2016-02-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Moonkyu Park ,  Hoonjoo Na ,  Jaeyeol Song ,  Sangjin Hyun

IPC: H01L27/092 ,  H01L29/423 ,  H01L29/49 ,  H01L27/02 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238

CPC classification number: H01L29/4966 ,  H01L21/82345 ,  H01L21/823842 ,  H01L27/092 ,  H01L29/42364 ,  H01L29/42376 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/785

Abstract: A semiconductor device includes a semiconductor substrate having a first area and a second area, and a first gate pattern on the first area and a second gate pattern on the second area. The first gate pattern includes a first gate insulating pattern on the first area, a first gate barrier pattern on the first gate insulating pattern, and a first work function metal pattern on the first gate barrier pattern. The second gate pattern includes a second gate insulating pattern on the second area, a second gate barrier pattern on the second gate insulating pattern, and a second work function metal pattern on the second gate barrier pattern. The first gate barrier pattern includes a metal material different than the second gate barrier pattern.

公开(公告)号：US09627509B2

公开(公告)日：2017-04-18

申请号：US14802519

申请日：2015-07-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungbum Koo ,  Wandon Kim ,  Sangjin Hyun ,  Shinhye Kim ,  TaekSoo Jeon ,  Byung-Suk Jung

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/51 ,  H01L21/768 ,  H01L21/02

CPC classification number: H01L29/66545 ,  H01L21/02362 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L29/51 ,  H01L29/511 ,  H01L29/512 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66636 ,  H01L29/78 ,  H01L2029/7858

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a substrate with an active pattern, a gate electrode provided at the active pattern, and a gate capping structure disposed above the gate electrode. The gate capping structure may include two or more gate capping patterns with different properties from each other, and the use of the gate capping structure makes it possible to form contact plugs in a self-aligned manner and improve operational speed and characteristics of the semiconductor device.

公开(公告)号：US09337295B2

公开(公告)日：2016-05-10

申请号：US14317289

申请日：2014-06-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junehee Lee ,  Sangjin Hyun ,  Jaeyeol Song ,  Hye-Lan Lee

IPC: H01L29/78 ,  H01L29/49 ,  H01L29/66 ,  H01L29/51

CPC classification number: H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: Semiconductor devices and methods of manufacturing the same are disclosed. The semiconductor device a gate dielectric pattern on a substrate and a gate electrode on the gate dielectric pattern opposite the substrate. The gate electrode includes a first conductive pattern disposed on the gate dielectric pattern and including aluminum, and a second conductive pattern disposed between the first conductive pattern and the gate dielectric pattern. The second conductive pattern has an aluminum concentration that is higher than an aluminum concentration of the first conductive pattern. The second conductive pattern may be thicker than the first conductive pattern.

Abstract translation: 公开了半导体器件及其制造方法。 半导体器件在衬底上的栅极电介质图案和与衬底相对的栅极电介质图案上的栅极电极。 栅电极包括设置在栅极电介质图案上并包括铝的第一导电图案，以及设置在第一导电图案和栅极电介质图案之间的第二导电图案。 第二导电图案的铝浓度高于第一导电图案的铝浓度。 第二导电图案可以比第一导电图案更厚。

公开(公告)号：US08772115B2

公开(公告)日：2014-07-08

申请号：US13770709

申请日：2013-02-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： HyeokJun Son ,  Sangjin Hyun ,  Sangbom Kang ,  SungKee Han ,  Sughun Hong ,  Hyung-seok Hong

IPC: H01L21/8238

CPC classification number: H01L21/823857

Abstract: A semiconductor device including a selectively nitrided gate insulating layer may be fabricated by a method that includes forming a first gate insulating layer on a substrate having a first region and a second region, performing a nitridation process on the first gate insulating layer, removing the first gate insulating layer from at least a portion of the first region to expose at least a portion of the substrate, forming a second gate insulating layer on at least the exposed portion of the first region of the substrate, thermally treating the first and second gate insulating layers in an oxygen atmosphere, forming a high-k dielectric on the first and second gate insulating layers, and forming a metal gate electrode on the high-k dielectric.

Abstract translation: 可以通过包括在具有第一区域和第二区域的衬底上形成第一栅极绝缘层的方法来制造包括选择性氮化栅极绝缘层的半导体器件，在第一栅极绝缘层上进行氮化处理，去除第一栅极绝缘层 栅极绝缘层，以从第一区域的至少一部分露出至少一部分基板，在至少基板的第一区域的暴露部分上形成第二栅极绝缘层，热处理第一和第二栅极绝缘层 层，在第一和第二栅极绝缘层上形成高k电介质，并在高k电介质上形成金属栅电极。