PROTECTION CIRCUIT IN ELECTRONIC DEVICE AND METHOD THEREFOR

    公开(公告)号:US20220337200A1

    公开(公告)日:2022-10-20

    申请号:US17263044

    申请日:2020-10-30

    Abstract: An electronic device and method thereof of are provided to prevent burnout due to overcurrent. An electronic device includes a power amplifier configured to amplify a transmission signal; a battery configured to provide a bias voltage to the at least one power amplifier; and an overcurrent protection circuit configured to prevent overcurrent from flowing through the power amplifier. The overcurrent protection circuit includes a configurer configured to configure a reference current value, based on the power amplifier; a measurer configured to measure a bias current value due to the bias voltage; a comparator configured to compare the measured bias current value with the reference current value; and a controller configured to recognize overcurrent flowing through the power amplifier and control provision of the bias voltage, based on a result of the comparison.

    ELECTRONIC DEVICE AND ANTENNA CONTROL METHOD OF ELECTRONIC DEVICE

    公开(公告)号:US20210159926A1

    公开(公告)日:2021-05-27

    申请号:US16765813

    申请日:2018-11-23

    Abstract: An electronic device can comprise: a processor; a transceiver connected to the processor; a first front-end unit connected to the transceiver and performing transmission/reception at an LTE low-band frequency; a second front-end unit connected to the transceiver and performing transmission/reception at an LTE middle-band frequency and/or an LTE high-band frequency; a third front-end unit connected to the transceiver and performing transmission/reception at a 5G-band frequency; a diplexer unit connected to the first front-end unit and the second front-end unit; a filter unit connected to the third front-end unit; a first antenna connected to the diplexer unit; a second antenna connected to the filter unit; and a third antenna connected to the third front-end unit.

    SEMICONDUCTOR PACKAGE HAVING STACKED SEMICONDUCTOR CHIPS

    公开(公告)号:US20210028152A1

    公开(公告)日:2021-01-28

    申请号:US16833761

    申请日:2020-03-30

    Abstract: Provided is a semiconductor package including a semiconductor stack including a first lower chip, a second lower chip, a gap filler disposed between the first lower chip and the second lower chip, and a first upper chip disposed on an upper surface of the first lower chip, an upper surface of the second lower chip, and an upper surface of the gap filler, the first lower chip includes first upper surface pads and a first upper surface dielectric layer, the second lower chip includes second upper surface pads and a second upper surface dielectric layer, the first upper chip includes lower surface pads and a lower surface dielectric layer, and an area of an upper surface of each of the second upper surface pads is greater than an area of a lower surface of each of the lower surface pads.

    LOOP TYPE ANTENNA AND ELECTRONIC DEVICE INCLUDING SAME

    公开(公告)号:US20200381830A1

    公开(公告)日:2020-12-03

    申请号:US16939503

    申请日:2020-07-27

    Abstract: According to various embodiments, an electronic device comprises: a first plate; a second plate facing the opposite direction of the first plate; a housing including a lateral member for encompassing the space between the first plate and the second plate; and an antenna structure, wherein the antenna structure includes: a plurality of insulating layers arranged in a stacked manner so as to be parallel to the first plate; a loop antenna array formed by the insulating layers and/or by the peripheries of the insulating layers; and a wireless communication circuit electrically connected to loop antennas, and configured to transmit and receive a first signal having a first frequency of a range of 3 GHz to 100 GHz.

    ANTENNA MODULE SUPPORTING DUAL BANDS AND ELECTRONIC DEVICE INCLUDING THE SAME

    公开(公告)号:US20200321686A1

    公开(公告)日:2020-10-08

    申请号:US16804805

    申请日:2020-02-28

    Abstract: An electronic device including a housing; a display; a wireless communication circuit comprising a first port, a second port, a third port, and a fourth port, wherein the wireless communication circuit is configured to transmit a first signal having a first frequency via the first port; receive a second signal having the first frequency via the second port; transmit a third signal having a second frequency different from the first frequency via the third port; and receive a fourth signal having the second frequency via the fourth port; and an antenna structure disposed inside the housing, wherein the antenna structure comprises: a conductive pattern; a first node, a second node, and a third node electrically connected to the conductive pattern; a first electrical path; a second electrical path; a third electrical path; a fourth electrical path; a fifth electrical path; a sixth electrical path; and a seventh electrical path.

    ELECTRONIC DEVICE AND METHOD FOR TESTING WIRELESS COMMUNICATION CIRCUIT

    公开(公告)号:US20190363745A1

    公开(公告)日:2019-11-28

    申请号:US16419172

    申请日:2019-05-22

    Abstract: Provided is an electronic device includes an interface for connection to an external device; and a processor electrically connected to the interface, wherein the at least one processor is configured to: set a first radio frequency (RF) signal port of a first chipset to operate in RF signal transmission mode, and set a second RF signal port of a second chipset to operate in RF signal reception mode; obtain an error of transmission performance of the first RF signal port based on a comparison between a designated transmission reference that is input to the first RF signal port and a characteristic of a first intermediate frequency (IF) signal that is output via the second RF signal port; obtain a first compensation value to enable the transmission performance of the first RF signal port to converge to the transmission reference, on the basis of the error of the transmission performance; and store at least one of the error of the transmission performance and the first compensation value in the first chipset via the interface.

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