公开(公告)号：US11687292B2

公开(公告)日：2023-06-27

申请号：US13777810

申请日：2013-02-26

Applicant: Seagate Technology LLC

Inventor： Ryan James Goss ,  David Scott Ebsen ,  Mark Allen Gaertner ,  Michael Joseph Steiner ,  Antoine Khoueir

IPC: G06F3/06

CPC classification number: G06F3/067 ,  G06F3/0611 ,  G06F3/0619 ,  G06F3/0649 ,  G06F3/0685

Abstract: Method and apparatus for managing data in a cloud computing environment. In accordance with some embodiments, data updates are received to a multi-tier memory structure across a cloud network and stored as working data in an upper rewritable non-volatile memory tier of the memory structure. The working data are periodically logged to a lower non-volatile memory tier in the memory structure while a current version of the working data remain in the upper memory tier. The upper and lower memory tiers each are formed of rewritable memory cells having different constructions and storage attributes.

公开(公告)号：US20220059171A1

公开(公告)日：2022-02-24

申请号：US17406346

申请日：2021-08-19

Applicant: Seagate Technology LLC

Inventor： Ryan James Goss

IPC: G11C16/16 ,  G11C16/28 ,  G11C16/30 ,  G11C16/08

Abstract: A solid-state memory may have many non-individually erasable memory cells arranged into dies with each die having a first plane and a second plane. Receipt of a single read command from a host connected to the solid-state memory can prompt generation of a first reference voltage and a second reference voltage by the controller to produce asynchronous data retrieval. The reference voltages can be different and selected by the controller to induce a predetermined delay between retrieval of data from the first plane and retrieval of data from the second plane from the single read command. Passage of each reference voltage concurrently to a common single data address of the first plane and the second plane may produce asynchronous retrieval of data from the respective first plane and second plane.

公开(公告)号：US11016889B1

公开(公告)日：2021-05-25

申请号：US16714121

申请日：2019-12-13

Applicant: Seagate Technology LLC

Inventor： Daniel John Benjamin ,  Ryan Charles Weidemann ,  Ryan James Goss ,  David W. Claude ,  Graham David Ferris

IPC: G06F3/06 ,  G06F12/0804 ,  G06F12/02 ,  G06F12/10

Abstract: Method and apparatus for enhancing power cycle performance of a storage device, such as a solid-state drive (SSD). In some embodiments, map data that describe the contents of a non-volatile memory (NVM) are arranged as snapshots and intervening journal updates. During a scram interval in which the storage device transitions to a powered down condition, the snapshots and journal updates for primary segments with high client interest are updated prior to storage to the NVM. During a reinitialization interval in which the storage device transitions to a powered up condition, the updated primary segments are loaded, after which the storage device provides the client device with an operationally ready notification. Remaining secondary segments are updated and loaded after the notification. The primary segments are identified based on a detected workload from the client device. Configuration changes can further be made based on the detected workload.

公开(公告)号：US11003580B1

公开(公告)日：2021-05-11

申请号：US15929407

申请日：2020-04-30

Applicant: Seagate TEchnology LLC

Inventor： Ryan James Goss ,  Daniel John Benjamin ,  David W. Claude ,  Graham David Ferris ,  Ryan Charles Weidemann

IPC: G06F13/00 ,  G06F12/0804 ,  G06F12/0875

Abstract: Method and apparatus for managing data in a storage device, such as a solid-state drive (SSD). In some embodiments, write and read commands from a client device are placed into a command queue pending servicing to transfer data between the client device and a non-volatile memory (NVM). A write cache temporarily stores sets of writeback data pending transfer. A cache manager detects an overlap condition in which a subsequently received command at least partially overlaps a pending write command. In response, the cache manager enacts a change in caching policy that includes retention of the cached writeback data to aid in the servicing of the subsequently received command. The changes in caching policy can include an increase in the size of the write cache, delays in the writing of hot writeback data sets, the coalescing of different writeback data sets, cache hits using the cached writeback data, etc.

公开(公告)号：US20210073141A1

公开(公告)日：2021-03-11

申请号：US16562518

申请日：2019-09-06

Applicant: Seagate Technology LLC

Inventor： Kristofer Carlson Conklin ,  Ryan James Goss ,  Reid Alan Welch

IPC: G06F12/1018

Abstract: Technologies are described herein for or reducing the size of the forward mapping table in an SSD or other storage device using hashing. A physical address of a storage location within a storage media is determined for the storage of data associated with a logical block address. The data is written to the storage location and a hash value is computed from a representation of the physical address using a hash function, where the size of the hash value is smaller than the representation of the physical address and the hash value points to a plurality of separate storage locations in the storage media. The hash value is stored in the forward mapping table associated with logical block address as opposed to the representation of the physical address.

公开(公告)号：US10592134B1

公开(公告)日：2020-03-17

申请号：US15859689

申请日：2018-01-01

Applicant: Seagate Technology LLC

Inventor： Ryan James Goss ,  Antoine Khoueir ,  Ara Patapoutian

IPC: G06F3/06 ,  G11C16/34

Abstract: Systems and methods are disclosed for open block stability scanning. When a solid state memory block remains in an open state, where the block is only partially filled with written data, for a prolonged period of time, a circuit may perform a scan on the block to determine the stability of the stored data. When the scan indicates that the data is below a stability threshold, the data may be refreshed by reading the data and writing it to a new location. When the scan indicates that the data is above a stability threshold, the circuit may extend the time period in which the block may remain in the open state.

公开(公告)号：US10541034B2

公开(公告)日：2020-01-21

申请号：US15966650

申请日：2018-04-30

Applicant: Seagate Technology LLC

Inventor： Nicholas Odin Lien ,  Ryan James Goss

IPC: G11C16/26 ,  G11C16/04 ,  G11C11/16 ,  G11C29/42

Abstract: Systems and methods presented herein provide for computing read voltages for a storage device. In one embodiment, a controller is controller is operable to soft read data from a portion of the storage device, and to iteratively test the soft read data a predetermined number of times. For example, the controller may test the soft read data a number of times by applying a different probability weight to the soft read data each time the soft read data is tested. The controller may then decode the soft read data based on the probability weight, and determine an error metric of the decoded soft read data. Then, the controller determines a read voltage for the portion of the storage device based on the probability weight and the error metric.

公开(公告)号：US20190073297A1

公开(公告)日：2019-03-07

申请号：US15696462

申请日：2017-09-06

Applicant: Seagate Technology LLC

Inventor： Ryan James Goss ,  Siddhartha K. Panda ,  Daniel J. Benjamin ,  Ryan C. Weidemann

IPC: G06F12/02 ,  G06F3/06

Abstract: A method operable with the storage device includes determining a workload to the storage device based on host Input/Output (I/O) requests to the storage device. When the workload is above a threshold, a first portion of the storage device is selected for garbage collection based on the I/O requests. Otherwise, when the workload is below the threshold, a second different portion of the storage device is selected for garbage collection based on a storage ability of the second portion of the storage device.

公开(公告)号：US20190013086A1

公开(公告)日：2019-01-10

申请号：US15643550

申请日：2017-07-07

Applicant: Seagate Technology LLC

Inventor： Thomas V. Spencer ,  Ryan James Goss ,  Mark A. Gaertner

IPC: G11C29/52 ,  G06F11/20 ,  G06F3/06 ,  G06F13/16 ,  G06F12/02

Abstract: A data storage system can consist of a number of data storage devices each having a non-volatile memory, a memory buffer, and an error detection module. The memory buffer may store a first data block comprising a front-end first-level error detection code assigned by the error detection module. The non-volatile memory can consist of a second data block having a back-end first-level error detection code and a second-level error detection code each assigned by the error detection module.

公开(公告)号：US09966147B1

公开(公告)日：2018-05-08

申请号：US15675992

申请日：2017-08-14

Applicant: Seagate Technology LLC

Inventor： Nicholas Odin Lien ,  Ryan James Goss

IPC: G11C7/00 ,  G11C16/26 ,  G11C16/04 ,  G11C29/42 ,  G11C11/16

CPC classification number: G11C16/26 ,  G06F13/16 ,  G11C11/005 ,  G11C11/1673 ,  G11C16/0408 ,  G11C16/0483 ,  G11C16/349 ,  G11C29/42 ,  G11C29/4401 ,  G11C29/76 ,  G11C2029/4402

Abstract: Systems and methods presented herein provide for computing read voltages for a storage device. In one embodiment, a controller is controller is operable to soft read data from a portion of the storage device, and to iteratively test the soft read data a predetermined number of times. For example, the controller may test the soft read data a number of times by applying a different probability weight to the soft read data each time the soft read data is tested. The controller may then decode the soft read data based on the probability weight, and determine an error metric of the decoded soft read data. Then, the controller determines a read voltage for the portion of the storage device based on the probability weight and the error metric.