Method for manufacturing semiconductor device
    41.
    发明授权
    Method for manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US08871565B2

    公开(公告)日:2014-10-28

    申请号:US13222513

    申请日:2011-08-31

    IPC分类号: H01L21/44 H01L29/786

    摘要: An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.

    摘要翻译: 本发明的目的是制造具有稳定的电特性和高可靠性的氧化物半导体膜的半导体装置。 通过利用包含在氧化物半导体靶中的多种原子的原子量的差异,形成结晶氧化物半导体膜,而不进行多个步骤,优选将低原子量的锌沉积在氧化物绝缘膜上 形成包含锌的晶种; 并且具有高原子量的锡,铟等沉积在晶种上同时引起晶体生长。 此外,通过使用具有包含锌作为核的六方晶系结构的晶种进行晶体生长来形成结晶氧化物半导体膜,从而形成单晶氧化物半导体膜或大致单晶氧化物半导体膜。

    Display device including protective circuit

    公开(公告)号:US08772773B2

    公开(公告)日:2014-07-08

    申请号:US12553122

    申请日:2009-09-03

    摘要: A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.

    Semiconductor device and manufacturing method thereof
    45.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号:US08704216B2

    公开(公告)日:2014-04-22

    申请号:US12706737

    申请日:2010-02-17

    IPC分类号: H01L29/786

    摘要: An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer containing insulating oxide over the oxide semiconductor layer so that the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the oxide semiconductor layer containing insulating oxide interposed therebetween; whereby, variation in threshold voltage of the thin film transistors can be reduced and thus the electric characteristics can be stabilized. Further, an off current can be reduced.

    摘要翻译: 目的是为了减小阈值电压的变化,以稳定每个使用氧化物半导体层的薄膜晶体管的电特性。 目的是减少关断电流。 使用氧化物半导体层的薄膜晶体管通过在氧化物半导体层上层叠含有绝缘氧化物的氧化物半导体层而形成,使得氧化物半导体层和源极和漏极电极层彼此接触,氧化物半导体层包含绝缘体 介于其间的氧化物; 从而可以减小薄膜晶体管的阈值电压的变化,从而能够稳定电特性。 此外,可以减少截止电流。

    Semiconductor device
    46.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US08502216B2

    公开(公告)日:2013-08-06

    申请号:US12612700

    申请日:2009-11-05

    IPC分类号: H01L29/26

    摘要: An object is to prevent an impurity such as moisture and oxygen from being mixed into an oxide semiconductor and suppress variation in semiconductor characteristics of a semiconductor device in which an oxide semiconductor is used. Another object is to provide a semiconductor device with high reliability. A gate insulating film provided over a substrate having an insulating surface, a source and a drain electrode which are provided over the gate insulating film, a first oxide semiconductor layer provided over the source electrode and the drain electrode, and a source and a drain region which are provided between the source electrode and the drain electrode and the first oxide semiconductor layer are provided. A barrier film is provided in contact with the first oxide semiconductor layer.

    摘要翻译: 本发明的目的是防止诸如水分和氧气的杂质混入氧化物半导体中并抑制其中使用氧化物半导体的半导体器件的半导体特性的变化。 另一个目的是提供一种具有高可靠性的半导体器件。 提供在具有绝缘表面的衬底上的栅极绝缘膜,设置在栅极绝缘膜上的源极和漏极,设置在源电极和漏极上的第一氧化物半导体层,以及源极和漏极区 设置在源电极和漏电极之间以及第一氧化物半导体层。 提供与第一氧化物半导体层接触的阻挡膜。

    Semiconductor device and manufacturing method thereof
    48.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号:US08481363B2

    公开(公告)日:2013-07-09

    申请号:US13227585

    申请日:2011-09-08

    IPC分类号: H01L21/34

    CPC分类号: H01L29/7869 H01L27/1225

    摘要: The semiconductor device includes a thin film transistor which includes a gate electrode layer, a gate insulating layer over the gate electrode layer, a source electrode layer and a drain electrode layer over the gate insulating layer, a buffer layer over the source electrode layer and the drain electrode layer, and a semiconductor layer over the buffer layer. A part of the semiconductor layer overlapping with the gate electrode layer is over and in contact with the gate insulating layer and is provided between the source electrode layer and the drain electrode layer. The semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc. The buffer layer contains a metal oxide having n-type conductivity. The semiconductor layer and the source and drain electrode layers are electrically connected to each other through the buffer layer.

    摘要翻译: 该半导体器件包括薄膜晶体管,该薄膜晶体管包括栅极电极层,栅极电极层上的栅极绝缘层,栅极绝缘层上的源极电极层和漏极电极层,源电极层上的缓冲层和 漏极电极层和缓冲层上的半导体层。 与栅电极层重叠的半导体层的一部分与栅极绝缘层相接触并且设置在源极电极层和漏极电极层之间。 半导体层是含有铟,镓和锌的氧化物半导体层。 缓冲层含有具有n型导电性的金属氧化物。 半导体层和源极和漏极电极层通过缓冲层彼此电连接。