PIXEL ISOLATION STRUCTURE
    41.
    发明申请

    公开(公告)号:US20220037387A1

    公开(公告)日:2022-02-03

    申请号:US16942109

    申请日:2020-07-29

    Abstract: In some embodiments, the present disclosure relates to an image sensor structure. The image sensor structure includes a substrate. The substrate includes a first side and a second side opposite the first side. A photodetector extends into the first side of the substrate. An isolation structure comprises a first isolation segment and a second isolation segment that extend through the substrate. The first isolation segment and the second isolation segment are respectively on opposite sides of the photodetector and comprise a dielectric. A first metal line is on the first side of the substrate. A dummy contact structure comprises a first dummy segment and a second dummy segment. Both the first dummy segment and the second dummy segment comprise metal and extend from the first metal line to the first isolation segment and the second isolation segment, respectively.

    Light pipe structure with high quantum efficiency

    公开(公告)号:US11121162B2

    公开(公告)日:2021-09-14

    申请号:US16405027

    申请日:2019-05-07

    Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a light pipe structure. A photodetector disposed within a semiconductor substrate. A gate electrode is over the semiconductor substrate and borders the photodetector. An inter-level dielectric (ILD) layer overlies the semiconductor substrate. A conductive contact is disposed within the ILD layer such that a bottom surface of the conductive contact is below a top surface of the gate electrode. The light pipe structure overlies the photodetector such that a bottom surface of the light pipe structure is recessed below a top surface of the conductive contact.

    BOND PAD STRUCTURE WITH REDUCED STEP HEIGHT AND INCREASED ELECTRICAL ISOLATION

    公开(公告)号:US20210066225A1

    公开(公告)日:2021-03-04

    申请号:US16558556

    申请日:2019-09-03

    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor structure including a bond pad disposed within a semiconductor substrate. The semiconductor substrate has a back-side surface and a front-side surface opposite the back-side surface. An upper surface of the semiconductor substrate is vertically below the back-side surface. The bond pad extends through the semiconductor substrate. The bond pad includes a conductive body over the upper surface of the semiconductor substrate and conductive protrusions extending from above the upper surface to below the front-side surface of the semiconductor substrate. A vertical distance between a top surface of the bond pad and the back-side surface of the semiconductor substrate is less than a height of the conductive protrusions. A first bond pad isolation structure extends through the semiconductor substrate and laterally surrounds the conductive protrusions.

    Concave reflector for complementary metal oxide semiconductor image sensor (CIS)

    公开(公告)号:US10833115B2

    公开(公告)日:2020-11-10

    申请号:US16851265

    申请日:2020-04-17

    Abstract: In some embodiments, the present disclosure relates to an integrated chip having an inter-layer dielectric (ILD) structure along a first surface of a substrate having a photodetector. An etch stop layer is over the ILD structure, and a reflector is surrounded by the etch stop layer and the ILD structure. The reflector has a curved surface facing the substrate at a location directly over the photodetector. The curved surface is coupled between a first sidewall and a second sidewall of the reflector. The reflector has larger thicknesses along the first sidewall and the second sidewall than at a center of the reflector between the first sidewall and the second sidewall.

    CONCAVE REFLECTOR FOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR IMAGE SENSOR (CIS)

    公开(公告)号:US20200266228A1

    公开(公告)日:2020-08-20

    申请号:US16851265

    申请日:2020-04-17

    Abstract: In some embodiments, the present disclosure relates to an integrated chip having an inter-layer dielectric (ILD) structure along a first surface of a substrate having a photodetector. An etch stop layer is over the ILD structure, and a reflector is surrounded by the etch stop layer and the ILD structure. The reflector has a curved surface facing the substrate at a location directly over the photodetector. The curved surface is coupled between a first sidewall and a second sidewall of the reflector. The reflector has larger thicknesses along the first sidewall and the second sidewall than at a center of the reflector between the first sidewall and the second sidewall.

    Concave reflector for complementary metal oxide semiconductor image sensor (CIS)

    公开(公告)号:US10680024B2

    公开(公告)日:2020-06-09

    申请号:US15935341

    申请日:2018-03-26

    Abstract: In some embodiments, the present disclosure relates to an integrated chip having an inter-layer dielectric (ILD) structure along a first surface of a substrate having a photodetector. An etch stop layer is over the ILD structure, and a reflector is surrounded by the etch stop layer and the ILD structure. The reflector has a curved surface facing the substrate at a location directly over the photodetector. The curved surface is coupled between a first sidewall and a second sidewall of the reflector. The reflector has larger thicknesses along the first sidewall and the second sidewall than at a center of the reflector between the first sidewall and the second sidewall.

    Method for forming a semiconductor-on-insulator (SOI) substrate

    公开(公告)号:US10553474B1

    公开(公告)日:2020-02-04

    申请号:US16139357

    申请日:2018-09-24

    Abstract: Various embodiments of the present application are directed towards a method for forming a semiconductor-on-insulator (SOI) substrate with a thick device layer and a thick insulator layer. In some embodiments, the method includes forming an insulator layer covering a handle substrate, and epitaxially forming a device layer on a sacrificial substrate. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates, and the sacrificial substrate is removed. The removal includes performing an etch into the sacrificial substrate until the device layer is reached. Because the device layer is formed by epitaxy and transferred to the handle substrate, the device layer may be formed with a large thickness. Further, because the epitaxy is not affected by the thickness of the insulator layer, the insulator layer may be formed with a large thickness.

    ABSORPTION ENHANCEMENT STRUCTURE FOR IMAGE SENSOR

    公开(公告)号:US20190288027A1

    公开(公告)日:2019-09-19

    申请号:US16420576

    申请日:2019-05-23

    Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a substrate and an image sensing element disposed within the substrate. The substrate has sidewalls defining a plurality of protrusions over the image sensing element. A first one of the plurality of protrusions including a first sidewall having a first segment. A line that extends along the first segment intersects a second sidewall of the first one of the plurality of protrusions that opposes the first sidewall.

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