公开(公告)号：US20220238636A1

公开(公告)日：2022-07-28

申请号：US17308381

申请日：2021-05-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ching-Sheng Chu ,  Dun-Nian Yaung ,  Yu-Cheng Tsai ,  Meng-Hsien Lin ,  Ching-Chung Su ,  Jen-Cheng Liu ,  Wen-De Wang ,  Guan-Hua Chen

IPC: H01L49/02

Abstract: The present disclosure, in some embodiments, relates to a method of forming a capacitor structure. The method includes forming a capacitor dielectric layer over a lower electrode layer, and forming an upper electrode layer over the capacitor dielectric layer. The upper electrode layer is etched to define an upper electrode and to expose a part of the capacitor dielectric layer. A spacer structure is formed over horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and also along sidewalls of the upper electrode. The spacer structure is etched to remove the spacer structure from over the horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and to define a spacer. The capacitor dielectric layer and the lower electrode layer are etched according to the spacer to define a capacitor dielectric and a lower electrode.

公开(公告)号：US20190288027A1

公开(公告)日：2019-09-19

申请号：US16420576

申请日：2019-05-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ching-Chung Su ,  Hung-Wen Hsu ,  Jiech-Fun Lu ,  Shih-Pei Chou

IPC: H01L27/146

Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a substrate and an image sensing element disposed within the substrate. The substrate has sidewalls defining a plurality of protrusions over the image sensing element. A first one of the plurality of protrusions including a first sidewall having a first segment. A line that extends along the first segment intersects a second sidewall of the first one of the plurality of protrusions that opposes the first sidewall.

公开(公告)号：US10164156B2

公开(公告)日：2018-12-25

申请号：US15476370

申请日：2017-03-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ching-Chung Su ,  Hung-Wen Hsu ,  Wei-Chuang Wu ,  Wei-Lin Chen ,  Jiech-Fun Lu

IPC: H01L31/0232 ,  H01L21/00 ,  H01L33/46 ,  H01L27/146 ,  H01L31/056 ,  H01L27/148

Abstract: Structures and formation methods of an image sensor structure are provided. The image sensor structure is provided. The image sensor structure includes a substrate, a photodiode component in the substrate, and a grid structure over the substrate. The grid structure includes a bottom dielectric element over the substrate, a reflective element over the bottom dielectric element, and an upper dielectric element over the reflective element. The reflective element has a sidewall which is anti-corrosive in a basic condition and an acidic condition. The image sensor structure also includes a color filter element over the substrate and surrounded by the grid structure. The color filter element is aligned with the photodiode component.

公开(公告)号：US10163974B2

公开(公告)日：2018-12-25

申请号：US15597452

申请日：2017-05-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ching-Chung Su ,  Hung-Wen Hsu ,  Jiech-Fun Lu ,  Shih-Pei Chou

IPC: H01L27/146

Abstract: In some embodiments, the present disclosure relates to a method of forming an absorption enhancement structure for an integrated chip image sensor that reduces crystalline defects resulting from the formation of the absorption enhancement structure. The method may be performed by forming a patterned masking layer over a first side of a substrate. A dry etching process is performed on the first side of the substrate according to the patterned masking layer to define a plurality of intermediate protrusions arranged along the first side of the substrate within a periodic pattern. A wet etching process is performed on the plurality of intermediate protrusions to form a plurality of protrusions. One or more absorption enhancement layers are formed over and between the plurality of protrusions. The wet etching process removes a damaged region of the intermediate protrusions that can negatively impact performance of the absorption enhancement structure.

公开(公告)号：US11769791B2

公开(公告)日：2023-09-26

申请号：US17308381

申请日：2021-05-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ching-Sheng Chu ,  Dun-Nian Yaung ,  Yu-Cheng Tsai ,  Meng-Hsien Lin ,  Ching-Chung Su ,  Jen-Cheng Liu ,  Wen-De Wang ,  Guan-Hua Chen

IPC: H01L29/66 ,  H01L29/94 ,  H01L49/02

CPC classification number: H01L28/75 ,  H01L28/87 ,  H01L28/88 ,  H01L28/92 ,  H01L29/66181 ,  H01L29/945 ,  H01L28/40

Abstract: The present disclosure, in some embodiments, relates to a method of forming a capacitor structure. The method includes forming a capacitor dielectric layer over a lower electrode layer, and forming an upper electrode layer over the capacitor dielectric layer. The upper electrode layer is etched to define an upper electrode and to expose a part of the capacitor dielectric layer. A spacer structure is formed over horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and also along sidewalls of the upper electrode. The spacer structure is etched to remove the spacer structure from over the horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and to define a spacer. The capacitor dielectric layer and the lower electrode layer are etched according to the spacer to define a capacitor dielectric and a lower electrode.

公开(公告)号：US20200091223A1

公开(公告)日：2020-03-19

申请号：US16693627

申请日：2019-11-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ching-Chung Su ,  Hung-Wen Hsu ,  Jiech-Fun Lu ,  Shih-Pei Chou

IPC: H01L27/146

Abstract: The present disclosure, in some embodiments, relates to method of forming an integrated chip. The method may be performed by forming an image sensing element within a substrate. A dry etching process is performed on the substrate to form a plurality of intermediate protrusions defined by the substrate. A wet etching process is performed on the plurality of intermediate protrusions to form a plurality of protrusions from the plurality of intermediate protrusions.

公开(公告)号：US20240363791A1

公开(公告)日：2024-10-31

申请号：US18766336

申请日：2024-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih Wei Sung ,  Chung-Bin Tseng ,  Keng-Ying Liao ,  Yen-Jou Wu ,  Po-Zen Chen ,  Su-Yu Yeh ,  Ching-Chung Su

IPC: H01L31/18 ,  H01L23/544 ,  H01L27/146

CPC classification number: H01L31/1876 ,  H01L23/544 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14683 ,  H01L27/14687 ,  H01L31/186 ,  H01L31/1888 ,  H01L2223/54426

Abstract: A method includes forming image sensors in a semiconductor substrate. A first alignment mark is formed close to a front side of the semiconductor substrate. The method further includes performing a backside polishing process to thin the semiconductor substrate, forming a second alignment mark on the backside of the semiconductor substrate, and forming a feature on the backside of the semiconductor substrate. The feature is formed using the second alignment mark for alignment.

公开(公告)号：US20220359781A1

公开(公告)日：2022-11-10

申请号：US17814726

申请日：2022-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih Wei Sung ,  Chung-Bin Tseng ,  Keng-Ying Liao ,  Yen-Jou Wu ,  Po-Zen Chen ,  Su-Yu Yeh ,  Ching-Chung Su

IPC: H01L31/18 ,  H01L27/146 ,  H01L23/544

Abstract: A method includes forming image sensors in a semiconductor substrate. A first alignment mark is formed close to a front side of the semiconductor substrate. The method further includes performing a backside polishing process to thin the semiconductor substrate, forming a second alignment mark on the backside of the semiconductor substrate, and forming a feature on the backside of the semiconductor substrate. The feature is formed using the second alignment mark for alignment.

公开(公告)号：US11164903B2

公开(公告)日：2021-11-02

申请号：US16422271

申请日：2019-05-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Huai-jen Tung ,  Ching-Chung Su ,  Keng-Ying Liao ,  Po-Zen Chen ,  Su-Yu Yeh ,  S. Y. Chen

IPC: H01L27/146 ,  H01L23/00

Abstract: The present disclosure describes the formation of a pad structure in an image sensor device using a sacrificial isolation region and a silicon oxide based stack with no intervening nitride etch-stop layers. The image sensor device includes a semiconductor layer comprising a first horizontal surface opposite to a second horizontal surface; a metallization layer formed on the second horizontal surface of the semiconductor layer, where the metallization layer includes a dielectric layer. The image sensor device also includes a pad region traversing through the semiconductor layer from the first horizontal surface to the second horizontal surface. The pad region includes an oxide layer with no intervening nitride layers formed on the dielectric layer of the metallization layer and a pad structure in physical contact with a conductive structure of the metallization layer.

公开(公告)号：US10304898B2

公开(公告)日：2019-05-28

申请号：US16190608

申请日：2018-11-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ching-Chung Su ,  Hung-Wen Hsu ,  Jiech-Fun Lu ,  Shih-Pei Chou

IPC: H01L27/146

Abstract: In some embodiments, the present disclosure relates to an image sensor device. The image sensor device includes an image sensing element disposed within a substrate. A plurality of protrusions are arranged along a first side of the substrate over the image sensing element. The plurality of protrusions respectively include a sidewall having a first segment oriented at a first angle and a second segment over the first segment. The second segment is oriented at a second angle that is larger than the first angle. One or more absorption enhancement layers are arranged over and between the plurality of protrusions. The first angle and the second angle are acute angles measured through the substrate with respect to a horizontal plane that is parallel to a second side of the substrate opposite the first side.