公开(公告)号：US06351007B1

公开(公告)日：2002-02-26

申请号：US09501575

申请日：2000-02-10

申请人： Yasumori Fukushima ,  Tsutomu Ashida

发明人： Yasumori Fukushima ,  Tsutomu Ashida

IPC分类号： H01L2976

CPC分类号： B82Y10/00 ,  H01L21/28141 ,  H01L21/28273 ,  H01L29/7881 ,  H01L29/7888

摘要： There is provided a quantum thin line producing method capable of forming a quantum thin line that has good surface flatness of silicon even after formation of quantum thin line and a complete electron confining region with good controllability as well as a semiconductor device employing the quantum thin line. A region of a nitride film 3 which covers a semiconductor substrate 1 on which a stepped portion 2 is formed is etched back with masking, consequently exposing an upper portion of a semiconductor substrate 1. Next, an oxide film 5 is formed by oxidizing the exposed portion of the upper portion of the semiconductor substrate 1, and a linear protruding portion 6 is formed on the semiconductor substrate along a side surface of the nitride film 3. Next, the oxide film 5 on the protruding portion 6 is partially etched to expose a tip of the protruding portion 6. Next, a thin line portion 7 is made to epitaxially grow on the exposed portion at the tip of the protruding portion 6. Then, after removing the nitride film 3 and the oxide film 5, there is formed a quantum thin line 7a that is insulated and isolated from the semiconductor substrate 1 by an oxide film 5A formed through oxidation of the semiconductor substrate 1.

摘要翻译： 提供了一种能够形成量子薄线的量子细线生成方法，即使在形成量子薄线和具有良好可控性的完整的电子约束区域之后，也可以形成具有良好的硅的表面平坦度的量子薄线以及使用量子薄线的半导体器件 。 覆盖形成台阶部分2的半导体衬底1的氮化物膜3的区域被掩模蚀刻回来，从而暴露出半导体衬底1的上部。接下来，通过氧化暴露的 半导体衬底1的上部的一部分和沿着氮化膜3的侧表面的直线突出部分6形成在半导体衬底上。接下来，部分地蚀刻突出部分6上的氧化物膜5以暴露出 接下来，使细线部分7在突出部分6的尖端处的暴露部分上外延生长。然后，在去除氮化物膜3和氧化物膜5之后，形成一个 量子细线7a，其通过半导体衬底1的氧化形成的氧化膜5A与半导体衬底1绝缘和隔离。

公开(公告)号：US06294399B1

公开(公告)日：2001-09-25

申请号：US09492329

申请日：2000-01-27

申请人： Masayuki Fukumi ,  Yasumori Fukushima

发明人： Masayuki Fukumi ,  Yasumori Fukushima

IPC分类号： H01L2100

CPC分类号： B82Y30/00 ,  B82Y10/00 ,  H01L29/06

摘要： A Si protruding portion is formed on a Si substrate by opportunely using the general film forming technique, photolithographic technique and etching technique. A second oxide film is formed to fill up a space between Si protruding portions, and the surface is flattened by the CMP method or the like. Then, the second oxide film is subjected to anisotropic etching to form a Si exposed portion at the top of the Si protruding portion. A Si thin line is made to grow in this Si exposed portion, and then a third oxide film for isolating the Si thin line from the Si substrate is formed through oxidation. A quantum thin line is thus formed at low cost without using any special technique of SOI or the like. Furthermore, the substrate surface is flattened, allowing the formation of a single electron device or a quantum effect device to be easy. The quantum thin line is isolated from the Si substrate by the third oxide film, completely confining the electron. With this arrangement, a quantum thin line that has good substrate surface flatness and is able to form a complete electron confining region is formed by using a semiconductor substrate of a Si substrate or the like.

摘要翻译： 通过适当使用一般的成膜技术，光刻技术和蚀刻技术，在Si衬底上形成Si突出部分。 形成第二氧化物膜以填充Si突出部分之间的空间，并且通过CMP方法等使表面变平。 然后，对第二氧化物膜进行各向异性蚀刻，以在Si突出部分的顶部形成Si暴露部分。 在该Si暴露部分中使Si细线生长，然后通过氧化形成用于将Si细线与Si衬底隔离的第三氧化物膜。 因此，在不使用SOI等的任何特殊技术的情况下，以低成本形成量子细线。 此外，基板表面变平，容易形成单电子器件或量子效应器件。 量子细线通过第三氧化膜与Si衬底隔离，完全限制电子。 通过这种布置，通过使用Si衬底等的半导体衬底形成具有良好的衬底表面平坦度并且能够形成完整的电子约束区域的量子细线。

公开(公告)号：US08354329B2

公开(公告)日：2013-01-15

申请号：US12745497

申请日：2008-11-14

申请人： Michiko Takei ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Masao Moriguchi ,  Yutaka Takafuji

发明人： Michiko Takei ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Masao Moriguchi ,  Yutaka Takafuji

IPC分类号： H01L29/786 ,  H01L21/762

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/1214

摘要： A method for manufacturing a semiconductor device includes: a first step of forming a base layer, which includes an element portion having a gate electrode and a flat interlayer insulating film formed so as to cover the gate electrode; a second step of ion implanting a delamination material into the base layer to form a delamination layer; a third step of bonding the base layer to a substrate; and a fourth step of separating and removing a part of the base layer along the delamination layer. An implantation depth of the delamination material in the gate electrode is substantially the same as that of the delamination material in the interlayer insulating film.

摘要翻译： 一种制造半导体器件的方法包括：形成基底层的第一步骤，其包括具有栅电极的元件部分和形成为覆盖栅电极的平坦层间绝缘膜; 将分层材料离子注入基层以形成分层的第二步骤; 将基底层粘合到基底上的第三步骤; 以及沿剥离层分离除去基底层的一部分的第四工序。 栅电极中的分层材料的注入深度与层间绝缘膜中的分层材料的植入深度基本相同。

公开(公告)号：US08288184B2

公开(公告)日：2012-10-16

申请号：US12741852

申请日：2008-10-14

申请人： Michiko Takei ,  Yutaka Takafuji ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Steven Roy Droes

发明人： Michiko Takei ,  Yutaka Takafuji ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Steven Roy Droes

IPC分类号： H01L21/00

CPC分类号： H01L27/1266 ,  H01L21/31053 ,  H01L21/76819 ,  H01L27/1214 ,  H01L29/66772

摘要： A production method for producing a semiconductor device capable of improving surface flatness and suppressing a variation in electrical characteristics of the semiconductor chip, and improving production yield. The production method includes the steps of: forming a first insulating film on a semiconductor substrate and on a conductive pattern film formed on the semiconductor substrate and reducing a thickness of the first insulating film in a region where the conductive pattern film is arranged by patterning; forming a second insulating film and polishing the second insulating film, thereby forming a flattening film; implanting a substance for cleavage into the semiconductor substrate through the flattening film, thereby forming a cleavage layer; transferring the semiconductor chip onto a substrate with an insulating surface so that the chip surface on the side opposite to the semiconductor substrate is attached thereto; and separating the semiconductor substrate from the cleavage layer.

摘要翻译： 一种能够提高表面平坦性并抑制半导体芯片的电气特性的变化的半导体装置的制造方法，提高制造成品率。 该制造方法包括以下步骤：在半导体衬底上形成第一绝缘膜和形成在半导体衬底上的导电图案膜上，通过图案化在导电图案膜布置的区域中减小第一绝缘膜的厚度; 形成第二绝缘膜并抛光第二绝缘膜，从而形成平坦化膜; 通过平坦化的膜将用于裂解的物质注入到半导体衬底中，从而形成裂解层; 将半导体芯片转印到具有绝缘表面的基板上，使得与半导体基板相对的一侧的芯片表面附着在其上; 并将半导体衬底与解理层分离。

公开(公告)号：US20110269284A1

公开(公告)日：2011-11-03

申请号：US13150620

申请日：2011-06-01

申请人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

发明人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

IPC分类号： H01L21/336

CPC分类号： H01L27/1266 ,  H01L21/76202 ,  H01L21/76254 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/78603 ,  H01L29/78609

摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.

摘要翻译： 本发明提供了一种半导体衬底，其包括单晶Si衬底，其包括具有沟道区，源极区和漏极区的有源层，所述单晶Si衬底包括不包含阱的器件结构的至少一部分 结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度，LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。 因此，通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件，简化了制造单晶硅的工艺。 此外，上述结构提供半导体衬底及其制造方法，当将单晶硅半导体元件转印到大绝缘衬底上时，确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。

公开(公告)号：US07989304B2

公开(公告)日：2011-08-02

申请号：US12162568

申请日：2006-12-13

申请人： Michiko Takei ,  Kazuhide Tomiyasu ,  Yasumori Fukushima ,  Yutaka Takafuji

发明人： Michiko Takei ,  Kazuhide Tomiyasu ,  Yasumori Fukushima ,  Yutaka Takafuji

IPC分类号： H01L21/76 ,  H01L21/30 ,  H01L21/31

CPC分类号： H01L27/1214 ,  H01L21/26506 ,  H01L21/324 ,  H01L27/1266 ,  H01L29/66772 ,  H01L29/78603

摘要： A transistor formed on a monocrystalline Si wafer is temporarily transferred onto a first temporary supporting substrate. The first temporarily supporting substrate is heat-treated at high heat so as to repair crystal defects generated in a transistor channel of the monocrystalline Si wafer when transferring the transistor. The transistor is then made into a chip and transferred onto a TFT substrate. In order to transfer the transistor which has been once separated from the monocrystalline Si wafer, a different method from a stripping method utilizing ion doping is employed.

摘要翻译： 形成在单晶Si晶片上的晶体管暂时转移到第一临时支撑衬底上。 第一临时支撑基板在高温下热处理，以便在传输晶体管时修复在单晶硅晶片的晶体管沟道中产生的晶体缺陷。 然后将晶体管制成芯片并转移到TFT基板上。 为了将已经从单晶Si晶片分离出来的晶体管转移，使用与使用离子掺杂的剥离方法不同的方法。

公开(公告)号：US20110042693A1

公开(公告)日：2011-02-24

申请号：US12933042

申请日：2009-04-09

申请人： Kenshi Tada ,  Yutaka Takafuji ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Michiko Takei ,  Kazuo Nakagawa ,  Shin Matsumoto

发明人： Kenshi Tada ,  Yutaka Takafuji ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Michiko Takei ,  Kazuo Nakagawa ,  Shin Matsumoto

IPC分类号： H01L33/08 ,  H01L21/762

CPC分类号： H01L27/1266 ,  H01L21/8221 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1203 ,  H01L27/1214

摘要： A semiconductor device (10) includes a support substrate (14), an adhered device part (11) adhered to the support substrate (14), a multilayer device part (13) stacked on the adhered device part (11), and an adjacent device part (12) formed in a region adjacent to the adhered device part on the support substrate (14). The adhered device part (11), the multilayer device part (13), and the adjacent device part (12) are electrically connected to one another.

摘要翻译： 半导体装置（10）包括支撑基板（14），粘附到支撑基板（14）的粘合装置部分（11），堆叠在粘附装置部分（11）上的多层装置部分（13） 装置部分（12）形成在与支撑基板（14）上的粘附装置部分相邻的区域中。 粘合装置部分（11），多层装置部分（13）和相邻装置部分（12）彼此电连接。

公开(公告)号：US20110006376A1

公开(公告)日：2011-01-13

申请号：US12922119

申请日：2009-03-03

申请人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi ,  Kenshi Tada ,  Steven Roy Droes

发明人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi ,  Kenshi Tada ,  Steven Roy Droes

IPC分类号： H01L27/092 ,  H01L29/78 ,  H01L21/30 ,  H01L29/739

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1266 ,  H01L29/4908 ,  H01L29/66772

摘要： The present invention provides a semiconductor device capable of improving subthreshold characteristics of a PMOS transistor that is included in a thinned base layer and bonded to another substrate, a production method of such a semiconductor device, and a display device. The semiconductor device of the present invention is a semiconductor device, including: a substrate; and a device part bonded to the substrate, the device part including a base layer and a PMOS transistor, the PMOS transistor including a first electrical conduction path and a first gate electrode, the first electrical conduction path being provided inside the base layer on a side where the first gate electrode is disposed.

摘要翻译： 本发明提供一种半导体器件，其能够改善包括在薄化的基底层中并结合到另一衬底的PMOS晶体管的亚阈值特性，这种半导体器件的制造方法和显示器件。 本发明的半导体器件是半导体器件，包括：衬底; 以及与基板接合的器件部件，所述器件部件包括基极层和PMOS晶体管，所述PMOS晶体管包括第一导电路径和第一栅电极，所述第一导电路径设置在所述基极层的侧面 其中设置第一栅电极。

公开(公告)号：US20100289037A1

公开(公告)日：2010-11-18

申请号：US12812162

申请日：2008-10-10

申请人： Shin Matsumoto ,  Yutaka Takafuji ,  Yasumori Fukushima ,  kenshi Tada

发明人： Shin Matsumoto ,  Yutaka Takafuji ,  Yasumori Fukushima ,  kenshi Tada

IPC分类号： H01L33/00 ,  H01L27/092 ,  H01L21/336 ,  H01L29/786

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/124 ,  H01L29/78 ,  H01L29/78654

摘要： The present invention provides a semiconductor device having a plurality of MOS transistors with controllable threshold values in the same face and easy to manufacture, a manufacturing method thereof and a display device. The invention is a semiconductor device having a plurality of MOS transistors in the same face each having a structure formed by stacking a semiconductor active layer, a gate insulator, and a gate electrode, wherein the semiconductor device includes: an insulating layer stacked on a side opposite to a gate electrode side of the semiconductor active layer; and a conductive electrode stacked on a side opposite to a semiconductor active layer side of the insulating layer and extending over at least two of the plurality of MOS transistors.

摘要翻译： 本发明提供一种半导体器件，其具有在相同的面上具有可控制的阈值的多个MOS晶体管并且易于制造，其制造方法和显示装置。 本发明是一种具有多个MOS晶体管的半导体器件，它们具有通过层叠半导体有源层，栅极绝缘体和栅电极形成的结构，其中半导体器件包括：堆叠在一侧的绝缘层 与半导体有源层的栅电极侧相对; 以及在与所述绝缘层的半导体有源层侧相反的一侧层叠的多个MOS晶体管中的至少两个上延伸的导电电极。

公开(公告)号：US20100270658A1

公开(公告)日：2010-10-28

申请号：US12746156

申请日：2008-09-12

申请人： Kazuo Nakagawa ,  Michiko Takei ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Shin Matsumoto ,  Kenshi Tada ,  Yutaka Takafuji

发明人： Kazuo Nakagawa ,  Michiko Takei ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Shin Matsumoto ,  Kenshi Tada ,  Yutaka Takafuji

IPC分类号： H01L29/02 ,  H01L21/762

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772 ,  H01L29/78603 ,  H01L29/78606

摘要： A method is disclosed for producing a semiconductor device produced by (i) doping hydrogen ions or rare gas ions into a device substrate in which a transfer layer (16) is formed, (ii) then bonding the device substrate to a carrier target substrate, and (iii) transferring the transfer layer (16) onto the carrier substrate (30) by cleaving the device substrate along a portion in which the hydrogen ions or the rare gas ions are doped, the method including providing a blocking layer (11) for blocking diffusion of a bubble-causing substance between (i) a bonding surface (13), which serves as a bonding interface between the device substrate and the carrier substrate, and (ii) the transfer layer (16). This prevents bubbles from forming at the bonding interface between the semiconductor substrate and the target substrate due to the diffusion of the bubble-causing substance.

摘要翻译： 公开了一种用于制造半导体器件的方法，该半导体器件通过（i）将氢离子或稀有气体离子掺杂到其中形成转移层（16）的器件衬底中，（ii）然后将器件衬底接合到载体目标衬底， 以及（iii）通过沿着掺杂有氢离子或稀有气体离子的部分裂开所述器件衬底，将所述转移层（16）转移到所述载体衬底（30）上，所述方法包括提供用于 在（i）用作器件衬底和载体衬底之间的结合界面的接合表面（13）和（ii）转移层（16）之间阻塞气泡引起物质的扩散。 这样可防止由于起泡物质的扩散而在半导体衬底与目标衬底之间的结合界面处形成气泡。