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1.发明授权Semiconductor substrate, semiconductor device, and manufacturing methods for them 有权半导体衬底，半导体器件及其制造方法公开(公告)号：US08293621B2
公开(公告)日：2012-10-23
申请号：US13150620
申请日：2011-06-01
IPC分类号： H01L21/322
CPC分类号： H01L27/1266 , H01L21/76202 , H01L21/76254 , H01L27/1203 , H01L27/1214 , H01L29/78603 , H01L29/78609
摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.
摘要翻译： 本发明提供了一种半导体衬底，其包括单晶Si衬底，其包括具有沟道区，源极区和漏极区的有源层，所述单晶Si衬底包括不包含阱的器件结构的至少一部分 结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度，LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。 因此，通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件，简化了制造单晶硅的工艺。 此外，上述结构提供半导体衬底及其制造方法，当将单晶硅半导体元件转印到大绝缘衬底上时，确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。
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2.发明申请PRODUCTION METHOD OF SEMICONDUCTOR DEVICE, PRODUCTION METHOD OF DISPLAY DEVICE, SEMICONDUCTOR DEVICE, PRODUCTION METHOD OF SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR ELEMENT 审中-公开半导体器件的制造方法，显示器件的制造方法，半导体器件，半导体元件的制造方法和半导体元件公开(公告)号：US20100059892A1
公开(公告)日：2010-03-11
申请号：US12447821
申请日：2007-12-14
申请人： Michiko Takei , Kazuhide Tomiyasu , Yasumori Fukushima , Yutaka Takafuji , Masao Moriguchi , Steven Roy Droes
发明人： Michiko Takei , Kazuhide Tomiyasu , Yasumori Fukushima , Yutaka Takafuji , Masao Moriguchi , Steven Roy Droes
IPC分类号： H01L23/532 , H01L21/3205
CPC分类号： H01L27/1266 , H01L21/6835 , H01L21/823418 , H01L21/823443 , H01L24/83 , H01L27/1214 , H01L27/1229 , H01L29/04 , H01L29/66772 , H01L2221/6835 , H01L2221/68363 , H01L2224/2919 , H01L2224/83894 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01021 , H01L2924/01033 , H01L2924/01042 , H01L2924/01045 , H01L2924/0105 , H01L2924/01058 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/04941 , H01L2924/0665 , H01L2924/10253 , H01L2924/13091 , H01L2924/14 , H01L2924/15788 , H01L2924/00 , H01L2924/3512
摘要： The present invention provides a production method of a semiconductor device, a production method of a display device, a semiconductor device, a production method of a semiconductor element, and a semiconductor element, each capable of providing a lower-resistance semiconductor element which is more finely prepared through more simple steps. The production method of the semiconductor device of the present invention is a production method of a semiconductor device including a semiconductor element on a substrate, wherein the production method includes a metal silicide-forming step of: transferring the semiconductor element onto the substrate, the semiconductor element having a multilayer structure of a silicon layer and a metal layer, and by heating, forming metal silicide from silicon for a metal layer-side part of the silicon layer and metal for a silicon layer-side part of the metal layer.
摘要翻译： 本发明提供半导体装置的制造方法，显示装置的制造方法，半导体装置，半导体元件的制造方法以及半导体元件，能够提供更多的低电阻半导体元件 通过更简单的步骤精心准备。 本发明的半导体装置的制造方法是在基板上具有半导体元件的半导体装置的制造方法，其特征在于，所述制造方法包括金属硅化物形成工序，将所述半导体元件转印到所述基板上，所述半导体 具有硅层和金属层的多层结构的元件，并且通过加热，从硅形成金属硅化物用于硅层的金属层侧部分和用于金属层的硅层侧部分的金属。
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3.发明授权Method for fabricating semiconductor device and semiconductor device with separation along peeling layer 有权半导体器件制造方法和沿着剥离层分离的半导体器件公开(公告)号：US08017492B2
公开(公告)日：2011-09-13
申请号：US12222598
申请日：2008-08-12
IPC分类号： H01L21/76
CPC分类号： H01L21/84 , H01L21/32 , H01L21/76254 , H01L27/1203 , H01L29/78654
摘要： A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.
摘要翻译： 根据本发明的制造半导体器件的方法是一种半导体器件的制造方法，该半导体器件包括：衬底层，该衬底层包括多个第一区域，每个第一区域具有有源区域和多个第二区域， 地区。 制造方法包括隔离绝缘膜形成步骤，在每个第二区域中形成隔离绝缘膜，使得隔离绝缘膜的表面变得与覆盖有源区域的栅极氧化物膜的表面相同的高度 剥离层形成步骤，在隔离绝缘膜形成步骤之后，通过将氢离子注入到衬底层中形成剥离层，以及分离步骤，用于沿剥离层分离衬底层的一部分。
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公开(公告)号：US20080128807A1
公开(公告)日：2008-06-05
申请号：US11792487
申请日：2005-11-15
CPC分类号： H01L27/1203 , H01L21/02164 , H01L21/02271 , H01L21/265 , H01L21/31662 , H01L21/32 , H01L21/76254 , H01L21/84 , H01L29/7833
摘要： In fabricating a semiconductor device, an element forming surface formation step of forming a plurality of element forming surfaces of different heights on a semiconductor layer to have different levels, a semiconductor element formation step of forming a plurality of semiconductor elements and, one in each of a corresponding number of regions of the semiconductor layer, each region including an associated one of the plurality of element forming surfaces, a level-difference compensation insulating film formation step of forming a level-difference compensation insulating film on the semiconductor layer to cover the semiconductor elements and have a surface with different levels along the element forming surfaces, a release layer formation step of forming a release layer in the semiconductor layer by ion-implanting a peeling material through the level-difference compensation insulating film into the semiconductor layer, and a separation step of separating part of the semiconductor layer along the release layer are performed.
摘要翻译： 在制造半导体器件时，在半导体层上形成具有不同高度的多个元件形成表面以形成不同电平的元件形成表面形成步骤，形成多个半导体元件的半导体元件形成步骤和 所述半导体层的相应数量的区域，每个区域包括所述多个元件形成表面中的相关联的一个元件形成表面;电平差补偿绝缘膜形成步骤，在所述半导体层上形成电平差补偿绝缘膜以覆盖所述半导体 元件，并且具有沿着元件形成表面具有不同水平的表面;剥离层形成步骤，通过将剥离材料通过电位差补偿绝缘膜离子注入到半导体层中而在半导体层中形成剥离层，以及 分离半导体层的一部分的分离步骤 沿着释放层进行。
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5.发明申请Semiconductor substrate, semiconductor device, and manufacturing methods for them 有权半导体衬底，半导体器件及其制造方法公开(公告)号：US20050245046A1
公开(公告)日：2005-11-03
申请号：US11086680
申请日：2005-03-23
IPC分类号： G02F1/1368 , G02F1/136 , G09F9/30 , G09G3/00 , H01L21/00 , H01L21/02 , H01L21/316 , H01L21/336 , H01L21/469 , H01L21/76 , H01L21/762 , H01L21/77 , H01L21/8234 , H01L21/8238 , H01L21/84 , H01L27/08 , H01L27/088 , H01L27/092 , H01L27/10 , H01L27/12 , H01L29/00 , H01L29/786
CPC分类号： H01L27/1266 , H01L21/76202 , H01L21/76254 , H01L27/1203 , H01L27/1214 , H01L29/78603 , H01L29/78609
摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.
摘要翻译： 本发明提供一种半导体衬底，其包括单晶Si衬底，其包括具有沟道区，源极区和漏极区的有源层，所述单晶Si衬底包括至少部分不包含阱的器件结构 结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度，LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。 因此，通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件，简化了制造单晶硅的工艺。 此外，上述结构提供半导体衬底及其制造方法，当将单晶硅半导体元件转印到大绝缘衬底上时，确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。
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公开(公告)号：US08563406B2
公开(公告)日：2013-10-22
申请号：US12416240
申请日：2009-04-01
IPC分类号： H01L21/322
CPC分类号： H01L27/1266 , H01L21/76202 , H01L21/76254 , H01L27/1203 , H01L27/1214 , H01L29/78603 , H01L29/78609
摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.
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7.发明申请SEMICONDUCTOR DEVICE MANUFACTURING METHOD, SEMICONDUCTOR DEVICE AND DISPLAY APPARATUS 有权半导体器件制造方法，半导体器件和显示器公开(公告)号：US20100283103A1
公开(公告)日：2010-11-11
申请号：US12745497
申请日：2008-11-14
IPC分类号： H01L29/786 , H01L21/762
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/1214
摘要： A method for manufacturing a semiconductor device includes: a first step of forming a base layer, which includes an element portion having a gate electrode and a flat interlayer insulating film formed so as to cover the gate electrode; a second step of ion implanting a delamination material into the base layer to form a delamination layer; a third step of bonding the base layer to a substrate; and a fourth step of separating and removing a part of the base layer along the delamination layer. An implantation depth of the delamination material in the gate electrode is substantially the same as that of the delamination material in the interlayer insulating film.
摘要翻译： 一种制造半导体器件的方法包括：形成基底层的第一步骤，其包括具有栅电极的元件部分和形成为覆盖栅电极的平坦层间绝缘膜; 将分层材料离子注入基层以形成分层的第二步骤; 将基底层粘合到基底上的第三步骤; 以及沿剥离层分离除去基底层的一部分的第四工序。 栅电极中的分层材料的注入深度与层间绝缘膜中的分层材料的植入深度基本相同。
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公开(公告)号：US07829400B2
公开(公告)日：2010-11-09
申请号：US11792487
申请日：2005-11-15
IPC分类号： H01L21/8234
CPC分类号： H01L27/1203 , H01L21/02164 , H01L21/02271 , H01L21/265 , H01L21/31662 , H01L21/32 , H01L21/76254 , H01L21/84 , H01L29/7833
摘要： In fabricating a semiconductor device, an element forming surface formation step of forming a plurality of element forming surfaces of different heights on a semiconductor layer to have different levels, a semiconductor element formation step of forming a plurality of semiconductor elements and, one in each of a corresponding number of regions of the semiconductor layer, each region including an associated one of the plurality of element forming surfaces, a level-difference compensation insulating film formation step of forming a level-difference compensation insulating film on the semiconductor layer to cover the semiconductor elements and have a surface with different levels along the element forming surfaces, a release layer formation step of forming a release layer in the semiconductor layer by ion-implanting a peeling material through the level-difference compensation insulating film into the semiconductor layer, and a separation step of separating part of the semiconductor layer along the release layer are performed.
摘要翻译： 在制造半导体器件时，在半导体层上形成具有不同高度的多个元件形成表面以形成不同电平的元件形成表面形成步骤，形成多个半导体元件的半导体元件形成步骤和 所述半导体层的相应数量的区域，每个区域包括所述多个元件形成表面中的相关联的一个元件形成表面;电平差补偿绝缘膜形成步骤，在所述半导体层上形成电平差补偿绝缘膜以覆盖所述半导体 元件，并且具有沿着元件形成表面具有不同水平的表面;剥离层形成步骤，通过将剥离材料通过电位差补偿绝缘膜离子注入到半导体层中而在半导体层中形成剥离层，以及 分离半导体层的一部分的分离步骤 沿着释放层进行。
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公开(公告)号：US20080318390A1
公开(公告)日：2008-12-25
申请号：US12222598
申请日：2008-08-12
IPC分类号： H01L21/76
CPC分类号： H01L21/84 , H01L21/32 , H01L21/76254 , H01L27/1203 , H01L29/78654
摘要： A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.
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10.发明授权Semiconductor device manufacturing method, semiconductor device and display apparatus 有权半导体器件制造方法，半导体器件和显示装置公开(公告)号：US08354329B2
公开(公告)日：2013-01-15
申请号：US12745497
申请日：2008-11-14
IPC分类号： H01L29/786 , H01L21/762
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/1214
摘要： A method for manufacturing a semiconductor device includes: a first step of forming a base layer, which includes an element portion having a gate electrode and a flat interlayer insulating film formed so as to cover the gate electrode; a second step of ion implanting a delamination material into the base layer to form a delamination layer; a third step of bonding the base layer to a substrate; and a fourth step of separating and removing a part of the base layer along the delamination layer. An implantation depth of the delamination material in the gate electrode is substantially the same as that of the delamination material in the interlayer insulating film.
摘要翻译： 一种制造半导体器件的方法包括：形成基底层的第一步骤，其包括具有栅电极的元件部分和形成为覆盖栅电极的平坦层间绝缘膜; 将分层材料离子注入基层以形成分层的第二步骤; 将基底层粘合到基底上的第三步骤; 以及沿剥离层分离除去基底层的一部分的第四工序。 栅电极中的分层材料的注入深度与层间绝缘膜中的分层材料的植入深度基本相同。
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