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170 条记录 (耗时 0.041 秒)

    Non-volatile memory device and method of fabricating the same
    41.
    发明授权
    Non-volatile memory device and method of fabricating the same 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US07700935B2

    公开(公告)日：2010-04-20

    申请号：US11882694

    申请日：2007-08-03

    申请人： Won-joo Kim ,  Suk-pil Kim ,  Yoon-dong Park ,  June-mo Koo

    发明人： Won-joo Kim ,  Suk-pil Kim ,  Yoon-dong Park ,  June-mo Koo

    IPC分类号： H01L47/00

    CPC分类号： G11C11/5678 ,  G11C13/0004 ,  H01L27/24

    摘要： A non-volatile memory device and a method of fabricating the same are provided. In the non-volatile memory device, at least one first semiconductor layer of a first conductivity type may be formed spaced apart from each other on a portion of a substrate. A plurality of first resistance variation storage layers may contact first sidewalls of each of the at least one first semiconductor layer. A plurality of second semiconductor layers of a second conductivity type, opposite to the first conductivity type, may be interposed between the first sidewalls of each of the at least one first semiconductor layer and the plurality of first resistance variation storage layers. A plurality of bit line electrodes may be connected to each of the plurality of first resistance variation storage layers.

    摘要翻译： 提供了一种非易失性存储器件及其制造方法。 在非易失性存储器件中，第一导电类型的至少一个第一半导体层可以在衬底的一部分上彼此间隔开形成。 多个第一电阻变化存储层可以接触至少一个第一半导体层中的每一个的第一侧壁。 与第一导电类型相反的第二导电类型的多个第二半导体层可以插入在至少一个第一半导体层和多个第一电阻变化存储层中的每一个的第一侧壁之间。 多个位线电极可以连接到多个第一电阻变化存储层中的每一个。

    Nonvolatile memory devices and methods of fabricating the same
    43.
    发明申请
    Nonvolatile memory devices and methods of fabricating the same 审中-公开
    非易失性存储器件及其制造方法

    公开(公告)号：US20080191263A1

    公开(公告)日：2008-08-14

    申请号：US11980419

    申请日：2007-10-31

    申请人： Won-joo Kim ,  June-mo Koo ,  Suk-pil Kim ,  Yoon-dong Park

    发明人： Won-joo Kim ,  June-mo Koo ,  Suk-pil Kim ,  Yoon-dong Park

    IPC分类号： H01L29/788 ,  H01L21/336

    CPC分类号： H01L29/792 ,  H01L27/11521 ,  H01L27/11556 ,  H01L27/11568 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42332 ,  H01L29/42348 ,  H01L29/7881 ,  H01L29/7926

    摘要： Provided are a nonvolatile memory device and a method of fabricating the same in which a channel length is effectively increased and high-integration may be possible. In the nonvolatile memory device, a semiconductor device may include an active region defined by a device isolation film. The active region may include at least one projecting portion. A pair of control gate electrodes may cover both side surfaces of the at least one projecting portion, and may be spaced apart from each other. A pair of charge storage layers may be between both side surfaces of the at least one projecting portion and the pair of control gate electrodes.

    摘要翻译： 提供一种非易失性存储器件及其制造方法，其中沟道长度被有效地增加并且高集成度是可能的。 在非易失性存储器件中，半导体器件可以包括由器件隔离膜限定的有源区。 有源区域可以包括至少一个突出部分。 一对控制栅电极可以覆盖至少一个突出部分的两个侧表面，并且可以彼此间隔开。 一对电荷存储层可以位于至少一个突出部分的两个侧表面和一对控制栅极电极之间。

    Non-volatile memory devices and methods of operating the same
    44.
    发明申请
    Non-volatile memory devices and methods of operating the same 失效
    非易失性存储器件及其操作方法

    公开(公告)号：US20080175061A1

    公开(公告)日：2008-07-24

    申请号：US12005376

    申请日：2007-12-27

    申请人： Won-joo Kim ,  Yoon-dong Park ,  June-mo Koo ,  Suk-pil Kim ,  Tae-hee Lee

    发明人： Won-joo Kim ,  Yoon-dong Park ,  June-mo Koo ,  Suk-pil Kim ,  Tae-hee Lee

    IPC分类号： G11C16/06 ,  H01L29/788

    CPC分类号： H01L29/7881 ,  G11C16/3418 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42328 ,  H01L29/42336 ,  H01L29/66825

    摘要： Example embodiment non-volatile memory devices may be capable of increased integration and reliability and may provide example methods of operating non-volatile memory devices. Example embodiment non-volatile memory devices may include a first control gate electrode on a semiconductor substrate. A first charge storing layer may be between the semiconductor substrate and the first control gate electrode. A source region may be defined in the semiconductor substrate at one side of the first control gate electrode. A first auxiliary gate electrode may be at the other side of the first control gate electrode and may be recessed into the semiconductor substrate. A first drain region may be defined in the semiconductor substrate at one side of the first auxiliary gate electrode opposite to the first control gate electrode. A bit line may be connected to the first drain region.

    摘要翻译： 示例性实施例非易失性存储器设备可能能够提高集成度和可靠性，并且可以提供操作非易失性存储器设备的示例性方法。 示例性实施例非易失性存储器件可以包括半导体衬底上的第一控制栅电极。 第一电荷存储层可以在半导体衬底和第一控制栅电极之间。 源区域可以在第一控制栅电极的一侧的半导体衬底中限定。 第一辅助栅电极可以在第一控制栅电极的另一侧，并且可以凹入到半导体衬底中。 第一漏极区域可以在第一辅助栅电极的与第一控制栅电极相对的一侧的半导体衬底中限定。 位线可以连接到第一漏区。

    Non-volatile memory device and operation method of the same
    45.
    发明申请
    Non-volatile memory device and operation method of the same 有权
    非易失性存储器件及其操作方法相同

    公开(公告)号：US20090091975A1

    公开(公告)日：2009-04-09

    申请号：US12081679

    申请日：2008-04-18

    申请人： Tae-hee Lee ,  Won-joo Kim ,  Yoon-dong Park ,  June-mo Koo ,  Suk-pil Kim ,  Tae-eung Yoon

    发明人： Tae-hee Lee ,  Won-joo Kim ,  Yoon-dong Park ,  June-mo Koo ,  Suk-pil Kim ,  Tae-eung Yoon

    IPC分类号： G11C16/06

    CPC分类号： G11C16/0483 ,  H01L27/11521 ,  H01L27/11568

    摘要： Provided are a non-volatile memory device and an operation method of the same. The non-volatile memory device may include one or more main strings each of which may include first and second substrings which may separately include a plurality of memory cell transistors; and a charge supply line which may be configured to provide charges to or block charges from the first and second substrings of each of the main strings, wherein each of the main strings may include a first ground selection transistor which may be connected to the first substring; a first substring selection transistor which may be connected to the first ground selection transistor; a second ground selection transistor which may be connected to the second substring; and a second substring selection transistor which may be connected to the second ground selection transistor.

    摘要翻译： 提供了一种非易失性存储器件及其操作方法。 非易失性存储器件可以包括一个或多个主串，每个主弦可以包括可以分别包括多个存储单元晶体管的第一和第二子串; 以及电荷供给线，其可以被配置为向每个主串的第一和第二子串提供电荷或阻止电荷，其中每个主串可以包括第一接地选择晶体管，其可以连接到第一子串 ; 可以连接到第一接地选择晶体管的第一子串选择晶体管; 可以连接到第二子串的第二接地选择晶体管; 以及可以连接到第二接地选择晶体管的第二子串选择晶体管。

    Nonvolatile memory device and method of fabricating the same
    47.
    发明申请
    Nonvolatile memory device and method of fabricating the same 失效
    非易失性存储器件及其制造方法

    公开(公告)号：US20080157176A1

    公开(公告)日：2008-07-03

    申请号：US11902511

    申请日：2007-09-21

    申请人： Won-joo Kim ,  Yoon-dong Park ,  June-mo Koo ,  Suk-pil Kim ,  Sung-jae Byun

    发明人： Won-joo Kim ,  Yoon-dong Park ,  June-mo Koo ,  Suk-pil Kim ,  Sung-jae Byun

    IPC分类号： H01L27/115 ,  H01L21/8247

    CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11568 ,  H01L29/42336 ,  H01L29/66803

    摘要： A nonvolatile memory device having lower bit line contact resistance and a method of fabricating the same is provided. In the nonvolatile memory device, a semiconductor substrate of a first conductivity type may include first and second fins. A common bit line electrode may connect one end of the first fin to one end of the second fin. A plurality of control gate electrodes may cover the first and second fins and expand across the top surface of each of the first and second fins. A first string selection gate electrode may be positioned between the common bit line electrode and the plurality of control gate electrodes. The first string selection gate electrode may cover the first and second fins and expand across the top surface of each of the first and second fins. A second string selection gate electrode may be positioned between the first string selection gate electrode and the plurality of control gate electrodes. The second string selection gate electrode may cover the first and second fins and expand across the top surface of each of the first and second fins. The first fin under the first string selection gate electrode and the second fin under the second string selection gate electrode may have a second conductivity type opposite to the first conductivity type.

    摘要翻译： 提供一种具有较低位线接触电阻的非易失性存储器件及其制造方法。 在非易失性存储器件中，第一导电类型的半导体衬底可以包括第一和第二鳍片。 公共位线电极可将第一鳍片的一端连接到第二鳍片的一端。 多个控制栅极电极可以覆盖第一和第二鳍片并且跨越第一和第二鳍片中的每一个的顶表面膨胀。 第一串选择栅极可以位于公共位线电极和多个控制栅电极之间。 第一串选择栅电极可以覆盖第一和第二鳍片并且横跨第一和第二鳍片中的每一个的顶表面扩展。 第二串选择栅电极可以位于第一串选择栅电极和多个控制栅电极之间。 第二串选择栅电极可以覆盖第一和第二鳍片并且横跨第一和第二鳍片中的每一个的顶表面扩展。 第一串选择栅电极下的第一鳍和第二串选择栅电极下的第二鳍可以具有与第一导电类型相反的第二导电类型。

    Non-volatile memory device and method of fabricating the same
    48.
    发明申请
    Non-volatile memory device and method of fabricating the same 失效
    非易失性存储器件及其制造方法

    公开(公告)号：US20080135916A1

    公开(公告)日：2008-06-12

    申请号：US11987008

    申请日：2007-11-26

    申请人： Won-joo Kim ,  Yoon-dong Park ,  June-mo Koo ,  Suk-pil Kim

    发明人： Won-joo Kim ,  Yoon-dong Park ,  June-mo Koo ,  Suk-pil Kim

    IPC分类号： H01L21/336 ,  H01L29/788

    CPC分类号： H01L29/7885 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/115 ,  H01L29/42328 ,  H01L29/42332 ,  H01L29/42336 ,  H01L29/42344 ,  H01L29/42352 ,  H01L29/7887 ,  H01L29/792 ,  H01L29/7923

    摘要： Provided are example embodiments of a non-volatile memory device and a method of fabricating the same. The non-volatile memory device may include a control gate electrode arranged on a semiconductor substrate, a gate insulating layer interposed between the semiconductor substrate and the control gate electrode, a storage node layer interposed between the gate insulating layer and the control gate electrode, a blocking insulating layer interposed between the storage node layer and the control gate electrode, first dopant doping regions along a first side of the control gate electrode, and second dopant doping regions along a second side of the control gate electrode. The first dopant doping regions may alternate with the second dopant doping regions. Stated differently, each of the second dopant doping regions may be arranged in a region on the second side of the control gate electrode that is adjacent to one of the first dopant doping regions.

    摘要翻译： 提供了非易失性存储器件的示例性实施例及其制造方法。 非易失性存储器件可以包括布置在半导体衬底上的控制栅电极，介于半导体衬底和控制栅电极之间的栅极绝缘层，介于栅极绝缘层和控制栅电极之间的存储节点层， 插入在所述存储节点层和所述控制栅电极之间的阻挡绝缘层，沿着所述控制栅电极的第一侧的第一掺杂剂掺杂区域和沿着所述控制栅电极的第二侧的第二掺杂剂掺杂区域。 第一掺杂剂掺杂区域可以与第二掺杂剂掺杂区域交替。 换句话说，每个第二掺杂剂掺杂区域可以被布置在与第一掺杂剂掺杂区域中的一个相邻的控制栅电极的第二侧上的区域中。

    Non-volatile memory device and method of fabricating the same
    49.
    发明申请
    Non-volatile memory device and method of fabricating the same 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US20080123390A1

    公开(公告)日：2008-05-29

    申请号：US11882694

    申请日：2007-08-03

    申请人： Won-joo Kim ,  Suk-pil Kim ,  Yoon-dong Park ,  June-mo Koo

    发明人： Won-joo Kim ,  Suk-pil Kim ,  Yoon-dong Park ,  June-mo Koo

    IPC分类号： G11C11/00 ,  H01L21/16

    CPC分类号： G11C11/5678 ,  G11C13/0004 ,  H01L27/24

    摘要： A non-volatile memory device and a method of fabricating the same are provided. In the non-volatile memory device, at least one first semiconductor layer of a first conductivity type may be formed spaced apart from each other on a portion of a substrate. A plurality of first resistance variation storage layers may contact first sidewalls of each of the at least one first semiconductor layer. A plurality of second semiconductor layers of a second conductivity type, opposite to the first conductivity type, may be interposed between the first sidewalls of each of the at least one first semiconductor layer and the plurality of first resistance variation storage layers. A plurality of bit line electrodes may be connected to each of the plurality of first resistance variation storage layers.

    摘要翻译： 提供了一种非易失性存储器件及其制造方法。 在非易失性存储器件中，第一导电类型的至少一个第一半导体层可以在衬底的一部分上彼此间隔开形成。 多个第一电阻变化存储层可以接触至少一个第一半导体层中的每一个的第一侧壁。 与第一导电类型相反的第二导电类型的多个第二半导体层可以插入在至少一个第一半导体层和多个第一电阻变化存储层中的每一个的第一侧壁之间。 多个位线电极可以连接到多个第一电阻变化存储层中的每一个。