公开(公告)号：US20090284316A1

公开(公告)日：2009-11-19

申请号：US12121965

申请日：2008-05-16

申请人： Stefan Hermann Groiss

发明人： Stefan Hermann Groiss

IPC分类号： H03G3/30 ,  H03F3/45

CPC分类号： H03F3/08 ,  H03F3/087 ,  H03F3/211 ,  H03F3/4508 ,  H03F3/45282 ,  H03F3/45475 ,  H03F2203/21127 ,  H03F2203/21142 ,  H03F2203/45021 ,  H03F2203/45022 ,  H03F2203/45031 ,  H03F2203/45032 ,  H03F2203/45136 ,  H03F2203/45326 ,  H03F2203/45358 ,  H03F2203/45374 ,  H03F2203/45511 ,  H03F2203/45521 ,  H03F2203/45528 ,  H03F2203/45646 ,  H03F2203/45674 ,  H03G3/3084

摘要： An electronic circuit arrangement is provided which comprises an input terminal configured to input an input signal to be amplified and an output terminal configured to output the amplified input signal as an output signal. A signal path is defined between the input terminal and the output terminal. An amplifier unit having an amplifier gain is provided and being configured to amplify the input signal and for generating the output signal. A variation of an operational current of the amplifier unit is configured to provide a variation of the amplifier gain. The amplifier unit is arranged within the signal path. Furthermore a gain control unit is configured to control the gain of the amplifier unit by adjusting the operational current of the amplifier unit. The gain control unit is arranged outside the signal path.

摘要翻译： 提供了一种电子电路装置，其包括被配置为输入要放大的输入信号的输入端子和被配置为输出放大的输入信号作为输出信号的输出端子。 在输入端子和输出端子之间定义信号路径。 提供具有放大器增益的放大器单元，其被配置为放大输入信号并产生输出信号。 放大器单元的工作电流的变化被配置为提供放大器增益的变化。 放大器单元布置在信号路径内。 此外，增益控制单元被配置为通过调整放大器单元的工作电流来控制放大器单元的增益。 增益控制单元布置在信号路径的外部。

公开(公告)号：US07557659B2

公开(公告)日：2009-07-07

申请号：US11940933

申请日：2007-11-15

申请人： Barry Harvey

发明人： Barry Harvey

IPC分类号： H03F3/45

CPC分类号： H03F3/4508 ,  H03F3/45484 ,  H03F2203/45134 ,  H03F2203/45248 ,  H03F2203/45352 ,  H03F2203/45366 ,  H03F2203/45648 ,  H03F2203/45681

摘要： Provided herein are input stages, and operation amplifiers including input stages. In an embodiment, an input stage includes a complimentary differential input transconductor, first and second npn-pnp current mirrors, and first and second pnp-npn current mirrors. The complimentary differential input transconductor includes a pair of differential inputs that accept a pair of voltage signals, a first pair of complimentary differential outputs that output current signals I1 and I2, and a second pair of complimentary differential outputs that output current signals I3 and I4. Each current mirror accepts one of the current signals I1, I2, I3 and I4, and outputs a pair of current signals (e.g., I1′ and I1″) that are proportional to the accepted current signal (e.g., I1). Current signals I1′ and I3′ are added to produce a first output current (Iout) of the input stage. Current signals I2′ and I4′ are added to produce a second output current (Iout_bar) of the input stage.

摘要翻译： 这里提供了输入级，以及包括输入级的运算放大器。 在一个实施例中，输入级包括互补差分输入跨导体，第一和第二npn-pnp电流镜，以及第一和第二pnp-npn电流镜。 补偿差分输入跨导体包括一对差分输入，其接受一对电压信号，输出电流信号I1和I2的第一对互补差分输出和输出电流信号I3和I4的第二对互补差分输出。 每个电流镜接受电流信号I1，I2，I3和I4中的一个，并输出与接受的电流信号（例如，I1）成比例的一对电流信号（例如，I1'和I1“）。 电流信号I1'和I3'相加以产生输入级的第一输出电流（Iout）。 电流信号I2'和I4'相加以产生输入级的第二输出电流（Iout_bar）。

公开(公告)号：US20090160525A1

公开(公告)日：2009-06-25

申请号：US12341665

申请日：2008-12-22

申请人： Satoshi Yokoo

发明人： Satoshi Yokoo

IPC分类号： H03L5/00

CPC分类号： H03F3/4508 ,  H03F2203/45166 ,  H03F2203/45318 ,  H03F2203/45352 ,  H03F2203/45682

摘要： An amplifier including the transistors of a first set operates by a power source VCC2, and amplifies the input signal, changing in the voltage range of the power source VCC2, in the voltage range of the power source VCC2. The output of this amplifier operates using a power source VCC1 with a converting portion including the transistors of a second set, and the output of the amplifier is converted into an output within the voltage range of the power source VCC1. The two output amplifiers amplify the output of this converting portion based on a (½) VCC1 reference. The converting portion performs the conversion using a plurality of transistors with the power source VCC2 taken as a power source and a plurality of transistors 7 with the power source VCC1 taken as a power source, as current mirrors.

摘要翻译： 包括第一组的晶体管的放大器由电源VCC2工作，并且在电源VCC2的电压范围内放大输入信号，改变电源VCC2的电压范围。 该放大器的输出使用具有包括第二组的晶体管的转换部分的电源VCC1工作，并且放大器的输出被转换为电源VCC1的电压范围内的输出。 两个输出放大器基于（1/2）VCC1参考放大该转换部分的输出。 转换部分使用电源VCC2作为电源的多个晶体管和以电源VCC1为电源的多个晶体管7作为电流镜来进行转换。

公开(公告)号：US20090153246A1

公开(公告)日：2009-06-18

申请号：US12378520

申请日：2009-02-17

申请人： Christopher Yong

发明人： Christopher Yong

IPC分类号： H03F3/45

CPC分类号： H03F3/4508 ,  H03F3/3432 ,  H03F3/45475 ,  H03F2200/375 ,  H03F2200/393 ,  H03F2200/447 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2203/45101 ,  H03F2203/45136 ,  H03G7/08

摘要： A method for varying gain exponentially with respect to a control signal is provided. The method includes receiving a primary control signal. A secondary control signal is generated based on the primary control signal. The secondary control signal is provided to a variable gain amplifier and is operable to exponentially vary a gain for the variable gain amplifier with respect to the primary control signal.

摘要翻译： 提供了一种相对于控制信号以指数方式改变增益的方法。 该方法包括接收主控制信号。 基于主控制信号产生辅助控制信号。 次级控制信号被提供给可变增益放大器，并且可操作以相对于主控制信号指数地改变可变增益放大器的增益。

公开(公告)号：US20090102560A1

公开(公告)日：2009-04-23

申请号：US11940933

申请日：2007-11-15

申请人： Barry Harvey

发明人： Barry Harvey

IPC分类号： H03F3/45

CPC分类号： H03F3/4508 ,  H03F3/45484 ,  H03F2203/45134 ,  H03F2203/45248 ,  H03F2203/45352 ,  H03F2203/45366 ,  H03F2203/45648 ,  H03F2203/45681

摘要： Provided herein are input stages, and operation amplifiers including input stages. In an embodiment, an input stage includes a complimentary differential input transconductor, first and second npn-pnp current mirrors, and first and second pnp-npn current mirrors. The complimentary differential input transconductor includes a pair of differential inputs that accept a pair of voltage signals, a first pair of complimentary differential outputs that output current signals I1 and I2, and a second pair of complimentary differential outputs that output current signals I3 and I4. Each current mirror accepts one of the current signals I1, I2, I3 and I4, and outputs a pair of current signals (e.g., I1′ and I1″) that are proportional to the accepted current signal (e.g., I1). Current signals I1′ and I3′ are added to produce a first output current (Iout) of the input stage. Current signals I2′ and I4′ are added to produce a second output current (Iout bar) of the input stage.

摘要翻译： 这里提供了输入级，以及包括输入级的运算放大器。 在一个实施例中，输入级包括互补差分输入跨导体，第一和第二npn-pnp电流镜，以及第一和第二pnp-npn电流镜。 补偿差分输入跨导体包括一对差分输入，其接受一对电压信号，输出电流信号I1和I2的第一对互补差分输出和输出电流信号I3和I4的第二对互补差分输出。 每个电流镜接受电流信号I1，I2，I3和I4中的一个，并输出与接受的电流信号（例如，I1）成比例的一对电流信号（例如，I1'和I1“）。 电流信号I1'和I3'相加以产生输入级的第一输出电流（Iout）。 电流信号I2'和I4'相加以产生输入级的第二输出电流（Iout bar）。

公开(公告)号：US07521997B2

公开(公告)日：2009-04-21

申请号：US11938363

申请日：2007-11-12

申请人： Sung Ho Beck ,  Myung Woon Hwang

发明人： Sung Ho Beck ,  Myung Woon Hwang

IPC分类号： H03F3/45

CPC分类号： H03F3/4508 ,  H03F2200/91 ,  H03F2203/45271 ,  H03F2203/45294 ,  H03F2203/45306 ,  H03F2203/45631 ,  H03F2203/45702 ,  H03G1/0023

摘要： Provided is a low-power variable gain amplifier having a direct-current (DC) bias stabilizer. The low-power variable gain amplifier includes: a load block through which first and second load currents flow from a first source voltage; a first differential input signal source including a terminal connected to a second source voltage and the other terminal connected to a variable gain amplifying block and sinking currents corresponding to a value of a first differential input current signal; a second differential input signal source including a terminal connected to the second source voltage and the other terminal connected to the variable gain amplifying block and sinking currents corresponding to a value of a second differential input current signal; a variable gain amplifying block sinking first and second differential output current signals that are branch currents of the first and load currents, respectively, and first and second destructive-compensation current signals, in response to first and second gain control signals and the first and second differential input current signals; and the DC bias stabilizer processing the first and second destructive-compensation current signals and first and second bias currents that are branch currents of the first and second load currents, respectively, to enable the first and second load currents to include fixed DC current components, wherein the currents sunk to the first and second differential input signal sources include DC current components and AC current components, the DC current components of the first and second differential input signal sources have the same value, and the AC current components thereof have a phase difference of 180°.

摘要翻译： 提供了具有直流（DC）偏置稳定器的低功率可变增益放大器。 低功率可变增益放大器包括：第一和第二负载电流从第一源电压流过的负载块; 第一差分输入信号源，包括连接到第二源电压的端子和连接到可变增益放大块的另一端子和与第一差分输入电流信号的值相对应的吸收电流; 第二差分输入信号源，包括连接到第二源电压的端子，连接到可变增益放大块的另一端和与第二差分输入电流信号的值相对应的吸收电流; 可变增益放大块，分别作为第一和负载电流的分支电流以及第一和第二破坏补偿电流信号分别吸收作为第一和第二增益控制信号的第一和第二差分输出电流信号，以及第一和第二增益控制信号 差分输入电流信号; 并且所述DC偏置稳定器分别处理所述第一和第二破坏补偿电流信号以及作为所述第一和第二负载电流的分支电流的第一和第二偏置电流，以使得所述第一和第二负载电流能够包括固定的DC电流分量， 其中，所述第一和第二差分输入信号源的电流包括直流电流分量和交流电流分量，所述第一和第二差分输入信号源的直流电流分量具有相同的值，并且其交流电流分量具有相位差 180°。

公开(公告)号：US07518454B2

公开(公告)日：2009-04-14

申请号：US10579578

申请日：2004-11-16

申请人： Katsuya Yamashita

发明人： Katsuya Yamashita

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  H03F1/3211 ,  H03F1/34 ,  H03F3/4508 ,  H03F3/72 ,  H03F2200/111 ,  H03F2203/45138 ,  H03F2203/45352 ,  H03F2203/45512 ,  H03F2203/45528 ,  H03F2203/45604 ,  H03F2203/7203 ,  H03F2203/7209

摘要： A current feedback-type operational amplifier comprising multiple input parts and one output part, wherein each of the multiple input parts comprises a first input terminal, a second input terminal, and an output terminal, the signals input from the first input terminal are buffer amplified and output to the second input terminal, and current is output to the output terminal in an amount corresponding to the current that flows to the second input terminal; the output terminal part comprises an input terminal and an output terminal, signals obtained by adding in terms of current the signals of all of the input parts are input to the input terminal, and the signals input to the input terminal are converted to voltage signals, amplified, and output to the output terminal; and one of the above-mentioned input parts is made effective and the other input parts are made ineffective in response to first external signals, the impedance of the first input terminal, the second input terminal, and the output terminal of the above-mentioned ineffective input parts becomes high and the output current from the above-mentioned output terminal becomes zero.

摘要翻译： 一种电流反馈型运算放大器，包括多个输入部分和一个输出部分，其中多个输入部分中的每一个包括第一输入端子，第二输入端子和输出端子，从第一输入端子输入的信号被缓冲放大 并输出到第二输入端，电流以对应于流向第二输入端的电流的量输出到输出端; 输出端子部分包括输入端子和输出端子，通过将电流相加而得到的信号将所有输入部分的信号输入到输入端子，输入到输入端子的信号被转换为电压信号， 放大并输出到输出端; 并且使上述输入部分之一变得有效，并且响应于第一外部信号使得其他输入部分无效，上述无效的第一输入端子，第二输入端子和输出端子的阻抗 输入部分变高，并且来自上述输出端子的输出电流变为零。

公开(公告)号：US07466199B2

公开(公告)日：2008-12-16

申请号：US11732567

申请日：2007-04-04

申请人： Thomas Blon

发明人： Thomas Blon

IPC分类号： H03F3/45

CPC分类号： H03F3/4508 ,  H03F1/0205 ,  H03F2200/294 ,  H03F2203/45022 ,  H03F2203/45244 ,  H03F2203/45702

摘要： The invention relates to an amplifier circuit comprising supply terminals (12, 14) for supplying the circuit with first and second supply potentials (Vdd, Vss); a current path, which runs from the first supply terminal (12) via a first biased transistor (P1a, P1b), a first node (K1a, K1b), an input transistor (Q1a, Q1b), a second node (K2a, K2b) and a second biased transistor (N1a, N1b) to the second supply terminal (14), wherein a control terminal of the input transistor is loaded with an input signal (inp-inn), and wherein the second node (K2a, K2a) forms a pick-up in a resistor chain (R2a, R1, R2b), at whose ends is supplied an output signal (outp-outn) as a voltage drop; and a feedback stage enabling the current to flow the resistor chain (R2a, R1, R2b) dependent on the input signal (inp-inn) so that the current flowing through the input transistor (Q1a, Q1b) is essentially independent of the input signal (inp-inn), wherein the feedback stage has a pair of complementarily coupled transistors (P3a, N3a, P3b, N3b) with an intervening current output node (K3a, K3b). To increase the scope of application of such an amplifier and achieve a low noise amplification at a low current consumption, provision is made, according to the invention, for the complementarily coupled transistors (P3a, N3a, P3b, N3b) to be designed as FETs and the first node (K1a, K1b) to be connected on the one hand via a third biased transistor (N2a, N2b) to the second supply terminal (14) and on the other hand to a gate terminal of one (N3a, N3b) of the complementarily coupled transistors (P3a, N3a, P3b, N3b).

摘要翻译： 本发明涉及放大器电路，其包括用于向电路提供第一和第二电源电位（Vdd，Vss）的电源端子（12,14）。 从第一供电端子（12）经由第一偏置晶体管（P1a，P1b），第一节点（K1a，K1b），输入晶体管（Q1a，Q1b），第二节点（K2a，K2b） ）和第二偏置晶体管（N1a，N1b）到第二电源端子（14），其中输入晶体管的控制端加载有输入信号（in-inn），并且其中第二节点（K2a，K2a） 在电阻链（R2a，R1，R2b）中形成拾取器，其端部作为电压降提供输出信号（out-outn）; 以及反馈级，使得电流能够依赖于输入信号（inp-inn）流过电阻器链（R2a，R1，R2b），使得流过输入晶体管（Q1a，Q1b）的电流基本上与输入信号无关 （inp-inn），其中反馈级具有一对具有中间电流输出节点（K3a，K3b）的互补耦合晶体管（P3a，N3a，P3b，N3b）。 为了增加这种放大器的应用范围并且在低电流消耗下实现低噪声放大，根据本发明，提供将互补耦合晶体管（P3a，N3a，P3b，N3b）设计为FET 以及第一节点（K1a，K1b），一方面经由第三偏置晶体管（N2a，N2b）连接到第二供电端子（14），另一方面连接到一个（N3a，N3b）的栅极端子， 的互补耦合晶体管（P3a，N3a，P3b，N3b）。

公开(公告)号：US20080265992A1

公开(公告)日：2008-10-30

申请号：US12090710

申请日：2005-10-20

申请人： Mingquan Bao ,  Yinggang Li

发明人： Mingquan Bao ,  Yinggang Li

IPC分类号： H03F3/45

CPC分类号： H03F3/4508 ,  H03F1/3211 ,  H03F2200/216 ,  H03F2200/219 ,  H03F2203/45288 ,  H03F2203/45291

摘要： The present invention relates to a voltage-to-current transconductance stage arrangement comprising a single-ended input, an emitter-coupled pair of transistors, comprising a first transistor and a second transistor, the emitter of a third transistor, being connected to the collector of said first transistor, and differential output. It further comprises at least one common-collector transistor comprising a fourth transistor connected to the base of said second transistor preferably or optionally also and a fifth transistor connected to the base of said third transistor. The size of said fourth, or fourth and fifth transistors considerably exceed the sizes of said second and third transistors. They are biased at ‘off-state’. An extra inductor at the collector of the transistor may be applied to further increase linearity.

摘要翻译： 本发明涉及一种包括单端输入，发射极 - 耦合的晶体管对的电压 - 电流跨导级布置，包括第一晶体管和第二晶体管，第三晶体管的发射极连接到集电极 的所述第一晶体管，以及差分输出。 其还包括至少一个公共集电极晶体管，其包括连接到所述第二晶体管的基极的第四晶体管，优选地或可选地还有连接到所述第三晶体管的基极的第五晶体管。 所述第四或第四和第五晶体管的尺寸显着超过所述第二和第三晶体管的尺寸。 他们偏向于“偏离国家”。 可以施加晶体管的集电极处的额外的电感器以进一步增加线性度。

公开(公告)号：US20080197927A1

公开(公告)日：2008-08-21

申请号：US12150289

申请日：2008-04-25

申请人： David S. Ripley

发明人： David S. Ripley

IPC分类号： H03F3/45

CPC分类号： H03F3/45197 ,  H03F3/4508 ,  H03F2203/45008

摘要： According to one embodiment, a system for constant bandwidth DC offset correction in an amplifier includes a number of amplifier stages having an input and an output coupled together in series. The system for constant bandwidth DC offset correction further includes a number of DC offset correction feedback loops which include a variable gain transconductor coupled to an integration capacitor further coupled to a fixed gain transconductor. Each of the DC offset correction feedback loops are coupled to the input and output of each of the number of amplifier stages. The transconductance of the variable gain transconductor in each of the number of DC correction feedback loops is varied in relation to a gain of the number of amplifier stages, such that the DC offset correction feedback loops provide DC offset correction while maintaining a constant bandwidth.

摘要翻译： 根据一个实施例，在放大器中用于恒定带宽DC偏移校正的系统包括多个具有串联耦合在一起的输入和输出的放大器级。 用于恒定带宽DC偏移校正的系统还包括多个DC偏移校正反馈回路，其包括耦合到进一步耦合到固定增益跨导器的积分电容器的可变增益跨导体。 每个DC偏移校正反馈回路耦合到多个放大器级的每一个的输入和输出。 多个DC校正反馈回路中的每一个中的可变增益跨导体的跨导相对于放大器级数的增益而变化，使得DC偏移校正反馈回路在保持恒定带宽的同时提供DC偏移校正。