公开(公告)号：US20080220634A1

公开(公告)日：2008-09-11

申请号：US12031156

申请日：2008-02-14

Applicant: William L. Brodsky ,  Mark G. Clark ,  Amanda E.E. Mikhail ,  Arvind K. Sinha ,  Scott A. Shurson ,  Jason T. Stoll

Inventor： William L. Brodsky ,  Mark G. Clark ,  Amanda E.E. Mikhail ,  Arvind K. Sinha ,  Scott A. Shurson ,  Jason T. Stoll

IPC: H01R12/00

CPC classification number: H01R12/7011 ,  H01R12/716 ,  H01R12/721 ,  H01R13/514 ,  H05K1/181 ,  H05K2201/10189 ,  H05K2201/10537 ,  H05K2201/209 ,  Y02P70/611

Abstract: An electrical connector includes a first connector body having an interlocking feature extending therefrom. The interlocking feature interlocks the first connector body with a complimentary interlocking feature extending from an adjacent second connector body to distribute a lateral force on either the first or second connector bodies across the adjacent connector body thereby reducing a rotational moment at a base of each electrical connector connected to a printed circuit board (PCB).

Abstract translation: 电连接器包括具有从其延伸的互锁特征的第一连接器主体。 互锁特征将第一连接器主体与相邻的第二连接器主体相互延伸的互补互锁特征互锁，以将第二或第二连接器主体上的横向力分布在相邻的连接器本体上，从而减小每个电连接器的基座处的旋转力矩 连接到印刷电路板（PCB）。

公开(公告)号：US20080157317A1

公开(公告)日：2008-07-03

申请号：US11760182

申请日：2007-06-08

Applicant: Jae Sung OH

Inventor： Jae Sung OH

IPC: H01L23/02

CPC classification number: H05K1/147 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H05K1/141 ,  H05K2201/049 ,  H05K2201/10159 ,  H05K2201/10537 ,  H05K2203/1572 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A memory module includes a module substrate and a plurality of package units mounted to the module substrate such that they partially overlap each other. Each package unit has at least one memory semiconductor package attached thereto. Each package unit includes a flexible substrate, which has outer terminals provided over a lower surface adjacent to one edge thereof to form electrical connections with the module substrate, and the memory semiconductor package attached to one surface or each of both upper and lower surfaces of the flexible substrate.

Abstract translation: 存储器模块包括模块基板和安装到模块基板的多个封装单元，使得它们部分地彼此重叠。 每个封装单元具有至少一个连接到其上的存储器半导体封装。 每个封装单元包括柔性基板，其具有设置在与其一个边缘相邻的下表面上的外部端子，以形成与模块基板的电连接，并且存储器半导体封装件附接到所述模块基板的一个表面或两个上表面和下表面中的每一个 柔性基材。

公开(公告)号：US07145085B2

公开(公告)日：2006-12-05

申请号：US10972488

申请日：2004-10-21

Applicant: David Keating ,  Antoin Russell ,  Thomas H. Templeton, Jr. ,  Mysore Purushotham Divakar

Inventor： David Keating ,  Antoin Russell ,  Thomas H. Templeton, Jr. ,  Mysore Purushotham Divakar

IPC: H05K5/00

CPC classification number: H05K3/366 ,  H01R12/721 ,  H05K3/303 ,  H05K3/3421 ,  H05K7/1431 ,  H05K2201/10189 ,  H05K2201/10537 ,  H05K2203/0195 ,  H05K2203/082

Abstract: The invention provides a subassembly to facilitate co-planar vertical surface mounting of subassembly boards. By “vertically mounting” is meant that a subassembly circuit board with a major surface is mounted perpendicular to the major surface of a circuit motherboard. In accordance with the invention, a subassembly for co-planar vertical surface mounting comprises a subassembly board coupled between a pair of base headers. Advantageously one base header comprises a plurality of mounting lugs secured to a transverse element in a co-planar configuration. The other base header conveniently comprises a plurality of connector pins secured to an elongated header element in co-planar configuration. The two headers interlock with the board to provide connection and co-planar support. Edge metallization of the subassembly board can provide enhanced thermal or electrical connection to the underlying portions of one or more lugs.

Abstract translation: 本发明提供了一种子组件，以便于子组件板的共面垂直表面安装。 “垂直安装”是指具有主表面的子组装电路板垂直于电路母板的主表面安装。 根据本发明，用于共面垂直表面安装的子组件包括联接在一对基座之间的子组件板。 有利地，一个基座头部包括以共平面构造固定到横向元件的多个安装凸耳。 另一个基座头部方便地包括多个连接器销，该连接器销以共平面构造固定到细长的头部元件。 两个头部与电路板互锁以提供连接和共面支撑。 子组件板的边缘金属化可以提供与一个或多个凸耳的下面部分的增强的热或电连接。

公开(公告)号：US20060139831A1

公开(公告)日：2006-06-29

申请号：US10528040

申请日：2003-09-17

Applicant: Philipp Huemer ,  David Connett ,  Mike Morianz ,  Siegfried Fellner

Inventor： Philipp Huemer ,  David Connett ,  Mike Morianz ,  Siegfried Fellner

IPC: H02H5/04

CPC classification number: H05K3/301 ,  H01C1/022 ,  H04M3/18 ,  H05K2201/10022 ,  H05K2201/10537 ,  H05K2203/168

Abstract: An assembly includes a first electrical component having a first electrical property, a second electrical component having a second electrical property, where the first electrical property and the second electrical property are substantially identical, a housing that holds the first electrical component and the second electrical component, first terminals on the housing that contact the first electrical component, and second terminals on the housing that contact the second electrical component.

Abstract translation: 一种组件包括具有第一电性质的第一电气部件，具有第二电性能的第二电气部件，其中第一电性能和第二电气特性基本相同;壳体，其将第一电气部件和第二电气部件 壳体上接触第一电气部件的第一端子以及与第二电气部件接触的外壳上的第二端子。

公开(公告)号：US20060086522A1

公开(公告)日：2006-04-27

申请号：US10972488

申请日：2004-10-21

Applicant: David Keating ,  Antoin Russell ,  Thomas Templeton ,  Mysore Purushotham Divakar

Inventor： David Keating ,  Antoin Russell ,  Thomas Templeton ,  Mysore Purushotham Divakar

IPC: H05K5/00

CPC classification number: H05K3/366 ,  H01R12/721 ,  H05K3/303 ,  H05K3/3421 ,  H05K7/1431 ,  H05K2201/10189 ,  H05K2201/10537 ,  H05K2203/0195 ,  H05K2203/082

Abstract: The invention provides a subassembly to facilitate co-planar vertical surface mounting of subassembly boards. By “vertically mounting” is meant that a subassembly circuit board with a major surface is mounted perpendicular to the major surface of a circuit motherboard. In accordance with the invention, a subassembly for co-planar vertical surface mounting comprises a subassembly board coupled between a pair of base headers. Advantageously one base header comprises a plurality of mounting lugs secured to a transverse element in a co-planar configuration. The other base header conveniently comprises a plurality of connector pins secured to an elongated header element in co-planar configuration. The two headers interlock with the board to provide connection and co-planar support. Edge metallization of the subassembly board can provide enhanced thermal or electrical connection to the underlying portions of one or more lugs.

公开(公告)号：US20030040226A1

公开(公告)日：2003-02-27

申请号：US09932939

申请日：2001-08-21

Inventor： Chuen-Mao Lee

IPC: H01R009/22

CPC classification number: H05K3/306 ,  H01R13/514 ,  H05K2201/10189 ,  H05K2201/10537

Abstract: A sectional connector includes a main connector having pins in two rows, one or more first sub-connector having pins in one row, and a second sub-connector having pins in one row, sequentially connected through engagement of dovetail grooves and dovetail tenons correspondingly provided on side surfaces of the main connector and the sub-connectors in contact with one another. The sectional connector may substitute for conventional PC104 and PC104 PLUS industrial computer connectors having pins in 2null2 rows and pins in 2null2null4 rows, respectively, for connecting buses. Number of the first sub-connectors used in forming the sectional connector could be changed, depending on actual need in designing an industrial computer. The sectional connector enables easy and firm connecting and soldering of pins to a PC board row by row.

Abstract translation: 截面连接器包括具有两排销的主连接器，一个或多个第一子连接器，其具有一行中的销，以及具有一行中的销的第二子连接器，其相应地设置有与燕尾槽和燕尾榫接合的顺序连接 在主连接器和副连接器的侧表面上彼此接触。 分段连接器可以分别替代具有2 + 2行引脚和2 + 2 + 4行引脚的常规PC104和PC104 PLUS工业计算机连接器，用于连接总线。 根据设计工业计算机的实际需要，可以改变用于形成截面连接器的第一子连接器的数量。 截面连接器可以方便，牢固地连接并将引脚焊接到PC板逐行。

公开(公告)号：US20020031857A1

公开(公告)日：2002-03-14

申请号：US09944510

申请日：2001-08-30

Inventor： Larry D. Kinsman

IPC: H01L021/48

CPC classification number: H01L25/0657 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K3/3442 ,  H05K3/366 ,  H05K2201/10454 ,  H05K2201/10537 ,  Y02P70/613 ,  H01L2924/00

Abstract: A vertically mountable semiconductor device including a plurality of bond pads disposed proximate to a single edge thereof. The bond pads are bumped with an electrically conductive material. The semiconductor device may also include a support member. Alternatively, the semiconductor device may be laminated to one or more adjacent semiconductor devices. The present invention also includes a method of attaching the semiconductor device to a carrier substrate. Preferably, solder paste is applied to terminals on the carrier substrate. The semiconductor device is oriented vertically over the carrier substrate, such that the bumped bond pads align with their corresponding terminals. The bumps are placed into contact with the solder paste. The bumps and solder paste are then fused to form a joint between the each of the bond pads and their respective terminal, establishing an electrically conductive connection therebetween and imparting structural stability to the semiconductor device.

Abstract translation: 一种垂直安装的半导体器件，包括靠近其单个边缘设置的多个接合焊盘。 接合焊盘用导电材料凸起。 半导体器件还可以包括支撑构件。 或者，半导体器件可以层压到一个或多个相邻的半导体器件。 本发明还包括将半导体器件附着到载体衬底的方法。 优选地，将焊膏施加到载体基板上的端子。 半导体器件垂直地定向在载体衬底上，使得凸起的焊盘与其相应的端子对准。 凸块与焊膏接触。 然后将凸块和焊膏熔合以形成每个接合焊盘及其相应端子之间的接头，在其间形成导电连接，并赋予半导体器件结构稳定性。

公开(公告)号：US6140696A

公开(公告)日：2000-10-31

申请号：US14053

申请日：1998-01-27

Applicant: Larry D. Kinsman

Inventor： Larry D. Kinsman

IPC: H01L25/065 ,  H05K3/34 ,  H05K3/36 ,  H01L23/02 ,  H01L23/48 ,  H01L23/52 ,  H05K7/02

CPC classification number: H01L25/0657 ,  H05K3/3442 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10537 ,  H05K3/366 ,  Y02P70/613

Abstract: A vertically mountable semiconductor device including a plurality of bond pads disposed proximate to a single edge thereof. The bond pads are bumped with an electrically conductive material. The semiconductor device may also include a support member. Alternatively, the semiconductor device may be laminated to one or more adjacent semiconductor devices. The present invention also includes a method of attaching the semiconductor device to a carrier substrate. Preferably, solder paste is applied to terminals on the carrier substrate. The semiconductor device is oriented vertically over the carrier substrate, such that the bumped bond pads align with their corresponding terminals. The bumps are placed into contact with the solder paste. The bumps and solder paste are then fused to form a joint between each of the bond pads and respective terminal, establishing an electrically conductive connection therebetween and imparting structural stability to the semiconductor device.

Abstract translation: 一种垂直安装的半导体器件，包括靠近其单个边缘设置的多个接合焊盘。 接合焊盘用导电材料凸起。 半导体器件还可以包括支撑构件。 或者，半导体器件可以层压到一个或多个相邻的半导体器件。 本发明还包括将半导体器件附着到载体衬底的方法。 优选地，将焊膏施加到载体基板上的端子。 半导体器件垂直地定向在载体衬底上，使得凸起的焊盘与其相应的端子对准。 凸块与焊膏接触。 然后将凸块和焊膏熔合以在每个接合焊盘及其相应的端子之间形成接头，在其间形成导电连接并赋予半导体器件结构稳定性。

公开(公告)号：US5936840A

公开(公告)日：1999-08-10

申请号：US963142

申请日：1997-11-03

Applicant: Malhi Satwinder

Inventor： Malhi Satwinder

IPC: H05K1/02 ,  H05K1/18 ,  H05K7/02

CPC classification number: H05K7/023 ,  H05K1/023 ,  H05K1/181 ,  H05K2201/10537 ,  H05K2201/10636 ,  Y02P70/611

Abstract: The invention is component module (20) for combining a plurality of components (21, 23, 25, 27 and 29)into a single module (20) for use with a printed wiring board. A plurality of components, each component having a pair of contacts (21a,21b), are formed into the module with a plurality of insulating spacers (2,24,26 and 28). There is one spacer between adjacent components, said spacers serving to insulate adjacent components from each other and to secure the components together to form the module.

Abstract translation: 本发明是用于将多个部件（21,23,25,27和29）组合成用于与印刷线路板一起使用的单个模块（20）的部件模块（20）。 具有一对触点（21a，21b）的每个部件的多个部件被形成为具有多个绝缘间隔件（2,24,26和28）的模块。 相邻部件之间有一个间隔件，所述间隔件用于将相邻部件彼此绝缘并将部件固定在一起以形成模块。

公开(公告)号：US5790381A

公开(公告)日：1998-08-04

申请号：US808406

申请日：1997-02-28

Applicant: Nour Eddine Derouiche ,  Scott Jewler

Inventor： Nour Eddine Derouiche ,  Scott Jewler

IPC: H01R13/514 ,  H05K3/30 ,  H05K7/10 ,  H05K7/02 ,  H01L23/34 ,  H05K7/12

CPC classification number: H01R13/514 ,  H01R12/716 ,  H05K3/306 ,  H05K7/103 ,  H01L2924/0002 ,  H05K2201/10325 ,  H05K2201/10454 ,  H05K2201/10537

Abstract: SIP or ZIP packages are provided with locking elements of snap fasteners, or have package alignment tabs to combine several IC packages into an IC package assembly. Using a DIP printed circuit board socket, a high density DIP module, for example, a high capacity memory chip, is assembled. The leads of the module are inserted into a motherboard that carries the external conductors to be connected with the inner circuits of the package assembly, and soldered to the motherboard. To make the IC package assembly compatible with a conventional DIP socket, a plastic spacer can be provided between the IC packages. A retaining clip may be used to allow the IC package assembly to be repeatedly inserted and removed to and from the socket without the risk of falling apart.

Abstract translation: SIP或ZIP封装设置有卡扣紧固件的锁定元件，或具有封装对准突片，以将多个IC封装组合成IC封装组件。 使用DIP印刷电路板插座，组装高密度DIP模块，例如高容量存储芯片。 将模块的引线插入到主板上，该主板将外部导体与封装组件的内部电路连接，并焊接到主板上。 为了使IC封装组件与常规DIP插座兼容，可以在IC封装之间提供塑料间隔件。 可以使用固定夹来允许IC封装组件被反复地插入插座中并从插座移除，而不会有分离的危险。