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公开(公告)号：US4703448A
公开(公告)日：1987-10-27
申请号：US664857
申请日：1984-10-25
CPC分类号： G01R25/08
摘要： A method for measuring channel-to-channel skew or phase difference in an electronic system of the type having a plurality of input channels which are sampled by sampling pulses having a frequency f.sub.o and a period P.sub.o. The sampling pulses at each input channel are first mixed with a reference signal having a frequency f.sub.r and a period P.sub.r that differ from the frequency and period of the sampling pulses. The mixing produces a beat signal at each input channel. A quantity termed "effective measurement interval" which is equal to the difference of the periods of the sampling pulses, P.sub.o, and the reference signal, P.sub.r, is computed. A quantity termed "apparent skew" which is equal to the number of periods P.sub.o of the sampling pulses which represents the skew or phase difference between the beat signals is also determined. Finally, skew or phase difference of the sampling pulses is computed by multiplying the "effective measurement interval" by the "apparent skew".
摘要翻译： 一种用于测量具有通过具有频率fo和周期Po的采样脉冲采样的多个输入通道的类型的电子系统中的信道到信道偏移或相位差的方法。 首先将每个输入通道处的采样脉冲与具有与采样脉冲的频率和周期不同的频率fr和周期Pr的参考信号混合。 混合在每个输入通道产生拍频信号。 计算称为“有效测量间隔”的数量等于采样脉冲Po和参考信号Pr的周期的差。 称为“视在偏斜”的数量等于表示差分信号之间的偏差或相位差的采样脉冲的周期数Po的数量。 最后，通过将“有效测量间隔”乘以“明显偏斜”来计算采样脉冲的偏差或相位差。
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42.发明授权
公开(公告)号：US4506175A
公开(公告)日：1985-03-19
申请号：US408143
申请日：1982-08-18
IPC分类号： G01R19/14 , G01R25/08 , H03K19/094 , H03K19/21
摘要： A phase detector for digital signals, such as television sync signals, provides a signed short path output of the phase difference between the signals. It features a means for determining which of the signals is leading and lagging, which means also provides the sign signal. A window signal is generated and clock pulses are counted during the duration of this signal. A register can provide an exact phase difference measurement or a coarse/fine output signal can be provided.
摘要翻译： 用于诸如电视同步信号的数字信号的相位检测器提供信号之间的相位差的符号短路径输出。 它具有用于确定哪个信号是前导和滞后的装置，这也意味着还提供了符号信号。 产生窗口信号，并在该信号的持续时间内对时钟脉冲进行计数。 寄存器可以提供精确的相位差测量，或者可以提供粗/精输出信号。
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43.发明授权
公开(公告)号：US4471299A
公开(公告)日：1984-09-11
申请号：US509979
申请日：1983-06-30
申请人： Herbert Elmis
发明人： Herbert Elmis
CPC分类号： G01R25/08 , G01S3/8055 , H03L7/0992 , H04N5/12
摘要： A circuit for digitally evaluating the magnitude of the phase error between a reference and a locally generated train (sequence) of pulses. The reference train (sequence) may be, for example, the received horizontal sync pulse in a television receiver and the locally generated synchronizable horizontal trigger of the receiver. The reference pulse train (sequence) contains statistical noise and noise pulses and by multiple phase error sampling (digital) and averaging a much more accurate phase error measurement is obtained. Circuits for directly synchronizing the local trigger generator from the measured phase error are also included.
摘要翻译： 用于数字评估参考和本地产生的脉冲序列（序列）之间的相位误差的大小的电路。 参考列（序列）可以是例如电视接收机中的接收到的水平同步脉冲和接收机的本地产生的可同步的水平触发。 参考脉冲串（序列）包含统计噪声和噪声脉冲，并通过多相位误差采样（数字）和平均得到更准确的相位误差测量。 还包括用于从测量的相位误差直接同步本地触发发生器的电路。
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公开(公告)号：US4052676A
公开(公告)日：1977-10-04
申请号：US694770
申请日：1976-06-10
IPC分类号： F02D41/14 , G01P3/60 , G01R23/06 , G01R29/027 , G05D13/62 , H02P23/00 , H03K5/26 , H03L7/08 , H03L7/085 , H03D3/02 , G01R25/08
CPC分类号： G01R29/027 , G01P3/60 , H02P23/16
摘要： A frequency or speed error circuit for producing a dc. voltage which in polarity and magnitude varies according to the sense and the size of the error between a variable input frequency and a set point frequency. The period of successive cycles of the variable frequency incoming signal is digitally compared with a fixed, predetermined time interval measured off by a precision standard interval generator to produce pulses which vary in width according to the magnitude of the error. The latter pulses are treated as negative or positive when the variable period is shorter or longer than the standard time interval, and are algebraically summed by an operational amplifier having a filter to produce the dc. voltage with a magnitude corresponding to the average of the summed pulses. A deadband is created by optional devices added to the digital comparator. Infinitely fine resolution is achieved by the gating and counter components of the standard time interval generator, thereby to avoid the ambiguity of a measured standard interval possibly being other than an integral multiple of the period of precision frequency clock pulses.
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公开(公告)号：US3849671A
公开(公告)日：1974-11-19
申请号：US25337772
申请日：1972-05-15
申请人： DYNELL ELEC
发明人： MOLACK M
摘要： This phase detector circuitry is operative to compare different binary signals of known repetition rate, recurring in discrete time intervals with a digitally created reference signal. Comparison is accomplished with a logic OR gate which controls a reversible counter that in turn provides an output used to modify the phase of the reference signal.
摘要翻译： 该相位检测器电路用于比较具有已知重复率的不同二进制信号，在离散时间间隔内与数字创建的参考信号重复。 比较是通过控制可逆计数器的逻辑或门完成的，该可逆计数器又提供用于修改参考信号的相位的输出。
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46.发明授权
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公开(公告)号：US11640197B2
公开(公告)日：2023-05-02
申请号：US17605553
申请日：2020-03-02
申请人： OMRON Corporation
发明人： Hitoshi Oba , Masaya Kudo
IPC分类号： G06F1/32 , G06F1/3287 , G01R25/08 , G06F1/3215
摘要： Provided is a counter unit capable of supporting any output apparatus of single-phase output, two-phase output, or three-phase output without waste. A counter unit (10) is provided with: a plurality of signal input terminals to which pulse signals outputted from a plurality of external output apparatuses (50) are respectively inputted; input circuits (21a to 21f) respectively connected to the plurality of signal input terminals; a single-phase counter (13) that performs count on the basis of a single-phase pulse signal, and a multi-phase counter (15) that performs count on the basis of a multi-phase pulse signal; and a switching part (16) that switches whether the input circuits (21a to 21f) are connected to the single-phase counter (13) or the multi-phase counter (15).
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公开(公告)号：US20220121266A1
公开(公告)日：2022-04-21
申请号：US17605553
申请日：2020-03-02
申请人： OMRON Corporation
发明人： Hitoshi OBA , Masaya KUDO
IPC分类号： G06F1/3287 , G06F1/3215 , G01R25/08
摘要： Provided is a counter unit capable of supporting any output apparatus of single-phase output, two-phase output, or three-phase output without waste. A counter unit (10) is provided with: a plurality of signal input terminals to which pulse signals outputted from a plurality of external output apparatuses (50) are respectively inputted; input circuits (21a to 21f) respectively connected to the plurality of signal input terminals; a single-phase counter (13) that performs count on the basis of a single-phase pulse signal, and a multi-phase counter (15) that performs count on the basis of a multi-phase pulse signal; and a switching part (16) that switches whether the input circuits (21a to 21f) are connected to the single-phase counter (13) or the multi-phase counter (15).
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公开(公告)号：US20190033355A1
公开(公告)日：2019-01-31
申请号：US16002373
申请日：2018-06-07
申请人： SOCIONEXT INC.
发明人： Albert Hubert DORNER , Martin Wahle
摘要： The present disclosure relates to phase measurement circuitry operable based on a first clock signal having an intended clock frequency F1 and a second clock signal having an intended clock frequency F2, the circuitry comprising: a delay line configured to receive the first clock signal, the delay line comprising a plurality of delay units each configured to cause a propagation delay, and the plurality of delay units connected in series along the length of the delay line and defining a series of positions therebetween through which signal edges of the first clock signal propagate over time; an edge detector configured to sample the delay line at successive sample times based on the second clock signal and to record at each sample time the position of a given signal edge of the first clock signal along the delay line; and a phase angle determiner configured to determine a phase angle per delay unit based on successive recorded said positions.
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公开(公告)号：US09927474B1
公开(公告)日：2018-03-27
申请号：US15249840
申请日：2016-08-29
CPC分类号： G01R25/08
摘要： A method and device for sorting grounded electrical conductors according to phase. Different high-current pulsed sequences are applied to each of the electrical conductors of a first three-phase conductor in an electrical power network. Pulsed current sequences applied to the three electrical conductors of the first conductor, seeking an electrical ground, will be detectable on the electrical conductors of each of the conductors in parallel with the electrical conductors of the first conductor. A detector detects a magnetic-pulsed sequence associated with the current-pulsed sequences on the electrical conductors and matches it to one of the corresponding current-pulsed sequences on the electrical conductors of the first three-phase conductor, thereby decoding the sequence to identify the phases of each of the conductors. Each electrical conductor is then tagged with its phase before the conductor network is ungrounded and energized.
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