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公开(公告)号：US08736251B2
公开(公告)日：2014-05-27
申请号：US13616606
申请日：2012-09-14
申请人： Kelvin Yi-Tse Lai , Chen-Yi Lee
发明人： Kelvin Yi-Tse Lai , Chen-Yi Lee
CPC分类号： G01R23/15 , G01D5/243 , G01P15/125 , G01P21/00 , G01R23/10 , G01R25/08 , G01R29/023 , G01R29/027
摘要： A digital sensing apparatus includes a sensing unit capable of providing a sensing response associated with an environmental parameter, and a digital readout module including a reading unit for generating a pulse signal having a pulse width associated with the sensing response, and a converting unit. The converting unit includes a clock signal generator for generating a variable-frequency clock signal, and a counter operable to count a width value of the pulse width of the pulse signal using the clock signal, so as to generate a digital sensing code. The frequency of the clock signal from the clock signal generator is adjustable to adjust resolution of the width value of the pulse width of the pulse signal.
摘要翻译： 数字感测装置包括能够提供与环境参数相关联的感测响应的感测单元和包括用于产生具有与感测响应相关联的脉冲宽度的脉冲信号的读取单元的数字读出模块和转换单元。 转换单元包括用于产生可变频率时钟信号的时钟信号发生器和可用于使用时钟信号对脉冲信号的脉冲宽度的宽度值进行计数的计数器，以便产生数字感测代码。 来自时钟信号发生器的时钟信号的频率可调，以调节脉冲信号脉冲宽度宽度值的分辨率。
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公开(公告)号：US5723989A
公开(公告)日：1998-03-03
申请号：US648064
申请日：1996-05-17
CPC分类号： G01R25/08
摘要： A device for determining the phase difference between a first and a second digital input signal (S1, S2) is disclosed. In a first embodiment, a clock signal (CLOCK) is supplied as a first counting signal (18) to a first counter (16), which is reset by the appearance of a predetermined edge (31) of the first input signal (S1). This embodiment permits phase measurement values in the range between zero and 360.degree. to be generated at a high measurement rate. In second and third embodiments, which are preferably connected and, if desired, combined with the first embodiment, second and third switching signals (FORWARD, BACK) are generated from the digital input signals (S1, S2) and are supplied to a forward-backward counter (20). The second and third embodiments are suited for determining phase differences between the two digital input signals (S1, S2) which are multiples of 360.degree.. The device in accordance with the invention is particularly suited for evaluating the phase difference which occurs between the output signals from two photoelectric detectors used in a heterodyne interferometer.
摘要翻译： PCT No.PCT / DE94 / 01325 Sec。 371日期1996年5月17日 102（e）日期1996年5月17日PCT 1994年11月9日PCT PCT。 出版物WO95 / 14236 日期：1995年5月26日公开了一种用于确定第一和第二数字输入信号（S1，S2）之间的相位差的装置。 在第一实施例中，将时钟信号（CLOCK）作为第一计数信号（18）提供给第一计数器（16），该第一计数器由第一输入信号（S1）的预定边沿（31）的外观复位， 。 该实施例允许以高测量速率产生在零度和360度之间的范围内的相位测量值。 在第二和第三实施例中，优选地连接，并且如果需要，与第一实施例组合，从数字输入信号（S1，S2）产生第二和第三开关信号（FORWARD，BACK），并且被提供给前向 - 向后计数器（20）。 第二和第三实施例适用于确定作为360°倍数的两个数字输入信号（S1，S2）之间的相位差。 根据本发明的装置特别适用于评估在外差干涉仪中使用的两个光电探测器的输出信号之间发生的相位差。
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公开(公告)号：US5432826A
公开(公告)日：1995-07-11
申请号：US115411
申请日：1993-08-31
申请人： Klaus-Hartwig Rieder
发明人： Klaus-Hartwig Rieder
CPC分类号： G01R25/08 , H03D13/001 , H03L7/089
摘要： A digital phase comparator measures the phase difference of two signals (S1, S3) from a third signal (S2), and calculates the difference. The zero crossing of the two signals respectively sets two flip-flops (11, 12). If both flip-flops are set, they are simultaneously reset with a delay. Each set flip-flop enables a corresponding counter (13, 14). An evaluation unit averages the counter outputs at major intervals. The phase comparator can be incorporated into a phase-locked loop.
摘要翻译： 数字相位比较器测量来自第三信号（S2）的两个信号（S1，S3）的相位差，并计算差值。 两个信号的过零点分别设置两个触发器（11,12）。 如果两个触发器都被设置，它们将同时被延迟复位。 每个设置的触发器使能相应的计数器（13,14）。 评估单元以主间隔平均计数器输出。 相位比较器可以并入锁相环。
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公开(公告)号：US5289135A
公开(公告)日：1994-02-22
申请号：US909211
申请日：1992-07-06
摘要： A pulse phase difference encoding circuit provides a digital signal indicating a phase difference between a first input pulse and a second input pulse. The first input pulse is provided to and circulated in a ring signal delay circuit having a plurality of signal delay elements that are connected in series. Intermediate points between the delay elements provide delayed pulses having different delay times. Upon receiving the second input pulse, a selector selects one delay pulse provided by the delay element at which the first input pulse has arrived, and generates a digital positional signal indicating a position of the selected delay element. The number of rounds of circulation of the first input pulse in the ring signal delay circuit is separately counted. According to the number of rounds of circulation of the first pulse and the positional signal, the digital signal indicating the phase difference between the first and second input pulses is formed.
摘要翻译： 脉冲相位差编码电路提供指示第一输入脉冲和第二输入脉冲之间的相位差的数字信号。 将第一输入脉冲提供给具有串联连接的多个信号延迟元件的环形信号延迟电路并循环。 延迟元件之间的中间点提供具有不同延迟时间的延迟脉冲。 在接收到第二输入脉冲时，选择器选择由第一输入脉冲到达的延迟元件提供的一个延迟脉冲，并产生指示所选择的延迟元件的位置的数字位置信号。 环路信号延迟电路中的第一输入脉冲的循环次数被分开计数。 根据第一脉冲的循环次数和位置信号，形成表示第一和第二输入脉冲之间的相位差的数字信号。
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公开(公告)号：US4951300A
公开(公告)日：1990-08-21
申请号：US332528
申请日：1989-03-31
申请人： Kazumasa Koike
发明人： Kazumasa Koike
CPC分类号： G01D5/24404
摘要： This invention relates to a precise position device, particularly to such device in which an insensitive zone of an absolute signal consisting of a stepped analog signal formed on the basis of the two-phase incremental position detection signal obtained from an encoder section is eliminated, and an output signal having an approximately linear form may be obtained.
摘要翻译： 本发明涉及一种精确位置装置，特别涉及这样的装置，其中消除了由基于从编码器部分获得的两相增量位置检测信号形成的由阶梯式模拟信号组成的绝对信号的不敏感区域，以及 可以获得具有近似线性形式的输出信号。
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公开(公告)号：US4751468A
公开(公告)日：1988-06-14
申请号：US858428
申请日：1986-05-01
申请人： Agoston Agoston
发明人： Agoston Agoston
CPC分类号： G01R25/005 , G01R25/08
摘要： A tracking sample and hold phase detector operating as an error sampled feedback loop which takes signal samples during successive periods of an input signal with a sampling gate, holds the signal sample in a storage gate, and feeds back the sample to the sampling gate to allow the bias of the sampling gate to track the input signal level, thereby maintaining balance of the tracking circuit. A fast comparator detects the zero crossing level of the downconverted signal which is comprised of successive signal sample steps and has the shape of the input signal. The sampling gate comprises a diode bridge enabled by a balanced strobe, the input signal and the strobe being close or equal in frequency, the frequency of the downconverted signal being the difference frequency.
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7.发明授权
公开(公告)号：US4547777A
公开(公告)日：1985-10-15
申请号：US347354
申请日：1982-02-09
申请人： Christian Lamiraux
发明人： Christian Lamiraux
摘要： A method of radio-position-finding by means of mapped contour lines of iso-phase shift between two radio-frequency waves separated by a low frequency and transmitted by a group of foci stations also emitting a reference wave associated with said two radio-frequency waves and modulated upon said low frequency, consisting in determining in a receiver set the low frequency from which fundamental frequencies are received and as a reference value the low frequency which is modulated upon the reference wave and defines through comparison of the values thus obtained the relative phase shift of both fundamental frequencies, and likewise determining the phase shift between the fundamental waves transmitted by another group of foci stations, and comprising the steps of using one single receiving channel, determining during successive periods the low frequencies from the fundamental waves and the low reference frequencies, correcting through computation the values thus obtained for removing the shift in time and then comparing the values corresponding after their correction to the same times for obtaining the phase shifts.
摘要翻译： 一种借助于通过低频分离并由一组焦点站发射的两个射频波之间的相位偏移的映射轮廓线进行无线电位置查找的方法，其还发射与所述两个射频相关联的参考波 波和调制在所述低频上，包括在接收机中确定接收基频的低频，以及作为参考值的参考值，该参考值是在参考波上调制的低频，并且通过比较由此得到的相对值 同时确定由另一组焦点站发射的基波之间的相移，并且包括使用一个单个接收信道的步骤，在连续周期期间确定来自基波的低频和低频 参考频率，通过计算校正由此获得的用于去除s的值 然后将其校正后对应的值与相同时间进行比较，以获得相移。
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公开(公告)号：US4527080A
公开(公告)日：1985-07-02
申请号：US514476
申请日：1983-07-18
申请人： Walter L. Zweig
发明人： Walter L. Zweig
CPC分类号： G01R25/08 , G01R23/15 , Y10T307/735
摘要： A digital phase and frequency comparator circuit establishes phase and frequency windows to determine if two AC signals are in phase and of substantially the same frequency. A phase difference between the two signals is determined by exclusively ORing the two signals and timing the duration of a signal state to determine if the phase difference exceeds a threshold. The two AC signals are also ANDed and counted to determine the frequency agreement.
摘要翻译： 数字相位和频率比较器电路建立相位和频率窗口，以确定两个AC信号是同相且基本相同的频率。 两个信号之间的相位差通过对这两个信号进行异或运算并且对信号状态的持续时间进行定时来确定相位差是否超过阈值来确定。 两个AC信号也被进行AND并计数以确定频率协议。
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公开(公告)号：US4408165A
公开(公告)日：1983-10-04
申请号：US321831
申请日：1981-11-16
申请人： Reinhold Braun
发明人： Reinhold Braun
摘要： The invention relates to a digital phase detector for use with a phase-locked loop (PLL) system, to which there is fed a reference signal and a comparison signal and which, in accordance with the phase difference transmits an output signal for controlling a voltage-controlled oscillator (VCO). In conventional types of phase detectors there exists the danger that subsequently to a failure or interruption of the reference signal, the phase detector in certain cases controls the phase difference, following the restarting, not to zero but to 2.pi.. In order to prevent this, the invention proposes the phase detector to be preceded by a correction circuit delaying the switching of the signals to the phase detector, following the restarting of the reference signal, in such a way that the trailing edge of the reference signal is applied to the phase detector either simultaneously with or with a time delay after the trailing edge of the comparison signal. In this way, independently of the phase difference, and subsequently to the restarting of the reference signal, it is safeguarded that the phase difference is controlled to zero.
摘要翻译： 本发明涉及一种与锁相环（PLL）系统一起使用的数字相位检测器，馈送参考信号和比较信号，并且根据相位差发送用于控制电压的输出信号 控制振荡器（VCO）。 在常规类型的相位检测器中，存在随着参考信号的故障或中断的危险，相位检测器在某些情况下控制重启之后的相位差不为零但是为2π。 为了防止这种情况，本发明提出了相位检测器之前是在参考信号重新启动之后延迟将信号切换到相位检测器的校正电路，使得参考信号的后沿 在比较信号的后沿之后或者与时间延迟同时地或相加于相位检测器。 以这种方式，独立于相位差，并且随后重新启动参考信号，保护相位差被控制为零。
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公开(公告)号：US4181949A
公开(公告)日：1980-01-01
申请号：US889654
申请日：1978-03-24
申请人： Henry P. Hall
发明人： Henry P. Hall
CPC分类号： G01R25/08 , H03M1/1255 , H03M1/0614 , H03M1/52
摘要： This disclosure is concerned with novel approximations to sine-wave sampling by successive measurements and digital conversion in phase-sensitive detection circuits, simplifying switching requirements and providing harmonic immunity.
摘要翻译： 本公开涉及通过连续测量和相敏检测电路中的数字转换的正弦波采样的新颖近似，简化了开关要求并提供了谐波抗扰度。
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