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    Shut-off circuitry having temperature stable threshold current sensing
    44.
    发明授权
    Shut-off circuitry having temperature stable threshold current sensing 有权
    具有温度稳定阈值电流检测的关断电路

    公开(公告)号：US09479042B1

    公开(公告)日：2016-10-25

    申请号：US14483294

    申请日：2014-09-11

    Applicant: Maxim Integrated Products, Inc.

    Inventor： Vitali Souchkov

    IPC: G05F1/00 ,  G05F3/04 ,  G05F3/08 ,  G05F3/16 ,  G05F3/20 ,  H02M1/08 ,  H02M1/00

    CPC classification number: H02M1/08 ,  H02M3/156 ,  H02M2001/0003 ,  H02M2001/0009 ,  H03K17/302 ,  H03K2217/0027

    Abstract: A circuit is described that provides low power and temperature stability in a compact design. In one or more implementations of the present disclosure, the circuit includes a current sensing element configured for generating a voltage drop based upon a current generated by a current source through a load. The circuit also includes an asymmetric differential circuit for generating a differential output based upon the voltage drop. The circuit also includes an amplifier electrically coupled to the asymmetric differential circuit, the amplifier for generating a single-ended output based upon the differential output, and a flip-flop module that transitions between a first state and a second state based upon the single-ended output. The flip-flop module controls operation of a switch, and the switch controls current flow to the load.

    Abstract translation: 描述了在紧凑设计中提供低功率和温度稳定性的电路。 在本公开的一个或多个实现中，电路包括电流感测元件，其被配置为基于由电流源通过负载产生的电流来产生电压降。 电路还包括用于基于电压降产生差分输出的非对称差分电路。 电路还包括电耦合到非对称差分电路的放大器，用于基于差分输出产生单端输出的放大器，以及基于单频输出的第一状态和第二状态之间转换的触发器模块， 结束输出。 触发器模块控制开关的操作，并且开关控制到负载的电流。

    Silicon-on-insulator-based voltage generation circuit
    45.
    发明授权
    Silicon-on-insulator-based voltage generation circuit 有权
    基于硅绝缘体的电压产生电路

    公开(公告)号：US09438105B2

    公开(公告)日：2016-09-06

    申请号：US14747711

    申请日：2015-06-23

    Applicant: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.

    Inventor： Yang Li ,  Yaohui Guo ,  Jian Sun

    IPC: H02M3/07 ,  G05F3/20

    CPC classification number: H02M3/07 ,  G05F3/205 ,  H02M2003/071

    Abstract: A silicon-on-insulator (SOI) based positive/negative voltage generation circuit includes: an inverter including an NMOS transistor and a PMOS transistor, a first transfer capacitor coupled to the PMOS transistor, a first output capacitor, a second transfer capacitor coupled to the NMOS transistor, a second output capacitor, a first diode disposed between the first transfer capacitor and the first output capacitor, a second diode disposed between the second transfer capacitor and the second output capacitor, one end of the first output capacitor is coupled to the ground, one end of the second output capacitor is coupled to the ground; wherein an output voltage of the inverter is controlled by a single-phase clock to flip periodically, charge the first transfer capacitor through a parasitic diode of the PMOS transistor, and charge the second transfer capacitor through a parasitic diode of the NMOS transistor.

    Abstract translation: 一种基于绝缘体上硅（SOI）的正/负电压产生电路包括：包括NMOS晶体管和PMOS晶体管的反相器，耦合到PMOS晶体管的第一转移电容器，第一输出电容器，耦合到 NMOS晶体管，第二输出电容器，设置在第一转移电容器和第一输出电容器之间的第一二极管，设置在第二转移电容器和第二输出电容器之间的第二二极管，第一输出电容器的一端耦合到 接地，第二输出电容器的一端耦合到地; 其中逆变器的输出电压由单相时钟控制以周期性地翻转，通过PMOS晶体管的寄生二极管对第一转移电容器充电，并通过NMOS晶体管的寄生二极管对第二转移电容器充电。

    Differential output circuit and semiconductor device
    46.
    发明授权
    Differential output circuit and semiconductor device 有权
    差分输出电路和半导体器件

    公开(公告)号：US09423815B2

    公开(公告)日：2016-08-23

    申请号：US14827641

    申请日：2015-08-17

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Masafumi Mitsuishi ,  Masayasu Komyo ,  Souji Sunairi

    IPC: H03K19/0175 ,  H03K19/094 ,  G05F3/20 ,  H03F3/45 ,  H01L29/06 ,  H01L27/06 ,  H01L27/02 ,  G05F3/24 ,  H03F1/52 ,  H04L25/02

    CPC classification number: G05F3/205 ,  G05F3/24 ,  H01L27/0207 ,  H01L27/0629 ,  H01L29/0653 ,  H03F1/523 ,  H03F3/45179 ,  H03F3/45188 ,  H03F3/45632 ,  H04L25/0272 ,  H04L25/028

    Abstract: A semiconductor device and a highly reliable circuit are realized using the transistors having a lower withstand voltage. There are provided a differential pair including a first and a second transistor which respectively receive input signals having mutually reversed phases; a third and a fourth transistor respectively cascode-coupled to the first and the second transistor, and having the same conductivity type as the first and the second transistor; a first and a second output terminal coupled to respective drains of the third and the fourth transistor; and a voltage divider circuit which divides an intermediate potential between respective potentials of the first and the second output terminal and supplies the divided potential to gates of the third and the fourth transistor.

    Abstract translation: 使用具有较低耐受电压的晶体管实现半导体器件和高可靠性电路。 提供了一个差分对，其包括分别接收具有相互反相的输入信号的第一和第二晶体管; 分别与第一和第二晶体管并联耦合的第三和第四晶体管，并且具有与第一和第二晶体管相同的导电类型; 耦合到第三和第四晶体管的相应漏极的第一和第二输出端子; 以及分压器电路，其分割第一和第二输出端子的各个电位之间的中间电位，并将分压电位提供给第三和第四晶体管的栅极。

    Reference circuit arrangement and method for generating a reference voltage using a branched current path
    47.
    发明授权
    Reference circuit arrangement and method for generating a reference voltage using a branched current path 有权
    参考电路布置和使用分支电流路径产生参考电压的方法

    公开(公告)号：US09317057B2

    公开(公告)日：2016-04-19

    申请号：US14236065

    申请日：2012-07-30

    Applicant: Lorenzo Paglino ,  Simone Verri

    Inventor： Lorenzo Paglino ,  Simone Verri

    IPC: G05F3/16 ,  G05F3/20 ,  G05F3/30 ,  G05F3/26

    CPC classification number: G05F3/262 ,  G05F3/16 ,  G05F3/20 ,  G05F3/26 ,  G05F3/30

    Abstract: Reference circuit arrangement according to this invention comprises a branched current path (BE) connecting a first and second terminal (T+, T−) via an intermediate terminal (TN). The intermediate terminal (TN) is connected to a reference terminal (GND). A current path (PTAT) is coupled between the first and second terminal (T+, T−) via the reference terminal (GND). A feedback loop (FB) is connected to the first and second terminal (T+, T−) and designed to control, at the first and second terminal (T+, T−), a virtual ground potential. A reference path (REF) is connected to the feedback loop (FB) having a reference input for receiving from the feedback loop a reference current (Iref) and reference output (Vref) to provide a reference voltage.

    Abstract translation: 根据本发明的参考电路装置包括经由中间端子（TN）连接第一和第二端子（T +，T）的分支电流路径（BE）。 中间端子（TN）连接到参考端子（GND）。 电流路径（PTAT）通过参考端（GND）耦合在第一和第二端（T +，T-）之间。 反馈回路（FB）连接到第一和第二端子（T +，T），并被设计成在第一和第二端子（T +，T）处控制虚拟接地电位。 参考路径（REF）连接到具有用于从反馈回路接收参考电流（Iref）和参考输出（Vref）的参考输入的反馈回路（FB），以提供参考电压。

    Current generator circuit and methods for providing an output current
    48.
    发明授权
    Current generator circuit and methods for providing an output current 有权
    电流发生器电路和提供输出电流的方法

    公开(公告)号：US09244479B2

    公开(公告)日：2016-01-26

    申请号：US14448444

    申请日：2014-07-31

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Aaron Willey

    IPC: G05F3/22 ,  G05F3/26 ,  G05F3/20

    CPC classification number: G05F3/262 ,  G05F3/20

    Abstract: Current circuits, circuits configured to provide a bias voltage, and methods for providing a bias voltage are described, including a current circuit configured to receive a reference current and having an output at which an output current is provided. One such current circuit includes a first current mirror configured to receive a first portion of the reference current and further configured to mirror the first portion of the reference current to provide a first current. The current circuit further includes a second current mirror configured to receive a second portion of the reference current and receive the first current. The second current mirror is further configured to provide a portion of the first current to the output of the current circuit as the output current and to receive another portion of the first current and mirror the same as the second portion of the reference current.

    Abstract translation: 描述了配置为提供偏置电压的电流电路，被配置为提供偏置电压的电路以及用于提供偏置电压的方法，包括被配置为接收参考电流并具有提供输出电流的输出的电流电路。 一个这样的电流电路包括被配置为接收参考电流的第一部分的第一电流镜，并且还被配置为镜像参考电流的第一部分以提供第一电流。 当前电路还包括被配置为接收参考电流的第二部分并接收第一电流的第二电流镜。 第二电流镜还被配置为将第一电流的一部分提供给电流电路的输出作为输出电流，并且接收第一电流的另一部分并且与第二部分参考电流相同。

    Fully integrated adjustable DC current reference based on an integrated inductor reference
    49.
    发明授权
    Fully integrated adjustable DC current reference based on an integrated inductor reference 有权
    基于集成电感器参考的完全集成可调直流电流参考

    公开(公告)号：US09170589B2

    公开(公告)日：2015-10-27

    申请号：US13924594

    申请日：2013-06-23

    Applicant: Bogdan Alexandru Georgescu

    Inventor： Bogdan Alexandru Georgescu

    IPC: G05F3/16 ,  G05F3/20 ,  G05F1/46

    CPC classification number: G05F1/461

    Abstract: A novel fully integrated adjustable DC current reference is developed. The reference current is set by the ratio of a DC voltage generated using a band-gap reference and a tuned resistor based on an inductor reference. An AC signal is necessary to develop a relationship between the resistor tuned and the inductor reference. A computation unit which could be designed as an analog circuit is necessary to compute the value of the resistor in relationship to the reference inductor. Classic circuits are used to develop and analyze the relationship between the reference inductor and the tunable resistor that sets the DC current reference. Results show that the value of the inductance is insensitive to process, voltage and temperature variations. Therefore, assuming the DC bandgap reference voltage is insensitive to changes in process, voltage and temperature variations, so is the DC current reference.

    Abstract translation: 开发了一种全新的全集成可调直流电流参考。 参考电流由基于电感基准的使用带隙基准产生的直流电压和调谐电阻的比设定。 需要一个交流信号来产生电阻调谐和电感参考之间的关系。 可以设计为模拟电路的计算单元需要计算与参考电感相关的电阻值。 经典电路用于开发和分析参考电感和可调电阻之间的关系，用于设置直流电流参考。 结果表明，电感值对工艺，电压和温度变化不敏感。 因此，假设直流带隙参考电压对工艺，电压和温度变化的变化不敏感，直流电流参考也是如此。

    Single-Junction Voltage Reference
    50.
    发明申请
    Single-Junction Voltage Reference 审中-公开
    单相电压基准

    公开(公告)号：US20150286239A1

    公开(公告)日：2015-10-08

    申请号：US14245693

    申请日：2014-04-04

    Applicant: NATIONAL INSTRUMENTS CORPORATION

    Inventor： Christopher G. Regier

    IPC: G05F3/20 ,  G01R19/00

    CPC classification number: G05F3/16

    Abstract: A single semiconductor-based junction may be used to create a voltage reference, and temperature compensate the voltage reference, by time-multiplexing the voltage reference between different current drive levels. That is, the value of the current driven through the single junction may be repeatedly varied in a recurring manner. In case the junction is a zener diode, the current may be repeatedly switched between forward and reverse directions. As long as the temperature coefficients (in ppm/° C.) of the different voltages developed responsive to the different currents across the junction are different, a weighting of the different voltage values yield a zero temperature coefficient voltage reference value. To implement a bandgap reference, a single diode-connected bipolar junction transistor may alternately be forward-biased using a first current and at least a second current. A weighting of the (at least) two resulting Vbe (base-emitter voltage) drops may yield a zero temperature coefficient bandgap voltage.

    Abstract translation: 可以使用单个基于半导体的结点来产生电压基准，并且通过对不同电流驱动电平之间的电压基准进行时间复用来对温度补偿电压基准。 也就是说，驱动通过单结的电流的值可以重复地重复变化。 在结点是齐纳二极管的情况下，电流可以在正向和反向之间重复切换。 只要响应于跨接处的不同电流而产生的不同电压的温度系数（以ppm /℃）不同，则不同电压值的加权产生零温度系数电压参考值。 为了实现带隙参考，可以使用第一电流和至少第二电流来交替地将单个二极管连接的双极结型晶体管正向偏置。 （至少）两个产生的Vbe（基极 - 发射极电压）下降的加权可能产生零温度系数带隙电压。

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