公开(公告)号：US20050206409A1

公开(公告)日：2005-09-22

申请号：US10812030

申请日：2004-03-30

申请人： Wan-Jung Lin

发明人： Wan-Jung Lin

IPC分类号： H01L21/822 ,  H01L27/04 ,  H02P7/00 ,  H03K17/06 ,  H03K17/10 ,  H03K17/687 ,  H03K17/695 ,  H03K19/0175 ,  H03K19/094

CPC分类号： H03K17/6871 ,  H03K17/063 ,  H03K17/102

摘要： An enhanced CMOS circuit to drive a DC motor is disclosed, in which a CMOS circuit is used to form a driver circuit of the DC motor, replacing a conventional BiCMOS for the part of the driver circuit, which is used in a portable CD player. Two switching stages are each formed by four CMOS transistors connected in series, with one end of the circuit being connected to a positive power supply with a higher voltage and another end connected to ground or negative power supply terminal. The switching stages are able to produce high output voltages, which are applied on the gates of the CMOS transistors in the driver stage to lower the driving impedance of the conduction channel and to produce sufficient output current to drive a DC motor.

摘要翻译： 公开了一种用于驱动DC电动机的增强CMOS电路，其中使用CMOS电路来形成DC电动机的驱动电路，替代用于便携式CD播放器中的驱动器电路的一部分的常规BiCMOS。 两个开关级分别由串联连接的四个CMOS晶体管形成，电路的一端连接到具有较高电压的正电源，另一端连接到接地或负电源端子。 开关级能够产生高输出电压，其被施加在驱动级中的CMOS晶体管的栅极上，以降低导通通道的驱动阻抗并产生足够的输出电流来驱动DC电动机。

公开(公告)号：US20050189965A1

公开(公告)日：2005-09-01

申请号：US11057098

申请日：2005-02-11

申请人： Jenoe Tihanyi

发明人： Jenoe Tihanyi

IPC分类号： H03K17/082 ,  H03K17/30 ,  H03K17/695 ,  H03B1/00

CPC分类号： H03K17/302 ,  H03K17/0822

摘要： The invention relates to a circuit arrangement having connecting terminals (K1, K2) for application of a supply voltage (V+) and having a load transistor (M) for connecting a load (Z) to the supply voltage, said load transistor having a control terminal (G) and a first and second load terminal (D, S), the control terminal (G) of the load transistor (2) being coupled to a drive terminal (IN) for application of a drive signal (Sin). A voltage limiting circuit (10) is connected between one (D) of the load terminals and the drive terminal (G) of the transistor, a deactivation circuit (20) being provided, which is designed to deactivate the voltage limiting circuit (10) in a manner dependent on the supply voltage (V+).

摘要翻译： 本发明涉及具有用于施加电源电压（V +）并具有用于将负载（Z）连接到电源电压的负载晶体管（M））的连接端子（K 1，K 2）的电路装置，所述负载晶体管具有 控制端子（G）和第一和第二负载端子（D，S），负载晶体管（2）的控制端子（G）耦合到用于施加驱动信号（Sin）的驱动端子（IN） 。 电压限制电路（10）连接在负载端子的一个（D）和晶体管的驱动端子（G）之间，设置有去激活电压限制电路（10）的去激活电路（20） 以取决于电源电压（V +）的方式。

公开(公告)号：US20050168264A1

公开(公告)日：2005-08-04

申请号：US11035060

申请日：2005-01-14

申请人： Ikuo Fukami

发明人： Ikuo Fukami

IPC分类号： H01L27/04 ,  H01L21/822 ,  H03K17/06 ,  H03K17/08 ,  H03K17/082 ,  H03K17/695 ,  H03K19/0175

CPC分类号： H03K17/0822 ,  H03K17/063 ,  H03K2017/0806

摘要： The power IC includes an output transistor MO which controls a current flowing into an L load, a dynamic clamp circuit which clamps an overvoltage, and a clamp control circuit which controls the operation of the dynamic clamp circuit. The clamp control circuit activates the dynamic clamp circuit, which is normally inactive, upon detection of a back EMF by the L load.

摘要翻译： 功率IC包括控制流入L负载的电流的输出晶体管MO，钳位过电压的动态钳位电路以及控制动态钳位电路的动作的钳位控制电路。 当L负载检测到反电动势时，钳位控制电路激活通常无效的动态钳位电路。

公开(公告)号：US06859096B2

公开(公告)日：2005-02-22

申请号：US10630561

申请日：2003-07-30

申请人： Yasuomi Tanaka ,  Masao Noro

发明人： Yasuomi Tanaka ,  Masao Noro

IPC分类号： H04R3/00 ,  H03F1/52 ,  H03F3/185 ,  H03F3/187 ,  H03F3/217 ,  H03F3/393 ,  H03K17/08 ,  H03K17/695 ,  H03F3/38

CPC分类号： H03F3/2171 ,  H03F3/185 ,  H03F3/393

摘要： A detecting circuit (REFH, CM11, LA1, TN1, RN1) which detects an overcurrent flowing through a power-MOS transistor (401) in an output stage to output a first signal (ITN1) is disposed in a first driving circuit (303H) on the side of a high-side driver. Another detecting circuit (REFL, CM21, LA2, TN2, RN2) which detects an overcurrent flowing through a power-MOS transistor (402) in the output stage to output a second signal (ITN2) is disposed in a driving circuit (303L) on the side of a low-side driver. The first signal (ITN1) is converted to a third signal (ITT2) based on a negative power supply (VPP−), by a signal converting circuit. The third signal is added to the second signal. In response to the addition signal, a pulse signal to be input to the driving circuits (303H and 303L) is blocked.

摘要翻译： 检测在输出级中流过功率MOS晶体管（401）的过电流输出第一信号（ITN1）的检测电路（REFH，CM11，LA1，TN1，RN1）设置在第一驱动电路（303H） 在高边司机的一边。 检测在输出级中流过功率MOS晶体管（402）的过电流输出第二信号（ITN2）的另一个检测电路（REFL，CM21，LA2，TN2，RN2）设置在驱动电路（303L）中 一边是低边司机。 信号转换电路将第一信号（ITN1）基于负电源（VPP-）转换为第三信号（ITT2）。 第三个信号被添加到第二个信号。 响应于相加信号，要阻止向驱动电路（303H和303L）输入的脉冲信号。

公开(公告)号：US06851305B2

公开(公告)日：2005-02-08

申请号：US10184471

申请日：2002-06-27

申请人： Lou Vierling ,  Larry Hiltunen

发明人： Lou Vierling ,  Larry Hiltunen

IPC分类号： F02D45/00 ,  F02D41/24 ,  H03K17/695 ,  G01M15/00

CPC分类号： F02D41/2435 ,  F02D41/2409 ,  F02D41/2419 ,  F02D41/2422 ,  F02D41/2467

摘要： A method and system is disclosed by which identification codes for a plurality of systems are utilized to provide a control with an indication of a particular characteristic of the particular system. The characteristic is assigned with an identifying variable, in a disclosed embodiment voltage, which increases. As this variable increases, possible errors due to system features will also increase. Thus, the possibility of the control misreading an identification code due to the error increases. To address this increasing possibility, the distance between adjacent variables also increases as the variables themselves increase. In a preferred embodiment the distance is increased proportionally.

摘要翻译： 公开了一种方法和系统，通过该方法和系统，利用多个系统的识别码为控制提供特定系统的特定特征的指示。 该特征被赋予识别变量，在所公开的实施例中电压增加。 随着这个变量的增加，由于系统特征引起的可能的错误也将增加。 因此，由误差引起的识别码的误读可能性增加。 为了解决这种增加的可能性，相邻变量之间的距离也随着变量本身的增加而增加。 在优选实施例中，距离成比例地增加。

公开(公告)号：US6392908B2

公开(公告)日：2002-05-21

申请号：US88493001

申请日：2001-06-21

申请人： HITACHI LTD

发明人： MIYAZAKI HIDEKI ,  SUZUKI KATSUNORI ,  TATENO KOJI ,  SAKANO JUNICHI ,  IWAMURA MASAHIRO ,  MORI MUTSUHIRO

IPC分类号： H03K17/082 ,  H03K17/16 ,  H03K17/695 ,  H02M7/521 ,  H02M7/5387 ,  H02M7/122

CPC分类号： H03K17/0822 ,  H03K17/165

摘要： In a driving apparatus of a power semiconductor element for conducting or interrupting a main current, first resistance variable for changing a first resistance according to a control voltage, and second resistance variable for changing a second resistance according to a voltage between a first and a second terminal are provided, and either one of a voltage of a control power supply or a voltage between the first and the second terminal is voltage-divided by the first resistance and the second resistance, and the divided voltage is applied to a control gate terminal at the time of conducting or interrupting the main current.

摘要翻译： 在用于导通或中断主电流的功率半导体元件的驱动装置中，根据控制电压改变第一电阻的第一电阻变量，以及根据第一和第二电压之间的电压来改变第二电阻的第二电阻变量 端子，并且控制电源的电压或第一和第二端子之间的电压中的任一个被第一电阻和第二电阻分压，并且分压被施加到控制栅极端子 执行或中断主电流的时间。

公开(公告)号：US06091274A

公开(公告)日：2000-07-18

申请号：US24099

申请日：1998-02-17

申请人： Donald Ray Preslar

发明人： Donald Ray Preslar

IPC分类号： H03K17/082 ,  H03K17/695 ,  H03L5/00

CPC分类号： H03K17/0822

摘要： In combination with a transistor designed to drive an inductive load, there is included a network connected between the output electrode (e.g., drain) and the control electrode (e.g., gate) of the transistor for limiting the overshoot and controlling the waveshape of the signal produced at the output electrode of the transistor, when the transistor is being turned-off. The network includes a series string of zener diodes with one or more by-pass capacitors connected across the zener diodes closest to the control electrode of the transistor for shaping the output signal produced at the output electrode of the transistor and for reducing electromagnetic radiation. The network also includes unidirectional conducting elements for discharging each bypass capacitor each time the transistor is turned-on. The zener diodes and the "discharging" unidirectional conducting elements of the network may be formed as integral parts of the same integrated circuit (IC).

摘要翻译： 结合设计用于驱动感性负载的晶体管，包括连接在输出电极（例如，漏极）和晶体管的控制电极（例如，栅极）之间的网络，用于限制过冲并控制信号的波形 当晶体管截止时，在晶体管的输出电极处产生。 该网络包括串联串联的齐纳二极管，其中一个或多个旁路电容器连接在最靠近晶体管的控制电极的齐纳二极管上，用于对在晶体管的输出电极处产生的输出信号进行整形并减小电磁辐射。 该网络还包括用于在晶体管导通时每个旁路电容器放电的单向导电元件。 网络的齐纳二极管和“放电”单向导电元件可以形成为同一集成电路（IC）的整体部件。

公开(公告)号：US6037720A

公开(公告)日：2000-03-14

申请号：US177964

申请日：1998-10-23

申请人： Stephen L. Wong ,  Paul Veldman ,  Eugene J. De Mol

发明人： Stephen L. Wong ,  Paul Veldman ,  Eugene J. De Mol

IPC分类号： H02M7/12 ,  G05F1/00 ,  H02M1/08 ,  H03K17/06 ,  H03K17/687 ,  H03K17/695

CPC分类号： H03K17/6871 ,  H03K17/163 ,  H03K19/017509 ,  H05B41/2828 ,  H03K17/162 ,  Y02B20/186

摘要： A switched bridge circuit includes a low voltage to high voltage interface which selectively controls an input to a high side switch. A controller compares the voltage across the interface, the state of the high side switch, and the output of the circuit. If hard switching is detected by the controller, it latches the voltage across the interface thus keeping the high side switch on to allow the hard switching to occur. If soft switching is detected, the high side switch is kept off. A source follower is used to drive the high side switch so that the circuit output follows the interface output thereby avoiding oscillation. A falling edge detector for the output of the circuit uses the inherent parasitic capacitance of a high voltage device which also forms a bootstrap diode. When the output drops, the parasitic capacitance feeds a resistance which causes a driver to actuate. A second falling edge detector uses the inherent parasitic capacitance of the level shifter switch which is another high voltage device. When the output drops, the parasitic capacitance turns on a switch. A rising edge detector also uses the inherent capacitance of the low voltage to high voltage interface. A switch is coupled to the circuit output and the low voltage to high voltage interface. When the circuit output rises, the switch actuates.

摘要翻译： 开关桥式电路包括低电压至高压接口，其选择性地控制对高侧开关的输入。 控制器比较接口电压，高侧开关的状态和电路的输出。 如果控制器检测到硬切换，则它锁存接口上的电压，从而保持高侧开关接通，以允许发生硬切换。 如果检测到软开关，则高侧开关保持关闭。 源极跟随器用于驱动高侧开关，使得电路输出跟随接口输出，从而避免振荡。 用于电路输出的下降沿检测器使用也形成自举二极管的高压器件的固有寄生电容。 当输出下降时，寄生电容提供一个使驱动器致动的电阻。 第二个下降沿检测器使用另一个高压器件的电平转换开关的固有寄生电容。 当输出下降时，寄生电容打开开关。 上升沿检测器还使用低电压至高压接口的固有电容。 开关耦合到电路输出和低电压到高压接口。 当电路输出上升时，开关动作。

公开(公告)号：US5811996A

公开(公告)日：1998-09-22

申请号：US767952

申请日：1996-12-17

申请人： Kazunori Oyabe ,  Tatsuhiko Fujihira ,  Kazuhiko Yoshida ,  Yukio Yano

发明人： Kazunori Oyabe ,  Tatsuhiko Fujihira ,  Kazuhiko Yoshida ,  Yukio Yano

IPC分类号： H03K17/08 ,  H03K17/00 ,  H03K17/082 ,  H03K17/695 ,  H03K3/00

CPC分类号： H03K17/0822 ,  H03K17/0828 ,  H03K2217/0036

摘要： A gate drive circuit device for a voltage-driven semiconductor element reduces the time to dissipate inductively stored electromagnetic energy and reduces current consumption by using cyclically charged capacitative storage to produce a control signal that is about twice the supply voltage. This permits full-ON dissipation of the stored energy after the circuit cuts off power to the inductive element. In one embodiment, the dissipation is chiefly in a voltage-regulator diode connected to limit the voltage appearing across a transistor. In another embodiment, a voltage regulator diode permits a transistor to operate in the full-on condition, while limiting the voltage across it to a value below its withstand voltage, whereby a maximum power dissipation current flows in the transistor. In a further embodiment a gate drive signal generator eliminates a voltage regulator diode from the conventional gate drive circuit device. Instead, this embodiment substitutes switching devices both on the power supply side and the reference potential (ground) side. Both switching devices include a switch and an operating section that controls switching operation. The two operating sections receive an externally generated command signal for timing the ON/OFF operation of the switches. The control technique permits both the switching and operating sections to be fabricated integrally as an integrated circuit.

摘要翻译： 用于电压驱动的半导体元件的栅极驱动电路器件通过使用循环充电的电容存储来减少耗散感应存储的电磁能量并减少电流消耗的时间，以产生大约是电源电压的两倍的控制信号。 这在电路断开电感元件的电源之后，允许存储能量的全功耗。 在一个实施例中，耗散主要在连接的电压调节器二极管中以限制出现在晶体管两端的电压。 在另一个实施例中，电压调节器二极管允许晶体管在全开状态下工作，同时将其两端的电压限制在低于其耐受电压的值，由此在晶体管中流过最大功耗电流。 在另一实施例中，栅极驱动信号发生器从传统的栅极驱动电路器件中消除了稳压二极管。 相反，该实施例将电源侧和参考电位（接地）侧的开关器件替代。 两个开关装置包括开关和控制开关操作的操作部分。 两个操作部分接收外部产生的命令信号以定时开关的ON / OFF操作。 控制技术允许开关和操作部分作为集成电路整体制造。

公开(公告)号：US5744994A

公开(公告)日：1998-04-28

申请号：US648266

申请日：1996-05-15

申请人： Richard K. Williams

发明人： Richard K. Williams

IPC分类号： H01L29/76 ,  H01L21/8234 ,  H01L27/02 ,  H01L27/088 ,  H01L29/10 ,  H01L29/78 ,  H01L29/861 ,  H02M3/158 ,  H02M7/217 ,  H03K17/695 ,  H03K17/687

CPC分类号： H01L29/7813 ,  H01L27/0248 ,  H01L29/1087 ,  H01L29/861 ,  H02M3/1588 ,  H02M7/217 ,  Y02B70/1466

摘要： An N-channel power MOSFET is fabricated with its source and body connected together and biased at a positive voltage with respect to its drain. The gate is controlled by a switch which alternately connects the gate to the source or to a voltage which turns the channel of the MOSFET fully on. When the gate is connected to the source, the device functions as a "pseudo-Schottky" diode which turns on at a lower voltage and provides a lower-resistance path than a conventional PN diode. When the gate is connected to the positive voltage the channel of the MOSFET is turned fully on. This MOSFET switch is particularly suitable for use as a synchronous rectifier in a power converter where it reduces the power loss and stored charge in the "break before make" interval (i.e., the interval between the turn-off of the shunt switch and the turn-on of the synchronous rectifier).

摘要翻译： 制造N沟道功率MOSFET，其源极和主体连接在一起，并相对于其漏极以正电压偏置。 栅极由开关控制，交换机将栅极交替连接到源极或使MOSFET的通道完全导通的电压。 当栅极连接到源极时，该器件用作“伪肖特基”二极管，其在较低电压下导通，并提供比常规PN二极管更低的电阻通路。 当栅极连接到正电压时，MOSFET的通道完全导通。 该MOSFET开关特别适合用作功率转换器中的同步整流器，其中它减少了功率损耗和“断开之前”间隔内的存储电荷（即，分流开关和转向开关之间的间隔 - 在同步整流器中）。