TUNABLE REACTANCE CIRCUITS FOR WIRELESS POWER SYSTEMS

    公开(公告)号:US20210234534A1

    公开(公告)日:2021-07-29

    申请号:US17155855

    申请日:2021-01-22

    摘要: Disclosed herein are tunable reactance circuits configured to present a tunable or variable capacitive reactance when energized. The circuits can include a switch configured to be controlled by a gate driver, the gate driver configured to receive a control signal indicating an on-time of the switch; a diode coupled antiparallel to a switch; and one or more capacitors coupled in parallel to the diode. The tunable capacitive reactance can be based on the on-time of the switch and a total capacitance value of the one or more capacitors. The exemplary tunable reactance circuits may be used in wireless power transmitters and/or receivers for efficient power transmission and/or to deliver a particular level of power to a load.

    Interface circuitry with series switch and shunt attenuator

    公开(公告)号:US11018669B2

    公开(公告)日:2021-05-25

    申请号:US16767288

    申请日:2018-03-07

    摘要: Methods, systems, and circuities for selectively connecting an RF signal to front end circuitry and selectively attenuating the RF signal are disclosed. In one example, an interface circuitry includes switching circuitry and attenuator circuitry. The switching circuitry is connected in series between an output of an amplifier and a front end circuitry configured to transmit a radio frequency (RF) signal output by the amplifier. The switching circuitry connects the output of the amplifier to a selected one or more front end circuitry inputs to create one or more signal paths. The attenuator circuitry is connected between the output of the amplifier and ground to create an attenuation path in a shunt configuration relative to the one or more signal paths. The attenuator circuitry is configured to attenuate the RF signal.

    Second-order all-pass network comprising CCIIs

    公开(公告)号:US10911025B2

    公开(公告)日:2021-02-02

    申请号:US16760967

    申请日:2018-11-07

    IPC分类号: H03H11/02

    摘要: A second-order all-pass network has at least three Second Generation Current Conveyors (CCIIs). A network input is connected or connectable to a Y port of a first CCII, a Z port of the first CCII is connected to a Y port of a second CCII, an X port of the first CCII is connected to a Y port of a third CCII, and a network output is connected or connectable, directly or indirectly, to a Z port of the second CCII. The X port of the first CCII is connected via a first network element to ground, the Z port of the first CCII is connected via a second network element to ground, an X port of the third CCII is connected via a third network element to ground, and an X port of the second CCII is connected via a fourth network element to ground.

    SUPERCONDUCTING RESONATOR DEFINITION BASED ON ONE OR MORE ATTRIBUTES OF A SUPERCONDUCTING CIRCUIT

    公开(公告)号:US20200336134A1

    公开(公告)日:2020-10-22

    申请号:US16390682

    申请日:2019-04-22

    摘要: Systems, computer-implemented methods, and computer program products that can facilitate superconducting resonator definition based on one or more superconducting circuit attributes, are described. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a resonant circuit component that derives a resonant circuit indicative of a superconducting resonator of a superconducting circuit based on one or more attributes of the superconducting circuit. The computer executable components can further comprise a resonator definition component that defines a frequency value of the superconducting resonator based on the resonant circuit.

    Differential current conveyor circuit, corresponding device, and method of operation thereof

    公开(公告)号:US10788920B2

    公开(公告)日:2020-09-29

    申请号:US15797814

    申请日:2017-10-30

    摘要: A differential current conveyor circuit includes two or more single-ended current conveyor stages and a common bias stage. First and second switches are set between the control terminals of the transistors in the common bias stage and a respective one of a first and a second coupling line of the single ended stages can be switched between the following: a reset state of the circuit with the transistors in the common bias stage coupled to the first and second coupling lines with the single-ended stages set to a bias condition; and a sensing state of the circuit with the transistors in the common bias stage decoupled from the first and second coupling lines, with the single-ended stages in a high impedance state with the control terminals of the input transistors of the single ended stages capacitively coupled to the input terminal.