公开(公告)号：US11062680B2

公开(公告)日：2021-07-13

申请号：US16227588

申请日：2018-12-20

Applicant: Advanced Micro Devices, Inc.

Inventor： Pazhani Pillai ,  Christopher J. Brennan

IPC: G06T1/20 ,  G06F9/38 ,  G09G5/18

Abstract: Systems, apparatuses, and methods for implementing raster order view enforcement techniques are disclosed. A processor includes a plurality of compute units coupled to one or more memories. A plurality of waves are launched in parallel for execution on the plurality of compute units, where each wave comprises a plurality of threads. A dependency chain is generated for each wave of the plurality of waves. The compute units wait for all older waves to complete dependency chain generation prior to executing any threads with dependencies. Responsive to all older waves completing dependency chain generation, a given thread with a dependency is executed only if all other threads upon which the given thread is dependent have become inactive. When executed, the plurality of waves generate a plurality of pixels to be driven to a display.

公开(公告)号：US11061583B2

公开(公告)日：2021-07-13

申请号：US16525971

申请日：2019-07-30

Applicant: Advanced Micro Devices, Inc.

Inventor： Andrew G. Kegel ,  Steven E. Raasch

IPC: G06F3/06 ,  G06F16/907 ,  G06F12/0891

Abstract: An electronic device includes a non-volatile memory and a controller. The controller receives data to be written to the non-volatile memory and determines a type of the data. Based on the type of the data, the controller selects a given duration of the data from among multiple durations of the data in the non-volatile memory. The controller sets values of one or more parameters for writing the data to the non-volatile memory based on the given duration. The controller writes the data to the non-volatile memory using the values of the one or more write parameters.

公开(公告)号：US11061572B2

公开(公告)日：2021-07-13

申请号：US15136851

申请日：2016-04-22

Applicant: Advanced Micro Devices, Inc.

Inventor： David A. Roberts ,  Michael Ignatowski

IPC: G06F3/06 ,  G06F9/50 ,  G06F12/1027 ,  G06F12/1045

Abstract: Described are a method and processing apparatus to tag and track objects related to memory allocation calls. An application or software adds a tag to a memory allocation call to enable object level tracking. An entry is made into an object tracking table, which stores the tag and a variety of statistics related to the object and associated memory devices. The object statistics may be queried by the application to tune power/performance characteristics either by the application making runtime placement decisions, or by off-line code tuning based on a previous run. The application may add a tag to a memory allocation call to specify the type of memory characteristics requested based on the object statistics.

公开(公告)号：US11055895B2

公开(公告)日：2021-07-06

申请号：US16554793

申请日：2019-08-29

Applicant: Advanced Micro Devices, Inc.

Inventor： David Ronald Oldcorn

IPC: G06T15/00 ,  G06T15/80 ,  G06T1/20

Abstract: Described herein are techniques for reducing control flow divergence. The method includes identifying two or more shader programs having commonalities, generating a merged shader program that implements functionality of the identified two or more shader programs, wherein the functionality implemented includes a first execution option for a first shader program of the two or more shader programs and a second execution option for a second shader program of the two or more shader programs, modifying shader programs that call the first shader program to instead call the merged shader program and select the first execution option, modifying shader programs that call the second shader program to instead call the merged shader program and select the second execution option.

公开(公告)号：US20210200694A1

公开(公告)日：2021-07-01

申请号：US16728152

申请日：2019-12-27

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： JAMES R. MAGRO ,  KEDARNATH BALAKRISHNAN ,  RAVINDRA N. BHARGAVA ,  GUANHAO SHEN

IPC: G06F13/16 ,  G06F12/0882 ,  G06F12/0879 ,  G06F9/54

Abstract: Staging buffer arbitration includes: storing a plurality of memory access requests in a staging buffer; selecting a memory access request of the plurality of memory access requests from the staging buffer based on one or more arbitration rules; and moving the memory access request from the staging buffer to a command queue.

公开(公告)号：US20210200468A1

公开(公告)日：2021-07-01

申请号：US16730092

申请日：2019-12-30

Applicant: Advanced Micro Devices, Inc.

Inventor： Jing Wang ,  James R. Magro ,  Kedarnath Balakrishnan

IPC: G06F3/06

Abstract: Memory access commands are placed in a memory interface queue and transmitted from the memory interface queue to a heterogeneous memory channel coupled to a volatile dual in-line memory module (DIMM) and a non-volatile DIMM. Selected memory access commands that are placed in the memory interface queue are stored in a replay queue. The non-volatile reads that are placed in the memory interface queue are in a non-volatile command queue (NV queue). The method detects, based on information received over the heterogeneous memory channel, that an error has occurred requiring a recovery sequence. In response to the error, the method initiates the recovery sequence including (i) transmitting selected memory access commands that are stored in the replay queue, and (ii) transmitting non-volatile reads that are stored in the NV queue.

公开(公告)号：US20210191435A1

公开(公告)日：2021-06-24

申请号：US16723920

申请日：2019-12-20

Applicant: Advanced Micro Devices, Inc.

Inventor： Sonu Arora ,  Michael Arn Nix ,  Moises E. Robinson ,  Xiaojie He

IPC: G05F1/46 ,  G05B19/042

Abstract: A technique for adjusting a power supply for a device is provided. The technique includes detecting a low-power trigger for a device; switching a power supply for the device from a high-power power supply to a low-power power supply; detecting a high-power trigger for a device; and switching a power supply for the device from the low-power power supply to the high-power power supply, wherein the high-power power supply consumes a larger amount of power than the low-power power supply, and wherein the high-power power supply provides a greater amount of noise reducing and a greater tolerance to temperature differences than the low-power power supply.

公开(公告)号：US20210185333A1

公开(公告)日：2021-06-17

申请号：US17185497

申请日：2021-02-25

Applicant: Advanced Micro Devices, Inc.

Inventor： Michael L. Schmit ,  Ashish Farmer ,  Radhakrishna Giduthuri

IPC: H04N19/43 ,  H04N19/436

Abstract: A host processor, such as a central processing unit (CPU), programmed to execute a software driver that causes the host processor to generate a motion compensation command for a plurality of cores of a massively parallel processor, such as a graphics processing unit (GPU), to provide motion compensation for encoded video. The motion compensation command for the plurality of cores of the massively parallel processor contains executable instructions for processing a plurality of motion vectors grouped by a plurality of prediction modes from a re-ordered motion vector buffer by the plurality of cores of the massively parallel processor.

公开(公告)号：US20210183668A1

公开(公告)日：2021-06-17

申请号：US16715459

申请日：2019-12-16

Applicant: Advanced Micro Devices, Inc.

Inventor： Travis Oneal Cagle ,  Sheldon S. Grooms

IPC: H01L21/67 ,  G01R31/28

Abstract: Systems, apparatuses, and methods for efficiently performing active thermal control during device testing are disclosed. A device testing system includes a device under test, a thermal structure on top of the device under test, and a controller configured to determine when to apply and remove thermal energy to the device under test through the thermal structure. The thermal structure includes a thermal transfer block that transfers thermal energy to and from the device under test below the thermal transfer block. The thermal structure also includes a coolant block above the thermal transfer block that removes thermal energy from the thermal transfer block. There is no heating element between the coolant block and the thermal transfer block. Rather, the thermal structure includes a heating element in a wall of the thermal transfer block. Therefore, an unobstructed thermal path exists from the device under test to the coolant block.

公开(公告)号：US20210182582A1

公开(公告)日：2021-06-17

申请号：US16722499

申请日：2019-12-20

Applicant: Advanced Micro Devices, Inc.

Inventor： Chang-Che Tsai ,  Chih-Wei Li ,  Po-Min Wang ,  Yang Wang

IPC: G06K9/00 ,  H04N5/353

Abstract: A processing device comprises a memory configured to store data and a processor. The processor is configured to control an exposure timing of a rolling shutter image sensor and an IR illumination timing of an object, by an IR light emitter, by switching between a first operation mode and a second operation mode. In the first operation mode, a sequence of video frames, each having a plurality of pixel lines, comprises a frame in which each pixel line is exposed to IR light emitted by the IR light emitter; a frame which is partially exposed to the IR light and a frame in which no pixel line is exposed to the IR light. In the second operation mode, alternating video frames of the sequence comprise one of a frame in which each pixel line is exposed to the IR light and a frame in which no pixel line is exposed to the IR light.