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公开(公告)号：US09843337B1
公开(公告)日：2017-12-12
申请号：US15460433
申请日：2017-03-16
Applicant: Analog Devices Global
Inventor： Zhao Li , Trevor Clifford Caldwell , David Nelson Alldred , Yunzhi Dong , Prawal Man Shrestha , Jialin Zhao , Hajime Shibata , Victor Kozlov , Richard E. Schreier , Wenhua W. Yang
CPC classification number: H03M1/1023 , H03M1/0673 , H03M1/1009 , H03M1/12 , H03M1/361 , H03M3/384 , H03M3/414
Abstract: Analog-to-digital converters (ADCs) can be used inside ADC architectures, such as delta-sigma ADCs. The error in such internal ADCs can degrade performance. To calibrate the errors in an internal ADC, comparator offsets of the internal ADC can be estimated by computing a mean of each comparator of the internal ADC. Relative differences in the computed means serves as estimates for comparator offsets. If signal paths in the internal ADC are shuffled, the estimation of comparator offsets can be performed in the background without interrupting normal operation. Shuffling of signal paths may introduce systematic measurement errors, which can be measured and reversed to improve the estimation of comparator offsets.
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公开(公告)号：US09838029B1
公开(公告)日：2017-12-05
申请号：US15369087
申请日：2016-12-05
Applicant: Analog Devices Global
Inventor： Ting Gao
IPC: H03M1/12 , H03K3/017 , H03K3/027 , H03K3/023 , H03K5/151 , H03K5/156 , H03K7/08 , H03M1/00 , H03L7/089
CPC classification number: H03M1/1245 , H03K3/017 , H03K3/023 , H03K3/027 , H03K5/1515 , H03K5/1565 , H03K7/08 , H03L7/0891 , H03M1/00 , H03M1/12
Abstract: A clock generation circuit coupled to an integrator circuit uses a variable resistance that is adjusted in a transconductance bias feedback circuit. This resistance is calibrated to the reciprocal of the transconductance of the input amplifier. The product of the adjusted resistance and a capacitance in the clock generation circuit provides a time constant for the settling time of the integrator and controls a pulse width of an adaptively controlled duty cycle output clock.
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公开(公告)号：US20170338842A1
公开(公告)日：2017-11-23
申请号：US15159532
申请日：2016-05-19
Applicant: Analog Devices Global
Inventor： Patrick Pratt
IPC: H04B1/04
CPC classification number: H04B1/0475 , H03F1/3247 , H03F1/3294 , H03F3/195 , H03F2200/451 , H03F2201/3227 , H03F2201/3233 , H04B2001/0425
Abstract: Various examples are directed to systems and methods for digital predistortion (DPD). A linear digital predistortion (DPD) circuit may be programmed to generate a pre-distorted signal linear component based at least in part on a complex baseband signal. A nonlinear DPD circuit may be programmed to generate a pre-distorted signal nonlinear component based at least in part on the complex baseband signal. A mixer circuit programmed to generate a pre-distorted signal based at least in part on the pre-distorted signal linear component and the pre-distorted signal nonlinear component.
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公开(公告)号：US20170338841A1
公开(公告)日：2017-11-23
申请号：US15159492
申请日：2016-05-19
Applicant: Analog Devices Global
Inventor： Patrick Pratt
CPC classification number: H04B1/0475 , H04B2001/0425 , H04L25/03159 , H04L25/03343 , H04L2025/03356
Abstract: Various examples are directed to systems and methods for wideband digital predistortion. A digital pre-distortion circuit may be programmed to receive a complex baseband signal and generate a pre-distorted signal. Generating the pre-distorted signal may comprise applying to the complex baseband signal a first correction for an Nth order distortion of a power amplifier at an Ith harmonic frequency zone centered at about an Ith harmonic of a carrier frequency and applying to the complex baseband signal a second correction for the Nth order distortion at a Jth harmonic frequency zone centered at about a Jth harmonic of the carrier frequency different than the Ith harmonic of a carrier frequency.
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公开(公告)号：US09823275B2
公开(公告)日：2017-11-21
申请号：US14895868
申请日：2014-05-30
Applicant: Analog Devices Global
Inventor： Seyed Amir Ali Danesh , William Michael James Holland , John Stuart , Jonathan Ephraim David Hurwitz
IPC: G01R27/08 , G01R19/00 , G01R17/00 , G01R17/02 , G01R15/14 , G01R27/14 , G01R19/25 , G01R1/20 , G01R19/165
CPC classification number: G01R17/00 , G01R1/203 , G01R15/144 , G01R15/146 , G01R17/02 , G01R19/0084 , G01R19/0092 , G01R19/16542 , G01R19/2513 , G01R27/08 , G01R27/14
Abstract: The present invention relates to electrical measurement apparatus (10). The electrical measurement apparatus (10) comprises a measurement arrangement (20,24) configured to be disposed in relation to an electrical circuit (12,14,16,18) which bears an electrical signal, the measurement arrangement (20,24) being operative when so disposed to measure the electrical signal. The electrical measurement apparatus (10) further comprises a signal source (22) operative to apply a reference input signal to the measurement arrangement (20,24) whereby an output signal from the measurement arrangement comprises an electrical output signal corresponding to the electrical signal and a reference output signal corresponding to the reference input signal, the reference input signal having a substantially piecewise constant form which is repeated over each of plural cycles. The electrical measurement apparatus (10) yet further comprises processing apparatus (26) which is operative: to determine at least one cumulative representation, determination of the cumulative representation comprising summing plural received sections of the output signal, each of the plural received sections corresponding to at least a part and to a same part of the cycle of the reference input signal; and to determine at least one of: a transfer function for the measurement arrangement; a change in a transfer function for the measurement arrangement; and the electrical signal, in dependence on the at least one cumulative representation and the reference input signal.
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Patent Agency Ranking
公开(公告)号：US20170331489A1
公开(公告)日：2017-11-16
申请号：US15150910
申请日：2016-05-10
Applicant: Analog Devices Global
Inventor： Dennis A. Dempsey , Michael C.W. Coln
Abstract: Many electronic circuits rely on the ratio of one component to other components being well defined. Current flow in component can warm the component causing its electrical properties to change, for example the resistance of a resistor may increase due to self-heating as a result of current flow. The present disclosure provides a way to reduce temperature variation between components so as to reduce electrical mismatch between them or the consequences of such mismatch. This is important as even a change of resistance of, for example, 20-50 ppm in a resistor can result in non-linearity exceeding the least significant bit value of a 16 bit digital to analog converter.
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公开(公告)号：US20170299649A1
公开(公告)日：2017-10-19
申请号：US15291742
申请日：2016-10-12
Applicant: Analog Devices Global
Inventor： Edward John Coyne , Alan J. O'Donnell , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Thomas G. O'Dwyer , David Aherne , Michael A. Looby
IPC: G01R31/26
CPC classification number: G01R31/2879 , G01R31/2874
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring. An integrated circuit device includes a core circuit and a wear-out monitor device. The wear-out monitor device configured to adjust an indication of wear out of the core circuit regardless of whether the core circuit is activated The integrated circuit further includes a sensing circuit coupled to the wear-out monitor device and configured to detect an electrical property of the wear-out monitor device that is indicative of a wear-out level of the core-circuit.
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公开(公告)号：US20170299636A1
公开(公告)日：2017-10-19
申请号：US15583257
申请日：2017-05-01
Applicant: Analog Devices Global
CPC classification number: G01R19/0092 , G01R17/02 , G01R35/005
Abstract: Current measurement apparatus comprises a measurement arrangement and a signal source. The measurement arrangement is configured to measure a current signal drawn by a load. The signal source is operative to apply a reference input signal to the measurement arrangement whereby an output signal from the measurement arrangement comprises a load output signal corresponding to the load drawn current signal and a reference output signal corresponding to the reference input signal. The signal source comprises a current multiplier which defines first and second current paths and is configured such that: the first path carries a multiplier input current signal; the second path carries a multiplier output current signal which determines the reference input signal and which corresponds to the multiplier input current signal multiplied by a multiplier value determined by the current multiplier; and the multiplier input current signal and the multiplier output current signal are carried on their respective paths in a same direction relative to a power supply voltage. Power drawn through the second path as divided by the multiplier value is less than the power drawn through the first path.
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公开(公告)号：US20170276514A1
公开(公告)日：2017-09-28
申请号：US15466611
申请日：2017-03-22
Applicant: Analog Devices Global
Inventor： Jochen Schmitt , Jan Kubik
IPC: G01D5/16
CPC classification number: G01R33/091 , G01D5/145 , G01D5/16 , G01D5/24438
Abstract: Apparatus and methods provide sensing of quadrants, angles, or distance using magnetoresistive elements. A quadrant or angle sensor can have magnetoresistive elements split into multiple angles to generate an output with reduced harmonics. A distance sensor can have magnetoresistive elements split and spaced apart to generate an output with reduced harmonics. A biasing conductor can alternatingly carry different amounts of current (different in at least one of magnitude or direction) for DC offset compensation or cancellation.
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公开(公告)号：US20170261345A1
公开(公告)日：2017-09-14
申请号：US15064544
申请日：2016-03-08
Applicant: Analog Devices Global
Inventor： Jochen Schmitt
IPC: G01D5/16
Abstract: A system includes a multiturn counter that can store a magnetic state associated with a number of accumulated turns of a magnetic field. The multiturn counter includes a plurality of magnetoresistive elements electrically coupled in series with each other. A matrix of electrical connections is arranged to connect magnetoresistive elements of the plurality of magnetoresistive elements to other magnetoresistive elements of the plurality of magnetoresistive elements.
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