公开(公告)号：US10804153B2

公开(公告)日：2020-10-13

申请号：US15169095

申请日：2016-05-31

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Yaojian Lin ,  Seng Guan Chow

IPC: H01L21/78 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L23/538 ,  H01L23/31 ,  H01L21/66 ,  H01L21/56

Abstract: A semiconductor device has a semiconductor die. A first insulating layer is disposed over the semiconductor die. A first via is formed in the first insulating layer over a contact pad of the semiconductor die. A first conductive layer is disposed over the first insulating layer and in the first via. A second insulating layer is disposed over a portion of the first insulating layer and first conductive layer. An island of the second insulating layer is formed over the first conductive layer and within the first via. The first conductive layer adjacent to the island is devoid of the second insulating layer. A second conductive layer is disposed over the first conductive layer, second insulating layer, and island. The second conductive layer has a corrugated structure. A width of the island is greater than a width of the first via.

公开(公告)号：US10804119B2

公开(公告)日：2020-10-13

申请号：US15459997

申请日：2017-03-15

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： OhHan Kim ,  KyungHwan Kim ,  WoonJae Beak ,  HunTeak Lee ,  InSang Yoon

IPC: H01L21/00 ,  H01L21/56 ,  H01L23/58 ,  H01L23/552 ,  H01L23/31 ,  H01L21/683 ,  H01L23/00 ,  H01L25/16

Abstract: A semiconductor device has a semiconductor die or component, including an IPD, disposed over an attach area of a penetrable film layer with a portion of the semiconductor die or component embedded in the penetrable film layer. A conductive layer is formed over a portion of the film layer within the attach area and over a portion of the film layer outside the attach area. An encapsulant is deposited over the film layer, conductive layer, and semiconductor die or component. The conductive layer extends outside the encapsulant. An insulating material can be disposed under the semiconductor die or component. A shielding layer is formed over the encapsulant. The shielding layer is electrically connected to the conductive layer. The penetrable film layer is removed. The semiconductor die or component disposed over the film layer and covered by the encapsulant and shielding layer form an SIP module without a substrate.

公开(公告)号：US10790268B2

公开(公告)日：2020-09-29

申请号：US16821202

申请日：2020-03-17

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  HeeSoo Lee

IPC: H01L23/552 ,  H01L25/10 ,  H01L25/00 ,  H01L23/538 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A conductive pillar is formed on the first substrate. A first encapsulant is deposited over the first substrate and semiconductor die after forming the conductive pillar. A groove is formed in the first encapsulant around the conductive pillar. A first passive device is disposed over a second substrate. A second encapsulant is deposited over the first passive device and second substrate. The first substrate is mounted over the second substrate. A shielding layer is formed over the second encapsulant. A second passive device can be mounted over the second substrate opposite the first passive device and outside a footprint of the first substrate.

公开(公告)号：US10741416B2

公开(公告)日：2020-08-11

申请号：US15605010

申请日：2017-05-25

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Yaojian Lin ,  Xu Sheng Bao ,  Kang Chen

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L21/56

Abstract: A semiconductor device has a first conductive layer and a semiconductor die disposed adjacent to the first conductive layer. An encapsulant is deposited over the first conductive layer and semiconductor die. An insulating layer is formed over the encapsulant, semiconductor die, and first conductive layer. A second conductive layer is formed over the insulating layer. A first portion of the first conductive layer is electrically connected to VSS and forms a ground plane. A second portion of the first conductive layer is electrically connected to VDD and forms a power plane. The first conductive layer, insulating layer, and second conductive layer constitute a decoupling capacitor. A microstrip line including a trace of the second conductive layer is formed over the insulating layer and first conductive layer. The first conductive layer is provided on an embedded dummy die, interconnect unit, or modular PCB unit.

公开(公告)号：US20200219859A1

公开(公告)日：2020-07-09

申请号：US16821202

申请日：2020-03-17

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  HeeSoo Lee

IPC: H01L25/10 ,  H01L25/00 ,  H01L23/538 ,  H01L23/552 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56

Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A conductive pillar is formed on the first substrate. A first encapsulant is deposited over the first substrate and semiconductor die after forming the conductive pillar. A groove is formed in the first encapsulant around the conductive pillar. A first passive device is disposed over a second substrate. A second encapsulant is deposited over the first passive device and second substrate. The first substrate is mounted over the second substrate. A shielding layer is formed over the second encapsulant. A second passive device can be mounted over the second substrate opposite the first passive device and outside a footprint of the first substrate.

公开(公告)号：US20200219847A1

公开(公告)日：2020-07-09

申请号：US16826169

申请日：2020-03-21

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  YongMin Kim ,  JaeHyuk Choi ,  YeoChan Ko ,  HeeSoo Lee

IPC: H01L25/065 ,  H01L21/56 ,  H01L25/00 ,  H01L23/552 ,  H01L21/683 ,  H01L23/31 ,  H01L25/16

Abstract: A semiconductor device includes a substrate with an opening formed through the substrate. A first electronic component is disposed over the substrate outside a footprint of the first opening. A second electronic component is disposed over the substrate opposite the first electrical component. A third electronic component is disposed over the substrate adjacent to the first electronic component. The substrate is disposed in a mold including a second opening of the mold over a first side of the substrate. The mold contacts the substrate between the first electronic component and the third electronic component. An encapsulant is deposited into the second opening. The encapsulant flows through the first opening to cover a second side of the substrate. In some embodiments, a mold film is disposed in the mold, and an interconnect structure on the substrate is embedded in the mold film.

公开(公告)号：US10553487B2

公开(公告)日：2020-02-04

申请号：US15675556

申请日：2017-08-11

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Xing Zhao ,  Duk Ju Na ,  Lai Yee Chia

IPC: H01L21/768 ,  H01L23/48 ,  H01L25/065 ,  H01L23/00 ,  H01L21/66

Abstract: A semiconductor device has a semiconductor wafer and a conductive via formed partially through the semiconductor wafer. A portion of the semiconductor wafer and conductive via is removed by a chemical mechanical polishing process. The semiconductor wafer and conductive via are coplanar at first and second surfaces. A first insulating layer and a second insulating layer are formed over the conductive via and semiconductor wafer. The first insulating layer includes an inorganic material and the second insulating layer includes an organic material. An opening in the first and second insulating layers is formed over the conductive via while a second portion of the conductive via remains covered by the first and second insulating layers. A conductive layer is formed over the conductive via and first insulating layer. An interconnect structure is formed over the conductive layer. The semiconductor wafer is singulated into individual semiconductor die.

公开(公告)号：US20200013738A1

公开(公告)日：2020-01-09

申请号：US16027731

申请日：2018-07-05

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  OhHan Kim ,  HeeSoo Lee ,  DaeHyeok Ha ,  Wanil Lee

IPC: H01L23/00 ,  H01L23/538

Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A second substrate has a multi-layered conductive post. The conductive post has a first conductive layer and a second conductive layer formed over the first conductive layer. The first conductive layer is wider than the second conductive layer. A portion of the conductive post can be embedded within the second substrate. The second substrate is disposed over the first substrate adjacent to the semiconductor die. An encapsulant is deposited around the second substrate and semiconductor die. An opening is formed in the second substrate aligned with the conductive post. An interconnect structure is formed in the opening to contact the conductive post. A discrete electrical component is disposed over a surface of the first substrate opposite the semiconductor die. A shielding layer is formed over the discrete electrical component.

公开(公告)号：US10453785B2

公开(公告)日：2019-10-22

申请号：US14814906

申请日：2015-07-31

Applicant: STATS ChipPAC, Ltd.

Inventor： Il Kwon Shim ,  Pandi C. Marimuthu ,  Won Kyoung Choi ,  Sze Ping Goh ,  Jose A. Caparas

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L25/10 ,  H01L23/538

Abstract: A semiconductor device comprises a first semiconductor package including a conductive layer. A substrate including an interconnect structure is disposed over the conductive layer. The interconnect structure of the substrate with the conductive layer of the first semiconductor package are self-aligned. A plurality of openings is formed in the substrate. An adhesive is disposed between the substrate and the first semiconductor package and in the openings of the substrate. A redistribution layer (RDL) is formed over the first semiconductor package opposite the substrate. A pitch of the substrate is different from a pitch of the RDL. The adhesive extends to the interconnect structure of the substrate. A second semiconductor package is disposed over the substrate and the first semiconductor package.

公开(公告)号：US20190318984A1

公开(公告)日：2019-10-17

申请号：US15955014

申请日：2018-04-17

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： SungSoo Kim ,  DaeHyeok Ha ,  SangMi Park

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/552 ,  H05K1/02

Abstract: A semiconductor device has a substrate with a plurality of conductive vias formed through the substrate in an offset pattern. An electrical component is disposed in a die attach area over a first surface of the substrate. The conductive vias are formed around the die attach area of the substrate. A first conductive layer is formed over the first surface of the substrate, and a second conductive layer is formed over the second surface. An encapsulant is deposited over the substrate and electrical component. The substrate is singulated through the conductive vias. A first conductive via has a greater exposed surface area than a second conductive via. A shielding layer is formed over the electrical component and in contact with a side surface of the conductive vias. The shielding layer may extend over a second surface of substrate opposite the first surface of the substrate.