公开(公告)号：US10553487B2

公开(公告)日：2020-02-04

申请号：US15675556

申请日：2017-08-11

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Xing Zhao ,  Duk Ju Na ,  Lai Yee Chia

IPC: H01L21/768 ,  H01L23/48 ,  H01L25/065 ,  H01L23/00 ,  H01L21/66

Abstract: A semiconductor device has a semiconductor wafer and a conductive via formed partially through the semiconductor wafer. A portion of the semiconductor wafer and conductive via is removed by a chemical mechanical polishing process. The semiconductor wafer and conductive via are coplanar at first and second surfaces. A first insulating layer and a second insulating layer are formed over the conductive via and semiconductor wafer. The first insulating layer includes an inorganic material and the second insulating layer includes an organic material. An opening in the first and second insulating layers is formed over the conductive via while a second portion of the conductive via remains covered by the first and second insulating layers. A conductive layer is formed over the conductive via and first insulating layer. An interconnect structure is formed over the conductive layer. The semiconductor wafer is singulated into individual semiconductor die.

公开(公告)号：US20170365517A1

公开(公告)日：2017-12-21

申请号：US15675556

申请日：2017-08-11

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Xing Zhao ,  Duk Ju Na ,  Lai Yee Chia

IPC: H01L21/768 ,  H01L23/00 ,  H01L25/065 ,  H01L23/48 ,  H01L21/66

CPC classification number: H01L21/76898 ,  H01L22/14 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3192 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/03002 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/03602 ,  H01L2224/03616 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05562 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/06181 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16013 ,  H01L2224/16014 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/13091

Abstract: A semiconductor device has a semiconductor wafer and a conductive via formed partially through the semiconductor wafer. A portion of the semiconductor wafer and conductive via is removed by a chemical mechanical polishing process. The semiconductor wafer and conductive via are coplanar at first and second surfaces. A first insulating layer and a second insulating layer are formed over the conductive via and semiconductor wafer. The first insulating layer includes an inorganic material and the second insulating layer includes an organic material. An opening in the first and second insulating layers is formed over the conductive via while a second portion of the conductive via remains covered by the first and second insulating layers. A conductive layer is formed over the conductive via and first insulating layer. An interconnect structure is formed over the conductive layer. The semiconductor wafer is singulated into individual semiconductor die.