公开(公告)号：US20060131666A1

公开(公告)日：2006-06-22

申请号：US11241611

申请日：2005-09-30

申请人： Ming Li ,  Dong-Uk Choi ,  Chang-Woo Oh ,  Dong-Won Kim ,  Min-Sang Kim ,  Sung-Hwan Kim ,  Kyoung-Hwan Yeo

发明人： Ming Li ,  Dong-Uk Choi ,  Chang-Woo Oh ,  Dong-Won Kim ,  Min-Sang Kim ,  Sung-Hwan Kim ,  Kyoung-Hwan Yeo

IPC分类号： H01L21/336

CPC分类号： H01L29/7883 ,  H01L27/108 ,  H01L27/10802 ,  H01L29/42336 ,  H01L29/42392 ,  H01L29/66825 ,  H01L29/7841

摘要： A field effect transistor includes a buried gate pattern that is electrically isolated by being surrounded by a tunneling insulating film. The field effect transistor also includes a channel region that is floated by source and drain regions, a gate insulating film, and the tunneling insulating film. The buried gate pattern and the tunneling insulating film extend into the source and drain regions. Thus, the field effect transistor efficiently stores charge carriers in the buried gate pattern and the floating channel region.

摘要翻译： 场效应晶体管包括通过被隧道绝缘膜包围而电隔离的掩埋栅极图案。 场效应晶体管还包括由源极和漏极区域浮置的沟道区，栅极绝缘膜和隧道绝缘膜。 掩埋栅极图案和隧道绝缘膜延伸到源极和漏极区域。 因此，场效应晶体管有效地将电荷载流子存储在掩埋栅极图案和浮动沟道区域中。

公开(公告)号：US20060043332A1

公开(公告)日：2006-03-02

申请号：US11208545

申请日：2005-08-23

申请人： Hong-Je Cho ,  Seung-Yong Lee ,  Joon-Woo Lee ,  Jae-Yeon Lee ,  Seung-Hwan Chon ,  Yong-Suk Choi ,  Young-Chul Park ,  Jin-Su Kim ,  Kyu-Sang Kim ,  Dong-Uk Choi ,  Kwan-Tack Lim

发明人： Hong-Je Cho ,  Seung-Yong Lee ,  Joon-Woo Lee ,  Jae-Yeon Lee ,  Seung-Hwan Chon ,  Yong-Suk Choi ,  Young-Chul Park ,  Jin-Su Kim ,  Kyu-Sang Kim ,  Dong-Uk Choi ,  Kwan-Tack Lim

IPC分类号： C09K13/06

CPC分类号： C09K13/06

摘要： An etchant for removing an indium oxide layer includes sulfuric acid as a main oxidizer, an auxiliary oxidizer such as H3PO4, HNO3, CH3COOH, HClO4, H2O2, and a Compound A that is obtained by mixing potassium peroxymonosulfate (2KHSO5), potassium bisulfate (KHSO4), and potassium sulfate (K2SO4) together in the ratio of 5:3:2, an etching inhibitor comprising an ammonium-based material, and water. The etchant may remove desired portions of the indium oxide layer without damage to a photoresist pattern or layers underlying the indium oxide layer.

摘要翻译： 用于除去氧化铟层的蚀刻剂包括硫酸作为主要氧化剂，辅助氧化剂如H 3 PO 4，HNO 3， CH 3 COOH，HClO 4，H 2 O 2，以及通过将钾 过硫酸氢盐（2KHSO 5），硫酸氢钾（KHSO 4）和硫酸钾（K 2 SO 4） 一起以5：3：2的比例，包含铵基材料的蚀刻抑制剂和水。 蚀刻剂可以去除铟氧化物层的期望部分，而不损害光致抗蚀剂图案或氧化铟层下面的层。

公开(公告)号：US20050280102A1

公开(公告)日：2005-12-22

申请号：US11089371

申请日：2005-03-25

申请人： Chang-Woo Oh ,  Dong-Gun Park ,  Dong-Won Kim ,  Dong-Uk Choi ,  Kyoung-Hwan Yeo

发明人： Chang-Woo Oh ,  Dong-Gun Park ,  Dong-Won Kim ,  Dong-Uk Choi ,  Kyoung-Hwan Yeo

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L29/08 ,  H01L29/10 ,  H01L29/76 ,  H01L29/786 ,  H01L29/788

CPC分类号： H01L29/0847 ,  H01L29/1054 ,  H01L29/665 ,  H01L29/66621 ,  H01L29/66636 ,  H01L29/66651 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/78687 ,  H01L29/7881

摘要： A field effect transistor (FET) and a method for manufacturing the same, in which the FET may include an isolation film formed on a semiconductor substrate to define an active region, and a gate electrode formed on a given portion of the semiconductor substrate. A channel layer may be formed on a portion of the gate electrode, with source and drain regions formed on either side of the channel layer so that boundaries between the channel layer and the source and drain regions of the FET may be perpendicular to a surface of the semiconductor substrate.

摘要翻译： 场效应晶体管（FET）及其制造方法，其中FET可以包括形成在半导体衬底上以形成有源区的隔离膜，以及形成在半导体衬底的给定部分上的栅电极。 沟道层可以形成在栅电极的一部分上，源极和漏极区形成在沟道层的任一侧上，使得沟道层与FET的源极和漏极区之间的边界可以垂直于 半导体衬底。

公开(公告)号：US08738239B2

公开(公告)日：2014-05-27

申请号：US12817342

申请日：2010-06-17

申请人： Jong Min Kang ,  Ahn Kyun Jung ,  Chun Seung Lee ,  Ji Yun Kim ,  Dong Uk Choi ,  Jung Sun Jo ,  Sung Kon Kim ,  Bong Soo Yoo

发明人： Jong Min Kang ,  Ahn Kyun Jung ,  Chun Seung Lee ,  Ji Yun Kim ,  Dong Uk Choi ,  Jung Sun Jo ,  Sung Kon Kim ,  Bong Soo Yoo

IPC分类号： G06F7/70

CPC分类号： E02F9/123 ,  E02F9/2075 ,  E02F9/2095 ,  H02P2207/05

摘要： A swing control system and method for a construction machine using an electric motor is provided. The swing control system includes a swing electric motor swinging an upper swing structure and a swing control unit. The swing control unit includes a reference speed calculation means for calculating a reference swing speed and a maximum acceleration according to a manipulation signal of a control lever for a swing manipulation; a swing speed determination means for calculating a first speed change amount from a difference between the reference swing speed and an actual swing speed by the electric motor that is currently fed back, calculating a second speed change amount for a sampling time from the maximum acceleration, and determining a swing speed according to the manipulation signal by comparing the first speed change amount and the second speed change amount and adding a smaller amount between the first speed change amount and the second speed change amount obtained as the result of comparison to the actual swing speed currently fed back; and an output torque control means for controlling an output torque of the electric motor by generating a control signal for the determined swing speed.

摘要翻译： 提供了一种使用电动机的施工机械的摆动控制系统和方法。 摆动控制系统包括摆动上摆动结构和摆动控制单元的摆动电动机。 摆动控制单元包括：基准速度计算装置，用于根据用于摆动操作的控制杆的操作信号计算参考摆动速度和最大加速度; 摆动速度确定装置，用于通过当前反馈的电动机从参考摆动速度和实际摆动速度之间的差值计算第一速度变化量，从最大加速度计算采样时间的第二速度变化量， 以及通过比较所述第一速度变化量和所述第二速度变化量来确定根据所述操作信号的摆动速度，并且在作为比较结果而获得的所述第一变速量与所述第二变速量之间加上较小的量与所述实际摆动 速度目前反馈; 以及输出转矩控制装置，用于通过产生用于确定的摆动速度的控制信号来控制电动机的输出转矩。

公开(公告)号：US20130108004A1

公开(公告)日：2013-05-02

申请号：US13593115

申请日：2012-08-23

申请人： Sang Jong Lee ,  Geol Woo Lee ,  Young Baek Kim ,  Jae Don Choi ,  Jae Il Lee ,  Sung Ju Cho ,  Jung Seon An ,  Dong Kyu Lee ,  Hye Jin Kim ,  Dong Uk Choi

发明人： Sang Jong Lee ,  Geol Woo Lee ,  Young Baek Kim ,  Jae Don Choi ,  Jae Il Lee ,  Sung Ju Cho ,  Jung Seon An ,  Dong Kyu Lee ,  Hye Jin Kim ,  Dong Uk Choi

IPC分类号： G21C19/07 ,  G21C15/24

CPC分类号： G21C19/07 ,  G21C15/18 ,  G21C15/24 ,  G21D1/04 ,  G21D3/04 ,  Y02E30/40

摘要： An apparatus for cooling a spent fuel pool having a heat exchanger includes a cooling water pool positioned above the spent fuel pool; a floating device configured to be elevated according to a water level of a cooling water in the spent fuel pool; and an emergency cooling water supply pipe configured to form a path through which the cooling water of the cooling water pool is moved to the spent fuel pool and configured to include a floating valve that opens or closes a flow passage of the cooling water in connection with the elevation of the floating device.

摘要翻译： 一种用于冷却具有热交换器的乏燃料池的设备，包括位于废燃料池上方的冷却水池; 浮动装置，其构造成根据废燃料池中的冷却水的水位升高; 以及紧急冷却水供给管，其构造成形成冷却水池的冷却水通过其移动到废燃料池的路径，并且构成为包括与冷却水的流路连通或关闭的浮动阀， 浮动装置的高程。

公开(公告)号：US20120112542A1

公开(公告)日：2012-05-10

申请号：US13354671

申请日：2012-01-20

申请人： Myung-Hun SHIN ,  Dong-Uk Choi ,  Byoung-June Kim ,  Jin-Seock Kim ,  Czang-Ho Lee ,  Seung-Jae Jung ,  Joon-Young Seo

发明人： Myung-Hun SHIN ,  Dong-Uk Choi ,  Byoung-June Kim ,  Jin-Seock Kim ,  Czang-Ho Lee ,  Seung-Jae Jung ,  Joon-Young Seo

IPC分类号： H02J1/00

CPC分类号： H01L31/042 ,  H01L31/0201 ,  H01L31/046 ,  H01L31/05 ,  H02S40/36 ,  H02S50/10 ,  Y02E10/50 ,  Y10T307/50

摘要： A method of electrically eliminating defective solar cell units that are disposed within an integrated solar cells module and a method of trimming an output voltage of the integrated solar cells module are provided, where the solar cells module has a large number (e.g., 50 or more) of solar cell units integrally disposed therein and initially connected in series one to the next. The method includes providing a corresponding plurality of repair pads, each integrally extending from a respective electrode layer of the solar cell units, and providing a bypass conductor integrated within the module and extending adjacent to the repair pads. Pad-to-pad spacings and pad-to-bypass spacings are such that pad-to-pad connecting bridges may be selectively created between adjacent ones of the repair pads and such that pad-to-bypass connecting bridges may be selectively created between the repair pads and the adjacently extending bypass conductor.

摘要翻译： 提供了一种电除去集成太阳能电池模块内的有缺陷的太阳能电池单元的方法和一种微调集成太阳能电池组件的输出电压的方法，其中太阳能电池模块具有大量（例如，50个或更多个） ）的太阳能电池单元整体地设置在其中并且最初串联连接到下一个。 该方法包括提供相应的多个修复焊盘，每个修补焊盘从太阳能电池单元的相应电极层整体延伸，并且提供集成在模块内并在修补焊盘附近延伸的旁路导体。 垫到衬垫间距和衬垫到旁路间隔使得可以在相邻的修补焊盘之间选择性地创建焊盘到焊盘的连接桥，并且可以在焊盘到旁路的连接桥之间选择性地创建焊盘到旁路的连接桥 修补垫和相邻延伸的旁路导体。

公开(公告)号：US08134873B2

公开(公告)日：2012-03-13

申请号：US12591428

申请日：2009-11-19

申请人： Dong-uk Choi ,  Jung-dal Choi ,  Choong-ho Lee ,  Sung-hoi Hur ,  Min-tai Yu

发明人： Dong-uk Choi ,  Jung-dal Choi ,  Choong-ho Lee ,  Sung-hoi Hur ,  Min-tai Yu

IPC分类号： G11C16/06

CPC分类号： G11C16/16 ,  G11C16/0483 ,  G11C16/10

摘要： A flash memory device includes a bulk region, first through nth memory cell transistors arranged in a row on the bulk region, first through nth word lines respectively connected to gates of the first through nth memory cell transistors, a first dummy cell transistor connected to the first memory cell transistor, a first dummy word line connected to a gate of the first dummy cell transistor, a first selection transistor connected to the first dummy cell transistor, a first selection line connected to a gate of the first selection transistor, and a voltage control unit connected to the first selection line, the voltage control unit being adapted to output to the first selection line a voltage lower than a voltage applied to the bulk region, in an erasing mode for erasing the first through nth memory cell transistors.

摘要翻译： 闪速存储器件包括体区域，在体区域上排列成行的第一至第n个存储单元晶体管，分别连接到第一至第n存储单元晶体管的栅极的第一至第n字线，连接到 第一存储单元晶体管，连接到第一虚设单元晶体管的栅极的第一虚拟字线，连接到第一虚设单元晶体管的第一选择晶体管，连接到第一选择晶体管的栅极的第一选择线， 控制单元连接到第一选择线，电压控制单元适于在以擦除第一至第n个存储单元晶体管的擦除模式中向第一选择线输出低于施加到体区的电压的电压。

公开(公告)号：US07936600B2

公开(公告)日：2011-05-03

申请号：US12141249

申请日：2008-06-18

申请人： Hee-Soo Kang ,  Choong-Ho Lee ,  Dong-Uk Choi

发明人： Hee-Soo Kang ,  Choong-Ho Lee ,  Dong-Uk Choi

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C16/0483 ,  H01L27/11524

摘要： Methods of programming data in a non-volatile memory cell are provided. A memory cell according to some embodiments may include a gate structure that includes a tunnel oxide layer pattern, a floating gate, a dielectric layer and a control gate sequentially stacked on a substrate, impurity regions that are formed in the substrate at both sides of the gate structure, and a conductive layer pattern that is arranged spaced apart from and facing the floating gate. Embodiments of such methods may include applying a programming voltage to the control gate, grounding the impurity regions and applying a fringe voltage to the conductive layer pattern to generate a fringe field in the floating gate.

摘要翻译： 提供了在非易失性存储单元中编程数据的方法。 根据一些实施例的存储器单元可以包括栅极结构，其包括隧道氧化物层图案，浮动栅极，电介质层和顺序堆叠在衬底上的控制栅极，杂质区域形成在衬底的两侧的衬底中 栅极结构以及与浮动栅极间隔开并面对浮栅的导电层图案。 这种方法的实施例可以包括将编程电压施加到控制栅极，使杂质区域接地并且向导电层图案施加边缘电压以在浮动栅极中产生边缘场。

公开(公告)号：US20090221138A1

公开(公告)日：2009-09-03

申请号：US12379190

申请日：2009-02-13

申请人： Hee-Soo KANG ,  Byung-Kyu CHO ,  Choong-Ho LEE ,  Dong-Uk CHOI

发明人： Hee-Soo KANG ,  Byung-Kyu CHO ,  Choong-Ho LEE ,  Dong-Uk CHOI

IPC分类号： H01L21/336

CPC分类号： H01L21/28052 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/66545

摘要： A method of manufacturing a semiconductor device, including forming a plurality of gate structures on a substrate, the gate structures each including a hard mask pattern stacked on a gate conductive pattern, forming an insulating layer pattern between the gate structures at least partially exposing a top surface of the hard mask pattern, forming a trench that exposes at least a top surface of the gate conductive pattern by selectively removing the hard mask pattern, and forming a silicide layer on the exposed gate conductive pattern.

摘要翻译： 一种制造半导体器件的方法，包括在衬底上形成多个栅极结构，所述栅极结构各自包括堆叠在栅极导电图案上的硬掩模图案，在栅极结构之间形成至少部分地暴露顶部的绝缘层图案 形成通过选择性地去除硬掩模图案而暴露出栅极导电图案的至少顶表面的沟槽，以及在暴露的栅极导电图案上形成硅化物层的沟槽。

公开(公告)号：US20090180317A1

公开(公告)日：2009-07-16

申请号：US12416477

申请日：2009-04-01

申请人： Hee-Soo Kang ,  Dong-Uk Choi ,  Choong-Ho Lee ,  Sang-Gu Kang

发明人： Hee-Soo Kang ,  Dong-Uk Choi ,  Choong-Ho Lee ,  Sang-Gu Kang

IPC分类号： G11C16/06

CPC分类号： G11C11/5628 ,  G11C16/0483

摘要： A non-volatile memory device includes a selection transistor coupled to a bit line. The device also includes a plurality of memory cells serially coupled to the selection transistor and at least one dummy cell located between the plurality of memory cells. The dummy cell is turned off during a programming operation of a memory cell located between the dummy cell and the selection transistor.

摘要翻译： 非挥发性存储器件包括耦合到位线的选择晶体管。 该装置还包括串联耦合到选择晶体管的多个存储单元和位于多个存储单元之间的至少一个虚拟单元。 在位于虚设单元和选择晶体管之间的存储单元的编程操作期间，虚设单元关闭。