摘要:
A program generation apparatus according to the present invention includes a translation unit and a generation unit. The translation unit accepts a single HLSL (high level scripting language) script that defines a variety of program structures for programs to be generated, and translates the HLSL script into a plurality of MLSL (middle level scripting language) scripts, each of which describes one of the plurality of program structures defined by the HLSL script, which are different from each other. The generation unit generates programs that respectively correspond to the plurality of MLSL scripts.
摘要:
A process for producing a hose having a connecting portion includes the steps of a connecting step, and a molding step. In the molding step, a dividable mold is employed in which a first sealing member and a second sealing member are retained so as to form a sealing ring. The sealing ring firmly retains a hose in the mold without pinching and damaging it. Further, the mating surfaces of the first sealing member and the second sealing member are disposed so as to deviate from the center of the sealing ring. Furthermore, a chucking member adapted for locally pressing the hose is disposed adjacent to the sealing ring. Moreover, a recessing portion communicating with the cavity of the mold by way of a narrow passage is formed and the first minimum pressure of the molding material, enabling to pass through the narrow passage, is set less than the sealing pressure exerted between the sealing ring and the hose and is set more than the second minimum pressure thereof, enabling to inhibit the short shot failures.
摘要:
A ranging method for measuring the flight distance of a flight object is implemented by means of a simple system construction. The ranging method is also capable of continuing ranging even if an interruption occurs in data transmission. The ranging method comprises the steps of inserting ranging pulses in a telemeter signal transmitted from a transmitting apparatus provided on the flight object, separating and extracting a ranging pulse from a telemeter signal received by a receiving apparatus provided on the ground side, obtaining a time difference between the ranging pulse and a reference clock signal generated in the receiving apparatus on the basis of a time reference equal to that of the transmitting apparatus (clock signal periods t1 and t2 of both time references are equal), and calculating the flight distance. Since there is no need to provide a transponder or the like on the flight object nor to provide a ranging-tracking system on the ground side, it is possible to realize a simple system construction. Since the ranging pulses are transmitted in the state of being contained in the telemeter signal, it is not necessary to independently prepare ranging-signal transmiting means. In addition, since the telemeter signal can be restored at any time on the ground side, it is possible to prevent ranging from being made impossible due to the interruption of transmission of the signal.
摘要:
A motor driving device includes a converter that converts an input alternating current into a direct current, an inverter that inverts the direct current output by the converter into an alternating current for driving a motor, a voltage detecting unit that detects a voltage on a direct current output side of the converter, and a numerical control unit that causes the inverter to output a reactive current to increase electric power consumed in the motor, when the voltage detected by the voltage detecting unit exceeds a predetermined threshold.
摘要:
A motor driving device comprises: a single DC conversion unit that converts input AC into DC; a plurality of AC conversion units that convert DC output from the DC conversion unit into AC supplied to a plurality of motor units as driving electric power; an electric power consumption calculation unit of the DC conversion unit that calculates electric power consumption of the DC conversion unit from the input voltage and input current to the DC conversion unit every predetermined time period; and a maximum output calculation unit of the DC conversion unit that extracts a maximum value from the electric power consumption of the DC conversion unit calculated every predetermined time period and outputs it as a maximum output of the DC conversion unit.
摘要:
A compiler apparatus that improves the performance of loop processing. The compiler apparatus translates a C program that includes a loop into a machine language program, and includes: a movement judgment unit that judges whether or not an instruction which is positioned outside of the loop of the C program can be moved into the loop, based on a state of live ranges of variables used in the instruction; a movement execution unit that moves the instruction into the loop in the case where the movement judgment unit judges that the instruction can be moved into the loop, thereby generating an intermediate program; and a translation unit that translates the intermediate program into the machine language program.
摘要:
In order to overcome the problem that conditionally executed instructions are executed as no-operation instructions if their condition is not fulfilled, leading to poor utilization efficiency of the hardware and lowering the effective performance, the processor decodes a number of instructions that is greater than the number of provided computing units and judges their execution conditions with an instruction issue control portion before the execution stage, Instructions for which the condition is false are invalidated, and subsequent valid instructions are assigned so that the computing units (hardware) is used efficiently. A compiler performs scheduling such that the number of instructions whose execution condition is true does not exceed the upper limit of the degree of parallelism of the hardware. The number of instructions arranged in parallel at each cycle may exceed the degree of parallelism of the hardware.
摘要:
A processor according to the present invention includes a decoding unit 20, an operation unit 40 and others. When the decoding unit 20 decodes Instruction vcchk, the operation unit 40 and the like judges whether vector condition flags VC0˜VC3 (110) of a condition flag register (CFR) 32 are all zero or not, and (i) sets condition flags C4 and C5 of the condition flag register (CFR) 32 to 1 and 0, respectively, when all of the vector condition flags VC0˜VC3 are zero, and (ii) sets the condition flags C4 and C5 to 0 and 1, respectively, when not all the vector condition flags are zero. Then, the vector condition flags VC0˜VC3 are stored in the condition flags C0˜C3.
摘要:
A compiler apparatus enables description of a particular hardware module in the existing programming language, although the description has not been possible in hardware designing to input programming language. In the header file 24, a particular hardware indescribable in programming language is defined. And the compiler apparatus includes a parser unit 30 analyzing syntax of source program 22, an intermediate code converting unit 32 converting the syntactically analyzed source program 22 to an intermediate code and code generating unit 36 converting the intermediate code to the RTL description. The intermediate code converting unit 32 includes a detecting unit 40 detecting a particular hardware defined in the header file 24 out of the source program 22 and a replacing unit 42 replacing the detected particular hardware in the detecting unit 40 with the intermediate code corresponding to a particular hardware.
摘要:
A processor according to the present invention includes a decoding unit 20, an operation unit 40 and others. When the decoding unit 20 decodes Instruction vcchk, the operation unit 40 and the like judges whether vector condition flags VC0˜VC3 (110) of a condition flag register (CFR) 32 are all zero or not, and (i) sets condition flags C4 and C5 of the condition flag register (CFR) 32 to 1 and 0, respectively, when all of the vector condition flags VC0˜VC3 are zero, and (ii) sets the condition flags C4 and C5 to 0 and 1, respectively, when not all the vector condition flags are zero. Then, the vector condition flags VC0˜VC3 are stored in the condition flags C0˜C3.