Compound semiconductor epitaxial substrate and method for manufacturing the same
    51.
    发明授权
    Compound semiconductor epitaxial substrate and method for manufacturing the same 有权
    复合半导体外延基板及其制造方法

    公开(公告)号:US07732836B2

    公开(公告)日:2010-06-08

    申请号:US10540513

    申请日:2003-12-19

    CPC classification number: H01L29/7785

    Abstract: In a compound semiconductor epitaxial substrate used for a strain channel high electron mobility field effect transistor which comprises an InGaAs layer as a channel layer 9 and AlGaAs layers containing n-type impurities as electron supplying layers 6 and 12, the channel layer 9 has an electron mobility at room temperature of 8300 cm2/V·s or more by adjusting an In composition of the InGaAs layer composing the channel layer 9 to 0.25 or more and optimizing the In composition and the thickness of the channel layer 9. GaAs layers 8 and 10 having a thickness of 4 nm or more each may be laminated respectively in contact with a top surface and a bottom surface of the channel layer 9.

    Abstract translation: 在用于包含InGaAs层作为沟道层9的应变通道高电子迁移率场效应晶体管和包含n型杂质作为电子供给层6和12的AlGaAs层的化合物半导体外延基板中,沟道层9具有电子 通过将构成沟道层9的InGaAs层的In组成调整至0.25以上,使In的组成和沟道层9的厚度最优化,室温下的迁移率为8300cm2 / V·s以上。GaAs层8,10 各自的厚度为4nm以上的层叠体可分别与沟道层9的上表面和底面接触。

    THIN FILM TRANSISOTR AND DISPLAY DEVICE
    52.
    发明申请
    THIN FILM TRANSISOTR AND DISPLAY DEVICE 有权
    薄膜透镜和显示器件

    公开(公告)号:US20090218568A1

    公开(公告)日:2009-09-03

    申请号:US12391398

    申请日:2009-02-24

    Abstract: To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.

    Abstract translation: 为了改善薄膜晶体管的导通电流和截止电流的问题,薄膜晶体管包括一对杂质半导体层,赋予一种导电类型的杂质元素,在其间具有间隔; 在所述栅极绝缘层上与所述栅电极和添加了赋予一种导电类型的杂质元素的所述一对杂质半导体层中的一个重叠的导电层; 以及非晶半导体层,其被连续地设置在赋予一种导电类型的杂质元素的一对杂质半导体层之间,使得非晶半导体层从导电层延伸到栅极绝缘层上并且接触 同时添加赋予一种导电类型的杂质元素的一对杂质半导体层。

    Parameter setting method and circuit operation testing method and electronic processing device
    53.
    发明授权
    Parameter setting method and circuit operation testing method and electronic processing device 有权
    参数设定方法及电路运行试验方法及电子处理装置

    公开(公告)号:US07463988B2

    公开(公告)日:2008-12-09

    申请号:US11644350

    申请日:2006-12-21

    CPC classification number: G06F17/5036

    Abstract: The invention provides a method for testing a circuit operation (circuit simulation), which is conducted by using a model of high precision. After parameters are extracted by using a model of which physical precision is low and parameter extraction time is short from measurement data, the parameters are converted to those obtained by a model of which parameter extraction time is generally long and a circuit operation test is performed by a model of high physical precision. In other words, a parameter is extracted first by a model of low physical precision and then, the extracted parameter is converted into a parameter obtained by the model of high physical precision. Finally, a circuit operation test is performed by using the model having high physical precision.

    Abstract translation: 本发明提供了一种通过使用高精度模型进行电路操作(电路仿真)的测试方法。 通过使用物理精度低,参数提取时间短的测量数据的模型提取参数后,将参数转换为通过参数提取时间一般较长的模型获得的参数,并进行电路运行测试 高度物理精度的模型。 换句话说,首先通过低物理精度的模型提取参数,然后将提取的参数转换为由高物理精度的模型获得的参数。 最后,通过使用具有高物理精度的模型进行电路操作测试。

    Semiconductor device and position detection system using semiconductor device
    56.
    发明申请
    Semiconductor device and position detection system using semiconductor device 有权
    半导体器件和使用半导体器件的位置检测系统

    公开(公告)号:US20070273522A1

    公开(公告)日:2007-11-29

    申请号:US11802246

    申请日:2007-05-21

    Abstract: A position detection system is formed by network connection of a plurality of interrogators and a server. An RFID and the interrogators communicate wirelessly, whereby a distance from each interrogator to the RFID is searched to search a position of the RFID from the distance. In order to calculate the distance from the interrogator to the RFID, a signal is oscillated with a frequency corresponding to amplitude of a signal received in the RFID from the interrogator. A frequency of a signal oscillated in the RFID is detected in the RFID or by the interrogator, whereby a distance from the interrogator to the RFID is detected.

    Abstract translation: 通过多个询问器和服务器的网络连接形成位置检测系统。 RFID和询问器以无线方式进行通信,从而搜索从每个询问器到RFID的距离,以从远处搜索RFID的位置。 为了计算从询问器到RFID的距离,信号以对应于来自询问器的RFID中接收的信号的幅度的频率振荡。 在RFID中或由询问器检测到在RFID中振荡的信号的频率,从而检测到从询问器到RFID的距离。

    High electron mobility epitaxial substrate
    57.
    发明授权
    High electron mobility epitaxial substrate 有权
    高电子迁移率外延衬底

    公开(公告)号:US07291873B2

    公开(公告)日:2007-11-06

    申请号:US10540514

    申请日:2003-12-19

    CPC classification number: H01L29/7785

    Abstract: A compound semiconductor epitaxial substrate for use in a strain channel high electron mobility field effect transistor, comprising an InGaAs layer as a strain channel layer 6 and AlGaAs layers containing n-type impurities as back side and front side electron supplying layers 3 and 9, wherein an emission peak wavelength from the strain channel layer 6 at 77 K is set to 1030 nm or more by optimizing the In composition and the thickness of the strain channel layer 6.

    Abstract translation: 一种用于应变通道高电子迁移率场效应晶体管的化合物半导体外延基板,包括作为应变通道层6的InGaAs层和含有n型杂质的AlGaAs层作为背面侧和前侧电子供给层3和9,其中 通过优化应变通道层6的In组成和厚度,将77K处的应变通道层6的发射峰值波长设定为1030nm以上。

    Parameter setting method and circuit operation testing method and electronic processing device
    58.
    发明申请
    Parameter setting method and circuit operation testing method and electronic processing device 有权
    参数设定方法及电路运行试验方法及电子处理装置

    公开(公告)号:US20070150250A1

    公开(公告)日:2007-06-28

    申请号:US11644350

    申请日:2006-12-21

    CPC classification number: G06F17/5036

    Abstract: The invention provides a method for testing a circuit operation (circuit simulation), which is conducted by using a model of high precision. After parameters are extracted by using a model of which physical precision is low and parameter extraction time is short from measurement data, the parameters are converted to those obtained by a model of which parameter extraction time is generally long and a circuit operation test is performed by a model of high physical precision. In other words, a parameter is extracted first by a model of low physical precision and then, the extracted parameter is converted into a parameter obtained by the model of high physical precision. Finally, a circuit operation test is performed by using the model having high physical precision.

    Abstract translation: 本发明提供了一种通过使用高精度模型进行电路操作(电路仿真)的测试方法。 通过使用物理精度低,参数提取时间短的测量数据的模型提取参数后,将参数转换为通过参数提取时间一般较长的模型获得的参数,并进行电路运行测试 高度物理精度的模型。 换句话说,首先通过低物理精度的模型提取参数,然后将提取的参数转换为由高物理精度的模型获得的参数。 最后,通过使用具有高物理精度的模型进行电路操作测试。

Patent Agency Ranking