摘要:
There is disclosed a method of manufacturing a capacitor in a semiconductor device capable of effectively removing the organic impurity of a Ta2O5 film by performing an in-situ plasma process using the mixture gas of nitrogen and oxygen during the process of forming the Ta2O5 film as the dielectric film of the capacitor. Thus, it can reduce the impurity of the Ta2O5 film to increase the supply of oxygen, and thus can improve the dielectric and leak current characteristic of the Ta2O5 film. Further, it can prohibit oxidization of the underlying electrode, thus reducing the thickness of the equivalent oxide film of the capacitor as possible and sufficiently securing the capacitance of the capacitor. The method according to the present invention includes forming a polysilicon film on a semiconductor substrate in which a given underlying structure is formed; sequentially forming a first buffer layer and a metal layer on the polysilicon film to form a lower electrode; forming a Ta2O5 film on the metal layer, wherein the process of depositing the Ta2O5 film is performed by a plasma process under the mixture gas atmosphere of nitrogen and oxygen; and forming a second buffer layer and an upper electrode on the Ta2O5 film.
摘要翻译:公开了一种在半导体器件中制造电容器的方法,其能够通过在形成Ta 2 O 5膜的过程中使用氮和氧的混合气体进行原位等离子体处理来有效地除去Ta 2 O 5膜的有机杂质,作为 电容器的介质膜。 因此,可以减少Ta2O5薄膜的杂质,增加氧气供应,从而可以提高Ta2O5薄膜的介电和漏电流特性。 此外,它可以禁止底层电极的氧化,从而尽可能地减小电容器的等效氧化膜的厚度,并充分确保电容器的电容。 根据本发明的方法包括在其中形成给定的底层结构的半导体衬底上形成多晶硅膜; 在多晶硅膜上依次形成第一缓冲层和金属层,形成下电极; 在金属层上形成Ta2O5膜,其中在氮和氧的混合气体气氛下通过等离子体工艺进行沉积Ta2O5膜的工艺; 并在Ta 2 O 5膜上形成第二缓冲层和上电极。
摘要:
The present invention relates to a method of manufacturing a capacitor in a semiconductor device. It is designed to solve the problem due to oxidization of the surface of the underlying tungsten electrode during thermal process performed after depositing Ta2O5 to form a dielectric film in a Ta2O5 capacitor of a MIM (Metal Insulator Metal) structure using tungsten (W) as an underlying electrode. Thus, the present invention includes forming a good thin WO3 film by processing the surface of the underlying tungsten electrode by low oxidization process before forming a Ta2O5 dielectric film and then performing deposition and thermal process of Ta2O5 to form a Ta2O5 dielectric film. As a good WO3 film is formed on the surface of the underlying tungsten electrode before forming a Ta2O5 dielectric film, the grain boundary of the tungsten film is filled with oxygen atoms, thus preventing diffusion of oxygen atoms from the Ta2O5 dielectric film during a subsequent thermal process. Also, as a further oxidization of the surface of the underlying tungsten electrode by the WO3 film could be prevented, thereby improving the characteristic of the leak current of the Ta2O5 capacitor.
摘要翻译:本发明涉及一种在半导体器件中制造电容器的方法。 其设计用于解决在沉积Ta 2 O 5之后进行的热处理期间底层钨电极的表面的氧化的问题,以在使用钨(W)作为(W)的MIM(金属绝缘体金属)结构的MIM(金属绝缘体金属)结构的Ta 2 O 5电容器中形成介电膜 底层电极。 因此,本发明包括通过在形成Ta 2 O 5介电膜之前通过低氧化处理来处理下面的钨电极的表面,然后进行Ta 2 O 5的沉积和热处理以形成Ta 2 O 5电介质膜来形成良好的薄WO 3膜。 由于在形成Ta 2 O 5电介质膜之前在下面的钨电极的表面上形成良好的WO 3膜,所以钨膜的晶界被氧原子填充,从而防止在随后的热过程中氧原子从Ta 2 O 5介电膜扩散 处理。 此外,通过WO 3膜可以防止下层钨电极的表面的进一步氧化,从而提高Ta2O5电容器的漏电流的特性。
摘要:
A multi-chip package includes a voltage generating circuit configured to generate a power source voltage and a plurality of memory chips coupled to the voltage generating circuit to each receive the power source voltage, wherein the memory chips are each configured to postpone an operation if the power source voltage is lower than a target voltage and perform the operation when the power source voltage reaches the target voltage.
摘要:
A semiconductor memory device includes word lines stacked over a substrate having a plurality of memory block regions, select lines arranged over the word lines, vertical channel layers formed to penetrate through the select lines and the word lines and extending to the substrate, and a charge trap layer disposed between the word lines and the vertical channel layers, wherein the stacked word lines are separated by memory block groups that each include two or more memory block regions.
摘要:
A method of performing a read operation in a flash memory device is disclosed. The flash memory has a memory cell array including at least one block, the block having a plurality of pages. The method comprises receiving a read command to read data from a selected page in the block; determining whether or not the block has any page that has not been programmed; performing a dummy data program operation on at least one page that is determined not to have been programmed; and executing the read command to read the data of the selected page after the dummy data program operation is completed.
摘要:
A swing width control circuit and a high voltage pumping circuit using the same are disclosed. The swing width control circuit includes a swing width controller for receiving a first pumping signal having a first swing width and generating a second pumping signal having a second swing width larger than the first swing width of the first pumping signal, in accordance with a level of a supply voltage to pump or precharge a voltage of a specific node, and a swing width holding device for maintaining a swing width of the specific node to be equal to the second swing width of the second pumping signal.
摘要:
A method of performing a read operation in a flash memory device is disclosed. The flash memory has a memory cell array including at least one block, the block having a plurality of pages. The method comprises receiving a read command to read data from a selected page in the block; determining whether or not the block has any page that has not been programmed; performing a dummy data program operation on at least one page that is determined not to have been programmed; and executing the read command to read the data of the selected page after the dummy data program operation is completed.
摘要:
A method of operating a nonvolatile memory device includes performing a reset operation for setting a level of a program voltage to a first level, performing a program operation and a verification operation on memory cells included in a first page of a first memory block while raising the program voltage from the first level, storing a level of the program voltage, supplied to the first page when memory cells programmed to have threshold voltages with at least a verification voltage are detected during the verification operation, as a second level, while raising the program voltage from the second level, performing the program operation and the verification operation on each of second to last pages of the first memory block, and after completing the program operation for the first memory block, performing the reset operation for setting the level of the program voltage to the first level.
摘要:
Multi-chip package devices and related data programming methods are disclosed. A multi-chip package device includes one or more memory chips and a controller. The one or more memory chips include a single level cell section and a multi level cell section. The controller is configured to control a first data storing operation for storing an input data to the single level cell section and control a second data storing operation for storing the input data stored in the single level section to the multi level cell section during an idle time.
摘要:
A method of operating a nonvolatile memory device includes performing a reset operation for setting a level of a program voltage to a first level, performing a program operation and a verification operation on memory cells included in a first page of a first memory block while raising the program voltage from the first level, storing a level of the program voltage, supplied to the first page when memory cells programmed to have threshold voltages with at least a verification voltage are detected during the verification operation, as a second level, while raising the program voltage from the second level, performing the program operation and the verification operation on each of second to last pages of the first memory block, and after completing the program operation for the first memory block, performing the reset operation for setting the level of the program voltage to the first level.