公开(公告)号：US07416997B2

公开(公告)日：2008-08-26

申请号：US11281177

申请日：2005-11-17

申请人： Kyong-Min Kim ,  Sang-Kyu Park ,  Sang-Woon Kim ,  Jae-Hwan Kim

发明人： Kyong-Min Kim ,  Sang-Kyu Park ,  Sang-Woon Kim ,  Jae-Hwan Kim

IPC分类号： H01L21/31

CPC分类号： H01L21/02164 ,  H01L21/0217 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/31612 ,  H01L21/3185 ,  H01L21/324 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A method of fabricating a semiconductor device having a silicon nitride layer substantially free of impurities includes forming a silicon nitride layer on a semiconductor substrate and annealing the semiconductor substrate having the silicon nitride layer in an atmosphere of ammonia (NH3) gas to remove impurities from the silicon nitride layer. The silicon nitride layer may be formed using BTBAS as a silicon precursor.

摘要翻译： 一种制造具有基本上不含杂质的氮化硅层的半导体器件的方法包括在半导体衬底上形成氮化硅层，并在氨气氛中退火具有氮化硅层的半导体衬底（NH 3 >）气体以从氮化硅层去除杂质。 可以使用BTBAS作为硅前体形成氮化硅层。

公开(公告)号：US20070246768A1

公开(公告)日：2007-10-25

申请号：US11653592

申请日：2007-01-16

申请人： Kyong-min Kim ,  Byoung-dong Kim ,  Sung-ki Seo

发明人： Kyong-min Kim ,  Byoung-dong Kim ,  Sung-ki Seo

IPC分类号： H01L21/8247 ,  H01L29/788

CPC分类号： H01L29/7883 ,  H01L29/40114 ,  H01L29/42324 ,  H01L29/513

摘要： A nonvolatile memory device and a method of fabricating the same are disclosed. The method includes forming a tunnel oxide film and a conductive film for a floating gate on a semiconductor substrate; nitriding the top surface of the conductive film for a floating gate; oxidizing the nitrided top surface of the conductive film for a floating gate that is nitrided, forming an ONO film comprising a lower oxide film, a nitride film and an upper oxide film sequentially laminated on the surface-modified conductive film for a floating gate to complete formation of the dielectric film; and forming the conductive film for a control gate on the dielectric film.

摘要翻译： 公开了一种非易失性存储器件及其制造方法。 该方法包括在半导体衬底上形成隧道氧化物膜和浮栅的导电膜; 氮化导电膜的顶表面用于浮动栅极; 氧化用于被氮化的浮栅的导电膜的氮化顶表面，形成包含依次层压在用于浮动栅极的表面改性导电膜上的低氧化物膜，氮化物膜和上氧化膜的ONO膜以完成 电介质膜的形成; 并在电介质膜上形成用于控制栅极的导电膜。

公开(公告)号：US20060128108A1

公开(公告)日：2006-06-15

申请号：US11297939

申请日：2005-12-09

申请人： Kyong-Min Kim ,  Dong-Jun Kim ,  Byoung-Dong Kim

发明人： Kyong-Min Kim ,  Dong-Jun Kim ,  Byoung-Dong Kim

IPC分类号： H01L21/20

CPC分类号： H01L21/31645 ,  C23C16/34 ,  C23C16/56 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/3141 ,  H01L21/3142 ,  H01L21/31616 ,  H01L21/76843 ,  H01L21/76864 ,  H01L27/0688 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is provided for forming a titanium nitride layer in a metal-insulator-metal (MIM) capacitor. The deposition of a titanium nitride layer is carried out by means of an MOCVD method using a metallo-organic material as a source gas, followed by a rapid thermal process (RTP) at a high temperature. Through the RTP, impurities in the titanium nitride layer are removed and a surface area of the titanium nitride layer is increased in comparison with the titanium nitride layer before the RTP. The titanium nitride layer with increased surface area is useful for a lower electrode of a MIM capacitor.

摘要翻译： 提供了一种用于在金属 - 绝缘体 - 金属（MIM）电容器中形成氮化钛层的方法。 氮化钛层的沉积通过使用金属有机材料作为源气体的MOCVD方法进行，随后在高温下进行快速热处理（RTP）。 通过RTP，去除氮化钛层中的杂质，并且与RTP之前的氮化钛层相比，氮化钛层的表面积增加。 具有增加的表面积的氮化钛层可用于MIM电容器的下电极。

公开(公告)号：US06653197B2

公开(公告)日：2003-11-25

申请号：US09867657

申请日：2001-05-31

申请人： Kyong Min Kim ,  Kwang Jun Cho ,  Jong Min Lee

发明人： Kyong Min Kim ,  Kwang Jun Cho ,  Jong Min Lee

IPC分类号： H01L2120

CPC分类号： H01L21/02183 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/02356 ,  H01L21/3143 ,  H01L28/60

摘要： Disclosed herein is a method for the fabrication of a capacitor of semiconductor device, which is capable of increasing a charge storage capacitance of the capacitor while generation of leakage current in the capacitor. The method comprises the steps of: forming a ruthenium film as a lower electrode on a semiconductor substrate; forming a TaON film having a high dielectric constant on the ruthenium film; and forming a upper electrode on the TaON film.

摘要翻译： 这里公开了一种用于制造半导体器件的电容器的方法，其能够在电容器中产生漏电流的同时增加电容器的电荷存储电容。 该方法包括以下步骤：在半导体衬底上形成作为下电极的钌膜; 在钌膜上形成具有高介电常数的TaON膜; 并在TaON膜上形成上电极。

公开(公告)号：US06329237B1

公开(公告)日：2001-12-11

申请号：US09466896

申请日：1999-12-20

申请人： Kyong Min Kim ,  Chan Lim ,  Kil Ho Lee ,  Ki Seon Park

发明人： Kyong Min Kim ,  Chan Lim ,  Kil Ho Lee ,  Ki Seon Park

IPC分类号： H01L218242

CPC分类号： H01L21/31691 ,  C23C16/405 ,  C23C16/409 ,  C23C16/56 ,  H01L28/55

摘要： There is disclosed a method of making a high dielectric capacitor of a semiconductor device using Ta2O5, BST((Ba1−xSrx)TiO3) etc. of a high dielectric characteristic as a capacitor dielectric film in a very high integrated memory device. The present invention has its object to provide a method of manufacturing a high dielectric capacitor of a semiconductor device, which can effectively remove carbon contained within the thin film after deposition of the BST film and defects of oxygen depletion caused upon deposition of the thin film and which can also remove carbon contained within the thin film after deposition of the tantalum oxide film and defects of oxygen depletion caused upon deposition of the thin film, without further difficult processes or without any deterioration of the electrical characteristic of the capacitor. It employs the technology which is able to effectively removing defects of carbon and oxygen depletion within the thin film, by forming a plasma O3 gas having a good reactivity and by processing the plasma for the BST thin film and tantalum oxide film. Thus, it can extend the lifetime of the activated oxygen of oxygen, which had been a problem in processing a conventional UV-O3, by means of plasma process using O3 gas. Therefore, it can effectively remove defects of carbon and oxygen within the BST thin film and tantalum oxide film without complicating the process or deteriorating the electrical characteristic of the capacitor. The present invention also proposes a detailed process condition, which can optimize the plasma process using O3 gas.

摘要翻译： 公开了在非常高的集成存储器件中使用具有高介电特性的Ta2O5，BST（（Ba1-xSrx）TiO3）等作为电容器电介质膜的半导体器件的高介电电容器的方法。 本发明的目的是提供一种制造半导体器件的高介电电容器的方法，其可以有效地去除沉积BST膜之后的薄膜中包含的碳和沉积薄膜时引起的氧耗损缺陷， 其也可以在沉积氧化钽膜之后，除去薄膜中所含的碳和沉积薄膜所引起的氧耗尽的缺陷，而不需要进一步的困难处理或不会使电容器的电特性恶化。 通过形成具有良好反应性的等离子体O 3气体和通过处理BST薄膜和氧化钽膜的等离子体，采用能够有效地去除薄膜内的碳和氧缺乏的缺陷的技术。 因此，通过使用O 3气体的等离子体处理，可以延长氧气的活化氧的寿命，这在处理常规的UV-O 3中是一个问题。 因此，可以有效地去除BST薄膜和氧化钽膜内的碳和氧的缺陷，而不会使工艺复杂化或劣化电容器的电特性。 本发明还提出了一种详细的工艺条件，其可以优化使用O 3气体的等离子体工艺。

公开(公告)号：US5676751A

公开(公告)日：1997-10-14

申请号：US589491

申请日：1996-01-22

申请人： Mohsen Banan ,  Harold W. Korb ,  Kyong-Min Kim

发明人： Mohsen Banan ,  Harold W. Korb ,  Kyong-Min Kim

IPC分类号： C30B15/00 ,  C30B15/14 ,  C30B29/06 ,  H01L21/208 ,  C30B25/20

CPC分类号： C30B29/06 ,  C30B15/14 ,  C30B15/206 ,  Y10T117/1032

摘要： A Czochralski method for producing monocrystals wherein a single crystal silicon rod is pulled from a silicon melt contained in a crucible within a chamber. After pulling the single crystal silicon rod from a silicon melt in a chamber, the chamber is cooled by flowing a gas having a thermal conductivity of at least about 55.times.10.sup.-5 g.cal./(sec..multidot.cm.sup.2)(.degree.C./cm) at 800.degree. K into the chamber. The preferred cooling gas is a helium-containing gas.

摘要翻译： 一种用于制造单晶的切克劳斯基法，其中单晶硅棒从容纳在腔室内的坩埚中的硅熔体中拉出。 在室中从硅熔体拉出单晶硅棒之后，通过使具有至少约55×10 -5 g.cal ./（sec×cm 2）（℃/ cm）的热导率的气体流动来冷却该室 ）在800°K进入腔室。 优选的冷却气体是含氦气体。

公开(公告)号：US5578284A

公开(公告)日：1996-11-26

申请号：US483304

申请日：1995-06-07

申请人： Sadasivam Chandrasekhar ,  Kyong-Min Kim

发明人： Sadasivam Chandrasekhar ,  Kyong-Min Kim

IPC分类号： C30B15/20 ,  C30B15/00 ,  C30B15/36 ,  C30B29/06 ,  H01L21/208 ,  C01B33/02

CPC分类号： C30B29/06 ,  C30B15/00 ,  Y10T117/1004 ,  Y10T117/1008

摘要： A silicon single crystal prepared by the Czochralski method including a neck having an upper portion, an intermediate portion, and a lower portion. The upper portion contains dislocations. The intermediate portion is between the upper and lower portions. A majority of the intermediate and lower portions has a diameter greater than 10 millimeters, and the lower portion is free of dislocations. The crystal also includes an outwardly flaring segment adjacent the lower portion of the neck, and a body adjacent the outwardly flaring segment.

摘要翻译： 通过切克劳斯基法制备的硅单晶包括具有上部，中间部分和下部的颈部。 上部包含位错。 中间部分在上部和下部之间。 中间部分和下部部分的大部分具有大于10毫米的直径，并且下部部分没有位错。 晶体还包括邻近颈部下部的向外扩张部分，以及与向外扩张部分相邻的主体。

公开(公告)号：US5484738A

公开(公告)日：1996-01-16

申请号：US396985

申请日：1995-03-01

申请人： Shao-Fu S. Chu ,  Chang-Ming Hsieh ,  Louis L. C. Hsu ,  Kyong-Min Kim ,  Shaw-Ning Mei

发明人： Shao-Fu S. Chu ,  Chang-Ming Hsieh ,  Louis L. C. Hsu ,  Kyong-Min Kim ,  Shaw-Ning Mei

IPC分类号： H01L21/76 ,  H01L21/02 ,  H01L21/762 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/12 ,  H01L29/786 ,  H01L21/265

CPC分类号： H01L21/8249 ,  H01L21/76251 ,  H01L27/0623 ,  Y10S148/01 ,  Y10S148/011 ,  Y10S148/012 ,  Y10S148/05 ,  Y10S148/151

摘要： A bonded, SOI wafer which has stepped isolation trenches and sublayer interconnections first formed in a bulk silicon wafer. After these process steps are complete, a thin polysilicon layer is formed on the planarized upper surface of the bulk silicon wafer. This thin polysilicon layer is then bound to an oxide layer on the surface of a separate wafer to form a bonded silicon-on-oxide structure. The entire assembly is, in effect inverted, and what had been the lower surface of the bulk silicon wafer, is removed to the bottom of the deepest trench step. In this bonded SOI structure, regions between the trenches are deep and suitable for bipolar device fabrication, while the trench steps form shallow regions suitable for fabrication of CMOS devices.

摘要翻译： 首先形成在体硅晶片中的具有阶梯式隔离沟槽和子层互连的键合SOI晶片。 在这些工艺步骤完成之后，在本体硅晶片的平坦化上表面上形成薄多晶硅层。 然后将该薄多晶硅层结合到单独晶片的表面上的氧化物层，以形成键合的氧化硅结构。 整个组件实际上是倒置的，并且本体硅晶片的下表面被移除到最深沟槽台阶的底部。 在这种键合的SOI结构中，沟槽之间的区域是深的并且适合于双极器件制造，而沟槽台阶形成适于制造CMOS器件的浅区域。

公开(公告)号：US5061652A

公开(公告)日：1991-10-29

申请号：US468533

申请日：1990-01-23

申请人： Robert E. Bendernagel ,  Kyong-Min Kim ,  Victor J. Silvestri ,  Pavel Smetana ,  Thomas H. Strudwick ,  William H. White

发明人： Robert E. Bendernagel ,  Kyong-Min Kim ,  Victor J. Silvestri ,  Pavel Smetana ,  Thomas H. Strudwick ,  William H. White

IPC分类号： H01L29/73 ,  H01L21/205 ,  H01L21/331 ,  H01L21/74 ,  H01L21/76 ,  H01L21/762 ,  H01L29/06 ,  H01L29/732 ,  H01L29/78

CPC分类号： H01L21/76202 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/74 ,  H01L21/762 ,  H01L21/76224

摘要： A semiconductor structure including a doped semiconductor substrate defining a surface. A buffer layer of epitaxial semiconductor material overlies the substrate surface, the buffer layer having a relatively higher dopant concentration than the substrate and being virtually free from oxygen precipitation. A layer of intrinsic semiconductor material overlies the buffer layer, and a device layer of epitaxial semiconductor material is situated on the intrinsic layer. The device layer is formed to have a relatively lower dopant concentration than the first layer. Isolation regions extend from a surface of the device layer into the buffer layer for forming an electrically isolated device region in the device layer. At least one active device is formed in the isolated device region.

公开(公告)号：US20060160358A1

公开(公告)日：2006-07-20

申请号：US11281177

申请日：2005-11-17

申请人： Kyong-Min Kim ,  Sang-Kyu Park ,  Sang-Woon Kim ,  Jae-Hwan Kim

发明人： Kyong-Min Kim ,  Sang-Kyu Park ,  Sang-Woon Kim ,  Jae-Hwan Kim

IPC分类号： H01L21/44

CPC分类号： H01L21/02164 ,  H01L21/0217 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/31612 ,  H01L21/3185 ,  H01L21/324 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A method of fabricating a semiconductor device having a silicon nitride layer substantially free of impurities includes forming a silicon nitride layer on a semiconductor substrate and annealing the semiconductor substrate having the silicon nitride layer in an atmosphere of ammonia (NH3) gas to remove impurities from the silicon nitride layer. The silicon nitride layer may be formed using BTBAS as a silicon precursor.

摘要翻译： 一种制造具有基本上不含杂质的氮化硅层的半导体器件的方法包括在半导体衬底上形成氮化硅层，并在氨气氛中退火具有氮化硅层的半导体衬底（NH 3 >）气体以从氮化硅层去除杂质。 可以使用BTBAS作为硅前体形成氮化硅层。