公开(公告)号：US11892967B2

公开(公告)日：2024-02-06

申请号：US17901720

申请日：2022-09-01

Applicant: Amazon Technologies, Inc.

Inventor： Erez Izenberg ,  Leah Shalev ,  Nafea Bshara ,  Guy Nakibly ,  Georgy Machulsky

IPC: G06F15/167 ,  H04L69/22 ,  G06F16/22

CPC classification number: G06F15/167 ,  G06F16/22 ,  H04L69/22

Abstract: Apparatus and methods are disclosed herein for remote, direct memory access (RDMA) technology that enables direct memory access from one host computer memory to another host computer memory over a physical or virtual computer network according to a number of different RDMA protocols. In one example, a method includes receiving remote direct memory access (RDMA) packets via a network adapter, deriving a protocol index identifying an RDMA protocol used to encode data for an RDMA transaction associated with the RDMA packets, applying the protocol index to a generate RDMA commands from header information in at least one of the received RDMA packets, and performing an RDMA operation using the RDMA commands.

公开(公告)号：US11860810B2

公开(公告)日：2024-01-02

申请号：US17952144

申请日：2022-09-23

Applicant: Amazon Technologies, Inc.

Inventor： Islam Atta ,  Christopher Joseph Pettey ,  Asif Khan ,  Robert Michael Johnson ,  Mark Bradley Davis ,  Erez Izenberg ,  Nafea Bshara ,  Kypros Constantinides

IPC: G06F13/40 ,  G06F9/445 ,  G06F13/42 ,  G06F15/78

CPC classification number: G06F13/4068 ,  G06F9/44505 ,  G06F13/4282 ,  G06F15/7867 ,  G06F15/7871

Abstract: The following description is directed to a configurable logic platform. In one example, a configurable logic platform includes host logic and a reconfigurable logic region. The reconfigurable logic region can include logic blocks that are configurable to implement application logic. The host logic can be used for encapsulating the reconfigurable logic region. The host logic can include a host interface for communicating with a processor. The host logic can include a management function accessible via the host interface. The management function can be adapted to cause the reconfigurable logic region to be configured with the application logic in response to an authorized request from the host interface. The host logic can include a data path function accessible via the host interface. The data path function can include a layer for formatting data transfers between the host interface and the application logic.

公开(公告)号：US11855757B1

公开(公告)日：2023-12-26

申请号：US17643785

申请日：2021-12-10

Applicant: Amazon Technologies, Inc.

Inventor： Julien Ridoux ,  Joshua Benjamin Levinson ,  Said Bshara ,  Erez Izenberg ,  Robert Klein ,  Alan Michael Judge

IPC: G06F1/10 ,  G06F1/12 ,  H04J3/06

CPC classification number: H04J3/0644 ,  G06F1/10 ,  G06F1/12

Abstract: Systems and methods are provided for highly accurate synchronization of machine instances in a distributed, hosted computing environment to a reference timekeeper. In addition to a general communication network accessible to machine instances, the distributed environment includes a second network dedicated to carrying time information, such as a pulse-per-second (PPS) signal to isolated timing hardware within host computing devices. The isolated timing hardware can use the PPS signal, along with a reference time, to set a hardware clock. The isolated timing hardware can further provide an interface to machine instances that enables the instances to read the time of the hardware clock. This configuration enables many instances can share access to a single reference timekeeper, thus synchronizing those instances to a much higher accuracy than in traditional network-based time protocols.

公开(公告)号：US11836103B1

公开(公告)日：2023-12-05

申请号：US17455138

申请日：2021-11-16

Applicant: Amazon Technologies, Inc.

Inventor： Guy Nakibly ,  Roi Ben Haim ,  Erez Izenberg ,  Adi Habusha ,  Yaniv Shapira

IPC: G06F13/40 ,  G06F13/42

CPC classification number: G06F13/4027 ,  G06F13/4221 ,  G06F2213/0026

Abstract: Systems and methods are provided to differentiate different types of traffic going through the same physical channel such that the traffic flow for different traffic types does not impact each other. The physical channel can be configured to support a plurality of virtual channels. Each transaction that needs to be communicated through the physical channel can be classified into a certain traffic type, and each traffic type can be assigned to a virtual channel. Each transaction can be communicated on a respective virtual channel based on the corresponding traffic type. If the traffic flow through a first virtual channel for a transaction slows down, the traffic flow through a second virtual channel for another transaction can continue without getting impacted by the slow down on the first virtual channel.

公开(公告)号：US20230283696A1

公开(公告)日：2023-09-07

申请号：US18316126

申请日：2023-05-11

Applicant: Amazon Technologies, Inc.

Inventor： Ofer Naaman ,  Erez Izenberg ,  Nafea Bshara

IPC: H04L69/22 ,  H04L49/90 ,  H04L49/60 ,  H04L45/00 ,  H04L45/74 ,  H04L47/2425 ,  H04L47/10 ,  G06F16/182 ,  G06F16/245 ,  G06F16/00 ,  G06F16/13 ,  G06F16/90 ,  G06F16/25 ,  G06F16/2458 ,  G06F16/903 ,  H04L69/00 ,  H04L69/12 ,  H04L69/16

CPC classification number: H04L69/22 ,  H04L49/90 ,  H04L49/602 ,  H04L45/38 ,  H04L45/74 ,  H04L47/2433 ,  H04L47/10 ,  G06F16/182 ,  G06F16/245 ,  G06F16/00 ,  G06F16/134 ,  G06F16/90 ,  G06F16/254 ,  G06F16/2471 ,  G06F16/90344 ,  H04L69/02 ,  H04L69/12 ,  H04L69/16 ,  H04L1/0066

Abstract: A packet processing technique can include receiving a packet, and parsing the packet based on a protocol field to generate a parse result vector. The parse result vector is used to select between forwarding the packet to a virtual machine executing on a host processing integrated circuit, forwarding the packet to a physical media access controller, multicasting the packet to multiple virtual machines executing on the host processing integrated circuit, and sending the packet to a hypervisor.

公开(公告)号：US11677866B2

公开(公告)日：2023-06-13

申请号：US17930696

申请日：2022-09-08

Applicant: Amazon Technologies, Inc.

Inventor： Ofer Naaman ,  Erez Izenberg ,  Nafea Bshara

IPC: H04L69/22 ,  H04L49/90 ,  H04L49/60 ,  H04L45/00 ,  H04L45/74 ,  H04L47/2425 ,  H04L47/10 ,  G06F16/182 ,  G06F16/245 ,  G06F16/00 ,  G06F16/13 ,  G06F16/90 ,  G06F16/25 ,  G06F16/2458 ,  G06F16/903 ,  H04L69/00 ,  H04L69/12 ,  H04L69/16 ,  H04L1/00 ,  G06F9/30 ,  G06F13/38 ,  H04L47/125

CPC classification number: H04L69/22 ,  G06F16/00 ,  G06F16/134 ,  G06F16/182 ,  G06F16/245 ,  G06F16/2471 ,  G06F16/254 ,  G06F16/90 ,  G06F16/90344 ,  H04L45/38 ,  H04L45/74 ,  H04L47/10 ,  H04L47/2433 ,  H04L49/602 ,  H04L49/90 ,  H04L69/02 ,  H04L69/12 ,  H04L69/16 ,  G06F9/3001 ,  G06F13/385 ,  H04L1/0066 ,  H04L47/125 ,  Y02D10/00

Abstract: A packet processing technique can include receiving a packet, and parsing the packet based on a protocol field to generate a parse result vector. The parse result vector is used to select between forwarding the packet to a virtual machine executing on a host processing integrated circuit, forwarding the packet to a physical media access controller, multicasting the packet to multiple virtual machines executing on the host processing integrated circuit, and sending the packet to a hypervisor.

公开(公告)号：US11445051B2

公开(公告)日：2022-09-13

申请号：US17247147

申请日：2020-12-01

Applicant: Amazon Technologies, Inc.

Inventor： Ofer Naaman ,  Erez Izenberg ,  Nafea Bshara

IPC: H04L69/22 ,  H04L49/90 ,  H04L49/60 ,  H04L45/00 ,  H04L45/74 ,  H04L47/2425 ,  H04L47/10 ,  G06F16/182 ,  G06F16/245 ,  G06F16/00 ,  G06F16/13 ,  G06F16/90 ,  G06F16/25 ,  G06F16/2458 ,  G06F16/903 ,  H04L69/00 ,  H04L69/12 ,  H04L69/16 ,  H04L1/00 ,  G06F9/30 ,  G06F13/38 ,  H04L47/125

Abstract: A packet processing technique can include selecting a protocol field from the packet, and performing a comparison of the selected protocol field with comparison data in a compare logic array to output a protocol index. The protocol index can be used as an address to read parsing commands from a parse control table, and a parse result can be generated based on executing the parsing commands on the packet. The parse results are used to derive a parse result vector, which can be used by a forwarding engine to forward the packet.

公开(公告)号：US11436183B2

公开(公告)日：2022-09-06

申请号：US17139621

申请日：2020-12-31

Applicant: Amazon Technologies, Inc.

Inventor： Erez Izenberg ,  Leah Shalev ,  Nafea Bshara ,  Guy Nakibly ,  Georgy Machulsky

IPC: G06F15/167 ,  H04L69/22 ,  G06F16/22

Abstract: Apparatus and methods are disclosed herein for remote, direct memory access (RDMA) technology that enables direct memory access from one host computer memory to another host computer memory over a physical or virtual computer network according to a number of different RDMA protocols. In one example, a method includes receiving remote direct memory access (RDMA) packets via a network adapter, deriving a protocol index identifying an RDMA protocol used to encode data for an RDMA transaction associated with the RDMA packets, applying the protocol index to a generate RDMA commands from header information in at least one of the received RDMA packets, and performing an RDMA operation using the RDMA commands.

公开(公告)号：US10944818B1

公开(公告)日：2021-03-09

申请号：US15691516

申请日：2017-08-30

Applicant: Amazon Technologies, Inc.

Inventor： Erez Izenberg ,  Nafea Bshara

IPC: H04L29/08 ,  H04L29/06 ,  H04J3/06 ,  H04L12/26

Abstract: In various implementations, provided are techniques for verifying the accuracy of the network time maintained by a client device. In various implementations, a server can be configured to obtain network time information from a network. A particular client device can also obtain the network time information, and use the network time information to compute a network time for applications executing on the network device. The client device can periodically transmit the network time information to the mirror server. When the mirror server receives the time synchronization information from a client device, the mirror server can compare the client device's network time information to the network time information captured by the mirror server. In this way, the mirror server can verify the client device's time accuracy. The mirror server and/or the client device can subsequently perform a corrective action when the client device's time is not accurate.

公开(公告)号：US10790862B2

公开(公告)日：2020-09-29

申请号：US16241275

申请日：2019-01-07

Applicant: Amazon Technologies, Inc.

Inventor： Ofer Frishman ,  Erez Izenberg ,  Guy Nakibly

IPC: H03M13/00 ,  H04L29/06 ,  G06F12/12 ,  G06F12/0813 ,  G06F11/10 ,  H03M13/09 ,  G06F12/0864 ,  G06F12/084 ,  G06F12/0842

Abstract: Systems and methods in accordance with various embodiments of the present disclosure provide approaches for mapping entries to a cache using a function, such as cyclic redundancy check (CRC). The function can calculate a colored cache index based on a main memory address. The function may cause consecutive address cache indexes to be spread throughout the cache according to the indexes calculated by the function. In some embodiments, each data context may be associated with a different function, enabling different types of packets to be processed while sharing the same cache, reducing evictions of other data contexts and improving performance. Various embodiments can identify a type of packet as the packet is received, and lookup a mapping function based on the type of packet. The function can then be used to lookup the corresponding data context for the packet from the cache, for processing the packet.