公开(公告)号：US06982043B1

公开(公告)日：2006-01-03

申请号：US10382181

申请日：2003-03-05

申请人： Ramkumar Subramanian ,  Bharath Rangarajan ,  Catherine B. Labelle ,  Bhanwar Singh ,  Christopher F. Lyons

发明人： Ramkumar Subramanian ,  Bharath Rangarajan ,  Catherine B. Labelle ,  Bhanwar Singh ,  Christopher F. Lyons

IPC分类号： B44C1/22

CPC分类号： H01L22/12 ,  H01L22/26

摘要： Disclosed are a system and method for monitoring a patterned photoresist clad-wafer structure undergoing an etch process. The system includes a semiconductor wafer structure comprising a substrate, one or more intermediate layers overlying the substrate, and a first patterned photoresist layer overlying the intermediate layers, the semiconductor wafer structure being etched through one or more openings in the photoresist layer; a wafer-etch photoresist monitoring system programmed to obtain data relating to the photoresist layer as the etch process progresses; a pattern-specific grating aligned with the wafer structure and employed in conjunction with the monitoring system, the grating having at least one of a pitch and a critical dimension identical to the first patterned photoresist layer; and a wafer processing controller operatively connected to the monitoring system and adapted to receive data from the monitoring system in order to determine adjustments to a subsequent wafer clean process.

摘要翻译： 公开了用于监测经历蚀刻工艺的图案化光致抗蚀剂包覆晶片结构的系统和方法。 该系统包括半导体晶片结构，其包括衬底，覆盖衬底的一个或多个中间层和覆盖中间层的第一图案化光致抗蚀剂层，半导体晶片结构通过光致抗蚀剂层中的一个或多个开口进行蚀刻; 晶片蚀刻光刻胶监测系统被编程为随着蚀刻工艺的进行获得与光致抗蚀剂层有关的数据; 与晶片结构对准并与监视系统结合使用的图案特定光栅，光栅具有与第一图案化光致抗蚀剂层相同的间距和临界尺寸中的至少一个; 以及晶片处理控制器，可操作地连接到所述监控系统并且适于从所述监控系统接收数据，以便确定随后的晶片清洁过程的调整。

公开(公告)号：US06954678B1

公开(公告)日：2005-10-11

申请号：US10261650

申请日：2002-09-30

申请人： Khoi A. Phan ,  Bhanwar Singh ,  Bharath Rangarajan ,  Ramkumar Subramanian

发明人： Khoi A. Phan ,  Bhanwar Singh ,  Bharath Rangarajan ,  Ramkumar Subramanian

IPC分类号： G01R31/26 ,  G05B23/02 ,  G06F19/00 ,  H01L21/66

CPC分类号： H01L22/26 ,  G05B23/0286

摘要： A system and method facilitating lithography defect solution generation is provided. The invention includes a defect solution component and a defect alert component. The defect solution component provides potential solution(s) to a defect within the lithography process utilizing artificial intelligence technique(s) (e.g., Bayesian learning methods that perform analysis over alternative dependent structures and apply a score, Bayesian classifiers and other statistical classifiers, including decision tree learning methods, support vector machines, linear and non-linear regression and/or neural network).

摘要翻译： 提供了一种促进光刻缺陷解决方案生成的系统和方法。 本发明包括缺陷解决方案组件和缺陷警报组件。 缺陷解决方案组件使用人工智能技术（例如，贝叶斯学习方法对替代依赖结构进行分析并应用分数贝叶斯分类器和其他统计分类器，包括 决策树学习方法，支持向量机，线性和非线性回归和/或神经网络）。

公开(公告)号：US06905950B2

公开(公告)日：2005-06-14

申请号：US09893198

申请日：2001-06-27

申请人： Ramkumar Subramanian ,  Michael K. Templeton ,  Bhanwar Singh ,  Bharath Rangarajan

发明人： Ramkumar Subramanian ,  Michael K. Templeton ,  Bhanwar Singh ,  Bharath Rangarajan

IPC分类号： H01L21/768 ,  H01L21/3205

CPC分类号： H01L21/76885 ,  H01L21/76879

摘要： The present invention involves a method for fabricating interconnecting lines and vias. According to the invention, copper is grown within the openings in a patterned coating. The patterned coating can be a resist coating or a dielectric coating. Either type of coating can be formed over a copper seed layer, whereby the seed layer is exposed within the pattern gaps. The copper seed layer can also be provided within the pattern gaps after patterning. Copper features are grown within the pattern gaps by plating. Where the patterned coating is a resist, the resist is stripped leaving the copper features in the inverse pattern image. The copper features can be coated with a diffusion barrier layer and a dielectric. The dielectric is polished to leave the dielectric filling the spaces between copper features. The invention provides copper lines and vias without the need for a dielectric or metal etching step. Another benefit of the invention is that lines widths can be increased by trimming the patterned coating prior to growing the copper features.

摘要翻译： 本发明涉及制造互连线和通孔的方法。 根据本发明，铜在图案化涂层的开口内生长。 图案化的涂层可以是抗蚀剂涂层或介电涂层。 任何一种类型的涂层可以在铜籽晶层上形成，从而种子层在图案间隙内露出。 图案化之后也可以在图案间隙内提供铜籽晶层。 铜特征通过电镀在图案间隙内生长。 在图案涂层是抗蚀剂的情况下，剥离抗蚀剂，留下逆向图案图案中的铜特征。 铜的特征可以涂覆有扩散阻挡层和电介质。 电介质被抛光以留下电介质填充铜特征之间的空间。 本发明提供铜线和通孔，而不需要电介质或金属蚀刻步骤。 本发明的另一个好处是通过在生长铜特征之前修整图案化涂层可以增加线宽。

公开(公告)号：US06879051B1

公开(公告)日：2005-04-12

申请号：US10050454

申请日：2002-01-16

申请人： Bhanwar Singh ,  Michael K. Templeton ,  Bharath Rangarajan ,  Ramkumar Subramanian

发明人： Bhanwar Singh ,  Michael K. Templeton ,  Bharath Rangarajan ,  Ramkumar Subramanian

IPC分类号： C23C16/04 ,  C23C16/52 ,  H01L21/31

CPC分类号： C23C16/045 ,  C23C16/52

摘要： One aspect of the present invention relates to a method to facilitate formation of seed layer portions on sidewall surfaces of a trench formed in a substrate. The method involves the steps of forming a conformal seed layer over a barrier layer disposed conformal to a trench, wherein the trench is formed in the substrate; reflecting a light beam of x-ray radiation at the seed layer sidewall portions; generating a measurement signal based on the reflected portion of the light beam; and determining a thickness of the sidewall portions based on the measurement signal while the sidewall portions are being formed over the trench.

摘要翻译： 本发明的一个方面涉及一种促进在衬底中形成的沟槽的侧壁表面上形成种子层部分的方法。 该方法包括以下步骤：在与沟槽共形设置的阻挡层上形成保形种子层，其中沟槽形成在衬底中; 在种子层侧壁部分反射x射线辐射的光束; 基于所述光束的反射部分生成测量信号; 以及当在所述沟槽上形成所述侧壁部分时，基于所述测量信号来确定所述侧壁部分的厚度。

公开(公告)号：US06771356B1

公开(公告)日：2004-08-03

申请号：US10050626

申请日：2002-01-16

申请人： Christopher F. Lyons ,  Bhanwar Singh ,  Steven C. Avanzino ,  Khoi A. Phan ,  Bharath Rangarajan ,  Ramkumar Subramanian ,  Cyrus E. Tabery

发明人： Christopher F. Lyons ,  Bhanwar Singh ,  Steven C. Avanzino ,  Khoi A. Phan ,  Bharath Rangarajan ,  Ramkumar Subramanian ,  Cyrus E. Tabery

IPC分类号： G01B1116

CPC分类号： G01B11/165

摘要： A system for monitoring a fabrication process is provided. The system includes one or more light sources, each light source directing light to one or more gratings on a wafer. Light reflected from the gratings is collected by a measuring system that processes the collected light. The collected light is indicative of distortion due to stress at respective portions of the wafer. The measuring system provides distortion/stress related data to a processor that determines the acceptability of the distortion of the respective portions of the wafer. The collected light may be analyzed by scatterometry systems to produce scatterometry signatures associated with distortion and to produce feed-forward control information that can be employed to control semiconductor fabrication processes.

摘要翻译： 提供了一种用于监视制造工艺的系统。 该系统包括一个或多个光源，每个光源将光引导到晶片上的一个或多个光栅。 从光栅反射的光被处理收集的光的测量系统收集。 所收集的光指示由于晶片的各个部分处的应力引起的变形。 测量系统向处理器提供失真/应力相关数据，该处理器确定晶片各部分的失真的可接受性。 收集的光可以通过散射测量系统进行分析，以产生与失真相关联的散射仪签名并产生可用于控制半导体制造过程的前馈控制信息。

公开(公告)号：US06704101B1

公开(公告)日：2004-03-09

申请号：US10050423

申请日：2002-01-16

申请人： Bharath Rangarajan ,  Bhanwar Singh ,  Ramkumar Subramanian ,  Michael K. Templeton

发明人： Bharath Rangarajan ,  Bhanwar Singh ,  Ramkumar Subramanian ,  Michael K. Templeton

IPC分类号： G01N2100

CPC分类号： G01N21/47 ,  G01N21/4788 ,  G01N21/55 ,  G01N21/9501 ,  G01N2201/10

摘要： A system and method are disclosed for monitoring characteristics of a substrate. A substrate is supported for movement within a processing environment and an incident light beam is emitted onto a surface of the substrate. The incident beam is provided to a moveable reflector that directs the beam to the substrate. A control system controls movement of the reflector so as to selectively interrogates the substrate with the beam.

摘要翻译： 公开了用于监测基板的特性的系统和方法。 支撑衬底在处理环境中移动，并且将入射光束发射到衬底的表面上。 入射光束被提供到将光束引导到衬底的可移动反射器。 控制系统控制反射器的运动，以便选择性地用光束询问衬底。

公开(公告)号：US06650422B2

公开(公告)日：2003-11-18

申请号：US09817820

申请日：2001-03-26

申请人： Bhanwar Singh ,  Michael K. Templeton ,  Bharath Rangarajan ,  Ramkumar Subramanian

发明人： Bhanwar Singh ,  Michael K. Templeton ,  Bharath Rangarajan ,  Ramkumar Subramanian

IPC分类号： G01B1100

CPC分类号： G01B11/30 ,  G01B11/24 ,  G01B11/26 ,  G01N21/211 ,  G01N21/4738 ,  G01N21/9501

摘要： The present invention is directed to a method and a system for non-destructively, efficiently and accurately detecting asymmetry in the profile of a feature formed on a wafer during the process of semiconductor fabrication. The method encompasses directing a beam of light or radiation at a feature and detecting a reflected beam associated therewith. Data associated with the reflected beam is correlated with data associated with known feature profiles to ascertain profile characteristics associated with the feature of interest. Using the profile characteristics, an asymmetry of the feature is determined which is then used to generate feedback or feedforward process control data to compensate for or correct such asymmetry in subsequent processing.

摘要翻译： 本发明涉及一种用于在半导体制造过程中非破坏性地，有效地和准确地检测在晶片上形成的特征的轮廓的不对称性的方法和系统。 该方法包括在特征处引导光束或辐射，并且检测与其相关联的反射光束。 与反射光束相关联的数据与与已知特征轮廓相关联的数据相关联，以确定与感兴趣特征相关联的轮廓特征。 使用简档特征，确定特征的不对称性，然后将其用于产生反馈或前馈过程控制数据，以补偿或纠正随后处理中的这种不对称性。

公开(公告)号：US06645702B1

公开(公告)日：2003-11-11

申请号：US10050438

申请日：2002-01-16

申请人： Bharath Rangarajan ,  Michael K. Templeton ,  Bhanwar Singh

发明人： Bharath Rangarajan ,  Michael K. Templeton ,  Bhanwar Singh

IPC分类号： G03F700

CPC分类号： G03F7/265 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/32139

摘要： The present invention relates to systems and methods for increasing the hydrophobicity of patterned resists. In one embodiment, the present invention relates to a method of processing an ultra-thin resist, involving depositing the ultra-thin photoresist over a semiconductor substrate; irradiating the ultra-thin resist with electromagnetic radiation; developing the ultra-thin resist with a developer to form a patterned resist, the patterned resist having a surface with a first hydrophobicity; contacting the patterned resist with a transition solvent to provide the surface of the patterned resist with a second hydrophobicity, wherein the second hydrophobicity is greater than the first hydrophobicity and contact of the patterned resist with the transition is conducted between developing the ultra-thin resist and rinsing patterned resist; and rinsing the patterned resist having the second hydrophobicity with an aqueous solution.

摘要翻译： 本发明涉及增加图案化抗蚀剂疏水性的系统和方法。 在一个实施例中，本发明涉及一种处理超薄抗蚀剂的方法，包括在半导体衬底上沉积超薄光致抗蚀剂; 用电磁辐射照射超薄抗蚀剂; 用显影剂显影超薄抗蚀剂以形成图案化抗蚀剂，图案化抗蚀剂具有第一疏水性表面; 使图案化的抗蚀剂与过渡溶剂接触以提供具有第二疏水性的图案化抗蚀剂的表面，其中第二疏水性大于第一疏水性，并且图案化的抗蚀剂与转变的接触在显影超薄抗蚀剂和 冲洗图案抗蚀剂; 并用水溶液冲洗具有第二疏水性的图案化抗蚀剂。

公开(公告)号：US06593210B1

公开(公告)日：2003-07-15

申请号：US09707214

申请日：2000-11-06

申请人： Bharath Rangarajan ,  Bhanwar Singh ,  Ursula Q. Quinto

发明人： Bharath Rangarajan ,  Bhanwar Singh ,  Ursula Q. Quinto

IPC分类号： H01L2176

CPC分类号： H01L21/76229 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/31058

摘要： One aspect of the present invention relates to a method of forming trench isolation regions within a semiconductor substrate, involving the steps of forming trenches in the semiconductor substrate; depositing a semi-conformal dielectric material over the substrate, wherein the semi-conformal dielectric material has valleys positioned over the trenches; forming an inorganic conformal film over the semi-conformal dielectric material; polishing the semiconductor substrate whereby a first portion of the inorganic conformal film is removed thereby exposing a portion of the semi-conformal dielectric material, and a second portion remains over the valleys of the semi-conformal dielectric material; removing the exposed portions of the semi-conformal dielectric material; and planarizing the substrate to provide the semiconductor substrate having trenches with a dielectric material therein.

摘要翻译： 本发明的一个方面涉及一种在半导体衬底内形成沟槽隔离区域的方法，包括在半导体衬底中形成沟槽的步骤; 在所述衬底上沉积半保形介电材料，其中所述半保形介电材料具有位于所述沟槽上方的谷; 在半保形介电材料上形成无机保形膜; 抛光所述半导体衬底，由此去除所述无机保形膜的第一部分，从而暴露所述半共形绝缘材料的一部分，并且第二部分保留在所述半共形绝缘材料的所述谷的上方; 去除所述半共形介电材料的暴露部分; 并且平坦化衬底以提供其中具有介电材料的沟槽的半导体衬底。

公开(公告)号：US06592932B2

公开(公告)日：2003-07-15

申请号：US09814131

申请日：2001-03-21

申请人： Ramkumar Subramanian ,  Khoi A. Phan ,  Bharath Rangarajan ,  Bhanwar Singh ,  Michael K. Templeton ,  Sanjay K. Yedur

发明人： Ramkumar Subramanian ,  Khoi A. Phan ,  Bharath Rangarajan ,  Bhanwar Singh ,  Michael K. Templeton ,  Sanjay K. Yedur

IPC分类号： B05D312

CPC分类号： H01L21/6715 ,  G03F7/3021

摘要： A system and method is provided that facilitates the application of a uniform layer of developer material on a photoresist material layer. The system includes a nozzle adapted to apply a predetermined volume of developer material on a photoresist material layer along a linear path having a length approximately equal to the diameter of the photoresist material layer. A movement system moves the nozzle to a first position offset from a central region of the photoresist material layer for applying a first predetermined volume of developer material to the photoresist material layer while the developer material is spin coated. The movement system also moves the nozzle to a second position offset from the central region for applying a second predetermined volume of developer material to the photoresist material layer while the developer is spin coated. The first position is located on an opposite side of the central region with respect to the second position. A method of adjusting the offset position and/or volume of developer material applied at the first and second position is also provided. The method utilizes developed photoresist material layer thickness data provided by a measurement system to adjust the offset position and/or volume of the developer.

摘要翻译： 提供了一种有助于在光致抗蚀剂材料层上施加均匀的显影剂材料层的系统和方法。 该系统包括适于沿着具有大致等于光致抗蚀剂材料层的直径的直线路径的光致抗蚀剂材料层上施加预定体积的显影剂材料的喷嘴。 移动系统将喷嘴移动到偏离光致抗蚀剂材料层的中心区域的第一位置，以在旋转涂覆显影剂材料的同时将第一预定体积的显影剂材料施加到光致抗蚀剂材料层。 移动系统还将喷嘴移动到偏离中心区域的第二位置，以在旋涂涂覆显影剂的同时将第二预定体积的显影剂材料施加到光致抗蚀剂材料层。 第一位置相对于第二位置位于中心区域的相反侧。 还提供了一种调节在第一和第二位置施加的显影剂材料的偏移位置和/或体积的方法。 该方法利用由测量系统提供的显影的光致抗蚀剂材料层厚度数据来调节显影剂的偏移位置和/或体积。