FinFET device with multiple fin structures
    54.
    发明授权
    FinFET device with multiple fin structures 有权
    FinFET器件具有多个鳍结构

    公开(公告)号:US06762448B1

    公开(公告)日:2004-07-13

    申请号:US10405343

    申请日:2003-04-03

    Abstract: A semiconductor device includes a group of fin structures. The group of fin structures includes a conductive material and is formed by growing the conductive material in an opening of an oxide layer. The semiconductor device further includes a source region formed at one end of the group of fin structures, a drain region formed at an opposite end of the group of fin structures, and at least one gate.

    Abstract translation: 半导体器件包括一组翅片结构。 翅片结构的组包括导电材料,并且通过在氧化物层的开口中生长导电材料而形成。 半导体器件还包括形成在鳍片结构组的一端处的源极区域,形成在鳍片结构组的相对端处的漏极区域和至少一个栅极。

    Double and triple gate MOSFET devices and methods for making same
    55.
    发明授权
    Double and triple gate MOSFET devices and methods for making same 有权
    双栅极和三栅极MOSFET器件及其制造方法

    公开(公告)号:US08222680B2

    公开(公告)日:2012-07-17

    申请号:US10274961

    申请日:2002-10-22

    CPC classification number: H01L29/785 H01L29/42384 H01L29/66795 H01L29/66818

    Abstract: A double gate metal-oxide semiconductor field-effect transistor (MOSFET) includes a fin, a first gate and a second gate. The first gate is formed on top of the fin. The second gate surrounds the fin and the first gate. In another implementation, a triple gate MOSFET includes a fin, a first gate, a second gate, and a third gate. The first gate is formed on top of the fin. The second gate is formed adjacent the fin. The third gate is formed adjacent the fin and opposite the second gate.

    Abstract translation: 双栅极金属氧化物半导体场效应晶体管(MOSFET)包括鳍状物,第一栅极和第二栅极。 第一个门形成在鳍的顶部。 第二个门围绕翅片和第一个门。 在另一实施方案中,三栅极MOSFET包括鳍片,第一栅极,第二栅极和第三栅极。 第一个门形成在鳍的顶部。 第二个门形成在翅片附近。 第三栅极形成在翅片附近并与第二栅极相对。

    Germanium MOSFET devices and methods for making same
    56.
    发明授权
    Germanium MOSFET devices and methods for making same 有权
    锗MOSFET器件及其制造方法

    公开(公告)号:US07781810B1

    公开(公告)日:2010-08-24

    申请号:US11538217

    申请日:2006-10-03

    Abstract: A device includes a fin, a first gate and a second gate. The first gate is formed adjacent a first side of the fin and includes a first layer of material having a first thickness and having an upper surface that is substantially co-planar with an upper surface of the fin. The second gate is formed adjacent a second side of the fin opposite the first side and includes a second layer of material having a second thickness and having an upper surface that is substantially co-planar with the upper surface of the fin, where the first thickness and the second thickness are substantially equal to a height of the fin.

    Abstract translation: 一种装置包括鳍片,第一栅极和第二栅极。 第一门形成在鳍片的第一侧附近,并且包括具有第一厚度并且具有与鳍片的上表面基本共面的上表面的第一材料层。 所述第二浇口邻近所述翅片的与所述第一侧相对的第二侧形成,并且包括具有第二厚度并具有与所述翅片的上表面基本共面的上表面的第二材料层,其中所述第一厚度 并且第二厚度基本上等于翅片的高度。

    Isolated FinFET P-channel/N-channel transistor pair
    60.
    发明授权
    Isolated FinFET P-channel/N-channel transistor pair 有权
    隔离型FinFET P沟道/ N沟道晶体管对

    公开(公告)号:US06974983B1

    公开(公告)日:2005-12-13

    申请号:US10768660

    申请日:2004-02-02

    CPC classification number: H01L29/785 H01L21/845 H01L27/1211 H01L29/66795

    Abstract: A semiconductor device includes an N-channel device and a P-channel device. The N-channel device includes a first source region, a first drain region, a first fin structure, and a gate. The P-channel device includes a second source region, a second drain region, a second fin structure, and the gate. The second source region, the second drain region, and the second fin structure are separated from the first source region, the first drain region, and the first fin structure by a channel stop layer.

    Abstract translation: 半导体器件包括N沟道器件和P沟道器件。 N沟道器件包括第一源极区,第一漏极区,第一鳍结构和栅极。 P沟道器件包括第二源极区,第二漏极区,第二鳍结构和栅极。 第二源极区域,第二漏极区域和第二鳍状结构通过沟道阻挡层与第一源极区域,第一漏极区域和第一鳍片结构分离。

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