公开(公告)号：US20170062239A1

公开(公告)日：2017-03-02

申请号：US15022288

申请日：2015-08-17

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seongyeol Yoo ,  Seungjin Choi ,  Youngsuk Song

IPC: H01L21/44 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/45

CPC classification number: H01L21/44 ,  H01L21/77 ,  H01L27/1225 ,  H01L29/45 ,  H01L29/458 ,  H01L29/66969 ,  H01L29/7869

Abstract: The invention relates to a method for fabricating an array substrate, an array substrate and a display device. The method for fabricating an array substrate may comprise: forming a metal thin film layer for a source electrode, a drain electrode and a data line; forming a non-crystalline semiconductor thin film layer on the metal thin film layer; and performing annealing, so as to at least partly convert the non-crystalline semiconductor thin film layer into a metal semiconductor compound. By at least partly converting the non-crystalline semiconductor thin film layer into a metal semiconductor compound, the resulting metal semiconductor compound may prevent oxidative-corrosion of the metal thin film layer, such as a low-resistance metal (e.g., Cu or Ti) layer, in the subsequent procedures, which is favorable for the fabrication of a metal oxide thin film transistor using Cu or Ti.

Abstract translation: 本发明涉及阵列基板，阵列基板和显示装置的制造方法。 制造阵列基板的方法可以包括：形成用于源电极，漏电极和数据线的金属薄膜层; 在所述金属薄膜层上形成非晶半导体薄膜层; 并执行退火，以便至少部分地将非晶半导体薄膜层转化为金属半导体化合物。 通过至少部分地将非晶半导体薄膜层转化为金属半导体化合物，所得到的金属半导体化合物可以防止诸如低电阻金属（例如Cu或Ti）的金属薄膜层的氧化腐蚀， 在随后的方法中，这有利于使用Cu或Ti制造金属氧化物薄膜晶体管。

公开(公告)号：US09543325B2

公开(公告)日：2017-01-10

申请号：US14500007

申请日：2014-09-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/7869

Abstract: An array substrate and a manufacturing method thereof, a liquid crystal display panel and a display device are provided, the array substrate comprises a base substrate, and thin film transistors and pixel electrodes provided on the base substrate, the pixel electrode and the active layer in the thin film transistor are provided in the same layer. The active layer is formed of transparent oxide semiconductor material, and the concentration of carriers in the oxide semiconductor material may be increased by performing a plasma process on the oxide semiconductor material, thus the pixel electrode may be manufactured by using the oxide semiconductor material used for manufacturing the active layer, thereby the pixel electrode and the active layer can be provided in the same layer, the number of the masks can be reduced, the manufacturing process is simplified, production cost is saved, the productivity is increased, and the manufacturing time is shortened.

Abstract translation: 提供阵列基板及其制造方法，液晶显示面板和显示装置，阵列基板包括基底基板，薄膜晶体管和设置在基底基板上的像素电极，像素电极和有源层 薄膜晶体管设置在同一层中。 有源层由透明氧化物半导体材料形成，并且可以通过对氧化物半导体材料执行等离子体处理来增加氧化物半导体材料中的载流子的浓度，因此可以通过使用用于 制造有源层，由此可以将像素电极和有源层设置在相同的层中，可以减少掩模的数量，简化制造工序，节省生产成本，提高生产率，制造时间 缩短了

公开(公告)号：US20170003553A1

公开(公告)日：2017-01-05

申请号：US14436066

申请日：2014-07-11

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo

IPC: G02F1/1343 ,  G02F1/1333 ,  H01L21/768 ,  H01L29/45 ,  H01L21/324 ,  G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/134309 ,  G02F1/133345 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/134318 ,  G02F2001/134372 ,  G02F2001/136295 ,  G02F2201/121 ,  G02F2201/123 ,  H01L21/02244 ,  H01L21/02255 ,  H01L27/124 ,  H01L27/1259

Abstract: The embodiments of the invention disclose an array substrate, a manufacturing method thereof and a display device. Due to the fact that the surfaces of a source electrode, a drain electrode and a data line which are arranged on the same layer are provided with an oxide film which is formed after annealing treatment is conducted on the source electrode, the drain electrode and the data line, in the process that the pattern of a pixel electrode is formed on the source electrode, the drain electrode and the data line by the adoption of a composition technology, the oxide film can protect the source electrode and the data line under the oxide film from being corroded by an etching agent when the pattern of the pixel electrode is formed by etching, and the display quality of a display panel will not be affected; meanwhile, a connecting portion enables the drain electrode to be electrically connected with the pixel electrode through a first via hole arranged over the drain electrode and penetrating through the oxide film, therefore the normal display function of the display panel can be ensured.

Abstract translation: 本发明的实施例公开了阵列基板，其制造方法和显示装置。 由于在同一层上设置的源电极，漏电极和数据线的表面设置有在退火处理后形成的氧化膜，在源电极，漏电极和 数据线，在通过采用组合技术在源电极，漏电极和数据线上形成像素电极的图案的过程中，氧化膜可以保护源电极和氧化物下的数据线 当通过蚀刻形成像素电极的图案时，由蚀刻剂腐蚀的膜不会影响显示面板的显示质量; 同时，连接部能够通过布置在漏极上的第一通孔使漏电极与像素电极电连接，贯通氧化膜，能够确保显示面板的正常显示功能。

公开(公告)号：US09419027B2

公开(公告)日：2016-08-16

申请号：US14802241

申请日：2015-07-17

Applicant: BOE Technology Group Co., Ltd.

Inventor： Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo

IPC: H01L27/12 ,  H01L21/311 ,  H01L21/3213 ,  G02F1/1333 ,  G02F1/1343 ,  H01L27/32

CPC classification number: H01L27/1259 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/134363 ,  G02F2001/134372 ,  G02F2001/134381 ,  G02F2201/124 ,  H01L21/31127 ,  H01L21/32133 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/3244

Abstract: An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate comprises a plurality of gate lines and a plurality of data lines which intersect each other to define a plurality of pixel regions, each of the pixel regions comprises a thin film transistor and further comprises: a base substrate; more than one protrusion disposed apart from each other on the base substrate; a first electrode layer comprising at least one first electrode strip disposed in a gap between adjacent protrusions; a second electrode layer comprising at least one second electrode strip disposed on the protrusions.

Abstract translation: 公开了阵列基板，其制造方法和显示装置。 阵列基板包括多个栅极线和彼此相交以限定多个像素区域的多条数据线，每个像素区域包括薄膜晶体管，还包括：基底; 在基底基板上彼此分开布置的多于一个的突起; 第一电极层，包括设置在相邻突起之间的间隙中的至少一个第一电极条; 第二电极层，包括设置在突起上的至少一个第二电极条。

公开(公告)号：US09362414B2

公开(公告)日：2016-06-07

申请号：US14416227

申请日：2014-04-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ke Wang ,  Seongyeol Yoo ,  Ce Ning ,  Wei Yang

IPC: H01L29/786 ,  H01L21/4763 ,  H01L29/51 ,  H01L29/49 ,  H01L29/66 ,  H01L29/423 ,  H01L29/417

Abstract: Provided are oxide thin-film transistor and display device employing the same, and method for manufacturing an oxide thin-film transistor array substrate. A source electrode and a drain electrode are located below an oxide active layer pattern, and a gate electrode is located below the source electrode and the drain electrode, and the gate insulating layer is located between the gate electrode and the source electrode/the drain electrode.

公开(公告)号：US09190427B2

公开(公告)日：2015-11-17

申请号：US14347451

申请日：2013-12-02

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo

IPC: H01L33/00 ,  H01L27/12

CPC classification number: H01L27/1259 ,  G02F1/134363 ,  H01L27/124

Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate comprise a base substrate (11), a gate line, a data line, and a pixel region defined by intersection of the gate line and the data line, which are formed on the base substrate (11), wherein the pixel region comprises a thin film transistor, and the thin film transistor comprises a gate, a gate insulation layer, an active layer, a source and a drain, the pixel region further comprise: at least one groove (110), formed on a surface of the base substrate (11); a first electrode layer (12) comprising at least one first electrode bar (120), the first electrode bars (120) are disposed in the groove (110) and electrically connected with each other; and a second electrode layer (13) comprising at least one second electrode bar (130), wherein the second electrode bars (130) are disposed outside the groove (110) and electrically connected with each other. No overlapping between the common electrode and the pixel electrode can be achieved, so as to improve display quality of the display device.

Abstract translation: 提供阵列基板，其制造方法和显示装置。 阵列基板包括形成在基底基板（11）上的基极基板（11），栅极线，数据线以及与栅极线和数据线交叉限定的像素区域，其中像素区域 所述薄膜晶体管包括栅极，栅极绝缘层，有源层，源极和漏极，所述像素区域还包括：至少一个沟槽（110），形成在所述薄膜晶体管的表面上， 基底（11）; 包括至少一个第一电极棒（120）的第一电极层（12），所述第一电极棒（120）设置在所述凹槽（110）中并彼此电连接; 以及包括至少一个第二电极棒（130）的第二电极层（13），其中所述第二电极棒（130）设置在所述凹槽（110）的外部并彼此电连接。 可以实现公共电极和像素电极之间的重叠，从而提高显示装置的显示质量。

公开(公告)号：US09171941B2

公开(公告)日：2015-10-27

申请号：US14028667

申请日：2013-09-17

Applicant: BOE Technology Group Co., Ltd.

Inventor： Seongyeol Yoo ,  Yoonsung Um

IPC: H01L21/00 ,  H01L29/66 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L29/66969 ,  H01L27/1225 ,  H01L29/7869

Abstract: An embodiment of the present invention provides a fabricating method of a thin film transistor, a fabricating method of an array substrate, and a display device. The fabricating method of a thin film transistor comprises: forming a gate electrode on a substrate; and forming a gate insulating layer, a semiconductor layer, source and drain electrodes and a channel region on the substrate, wherein, the semiconductor layer is formed of a metal oxide, and two etching steps are used to form the channel region, and in a first etching step, a part of a source-drain metal layer above the semiconductor layer corresponding to the channel region is removed by using a dry etching, and in a second etching step, a remaining part of the source-drain metal layer above the semiconductor layer corresponding to the channel region is removed by using a wet etching, thereby forming the channel region.

Abstract translation: 本发明的实施例提供了薄膜晶体管的制造方法，阵列基板的制造方法和显示装置。 薄膜晶体管的制造方法包括：在衬底上形成栅电极; 以及在基板上形成栅极绝缘层，半导体层，源极和漏极以及沟道区，其中半导体层由金属氧化物形成，并且使用两个蚀刻步骤来形成沟道区，并且在 第一蚀刻步骤，通过使用干蚀刻去除对应于沟道区的半导体层上方的源极 - 漏极金属层的一部分，并且在第二蚀刻步骤中，在半导体上方的源极 - 漏极金属层的剩余部分 通过使用湿法蚀刻除去与沟道区对应的层，从而形成沟道区。

公开(公告)号：US09117707B2

公开(公告)日：2015-08-25

申请号：US14345864

申请日：2013-12-16

Applicant: BOE Technology Group Co., Ltd.

Inventor： Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo

IPC: H01L27/12 ,  H01L27/32

CPC classification number: H01L27/1259 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/134363 ,  G02F2001/134372 ,  G02F2001/134381 ,  G02F2201/124 ,  H01L21/31127 ,  H01L21/32133 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/3244

Abstract: The array substrate includes a plurality of gate lines and a plurality of data lines which intersect each other to define a plurality of pixel regions, each of the pixel regions includes a thin film transistor and further includes: a base substrate; more than one protrusion disposed apart from each other on the base substrate; a first electrode layer including at least one first electrode strip disposed in a gap between adjacent protrusions; a second electrode layer including at least one second electrode strip disposed on the protrusions.

Abstract translation: 阵列基板包括多个栅极线和多个彼此相交以限定多个像素区域的数据线，每个像素区域包括薄膜晶体管，并且还包括：基底; 在基底基板上彼此分开布置的多于一个的突起; 第一电极层，包括设置在相邻突起之间的间隙中的至少一个第一电极条; 第二电极层，包括设置在突起上的至少一个第二电极条。

公开(公告)号：US08952384B2

公开(公告)日：2015-02-10

申请号：US13883858

申请日：2012-12-06

Applicant: BOE Technology Group Co., Ltd.

Inventor： Seungjin Choi ,  Seongyeol Yoo ,  Youngsuk Song

IPC: H01L29/04

CPC classification number: H01L27/1288 ,  G03F1/22 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/78696

Abstract: Embodiments of the invention relate to a TFT, a mask for manufacturing the TFT, an array substrate and a display device. A channel of the TFT is formed by using a single slit mask. The channel of the TFT has a bent portion and extension portions provided on both sides of the bent portion, and a channel width of the bent portion is larger than a channel width of the extension portion.

Abstract translation: 本发明的实施例涉及TFT，用于制造TFT的掩模，阵列基板和显示装置。 通过使用单个狭缝掩模形成TFT的沟道。 TFT的通道具有弯曲部分和设置在弯曲部分两侧的延伸部分，并且弯曲部分的通道宽度大于延伸部分的通道宽度。

公开(公告)号：US08933472B2

公开(公告)日：2015-01-13

申请号：US13996318

申请日：2013-01-09

Applicant: BOE Technology Group Co., Ltd.

Inventor： Youngsuk Song ,  Seongyeol Yoo ,  Seungjin Choi

IPC: H01L29/20 ,  H01L33/00 ,  H01L27/12 ,  G02F1/1362 ,  H01L29/786

CPC classification number: H01L27/1214 ,  G02F1/1362 ,  G02F2001/134318 ,  G02F2001/136222 ,  G02F2201/48 ,  H01L27/1248 ,  H01L29/78633

Abstract: An array substrate, which is formed with a gate electrode (2), a source electrode (5), a drain electrode (6), a gate insulating layer (3), an active layer (4) and a passivation layer (9) in a thin film transistor region, and with the gate insulating layer (3), a pixel electrode (7), the passivation layer (9) and a common electrode (8) in a pixel electrode pattern region, and a color resin layer (11) is formed between the passivation layer (9) and the common electrode (8). Since the color resin layer (11) for planarization is formed on the passivation layer (9), the horizontal driving manner may be suitably applied in order to reduce light leakage, to improve contrast ratio and aperture ratio of a panel and to lower production costs.

Abstract translation: 阵列基板，其形成有栅电极（2），源电极（5），漏电极（6），栅极绝缘层（3），有源层（4）和钝化层（9） 在薄膜晶体管区域和像素电极图案区域中的栅极绝缘层（3），像素电极（7），钝化层（9）和公共电极（8）以及着色树脂层（ 11）形成在钝化层（9）和公共电极（8）之间。 由于在钝化层（9）上形成用于平坦化的着色树脂层（11），所以可以适当地施加水平驱动方式以减少漏光，提高面板的对比度和孔径比并降低生产成本 。