公开(公告)号：US20080013224A1

公开(公告)日：2008-01-17

申请号：US10540919

申请日：2003-12-13

申请人： Sung-Min Kim ,  Hee-Young Lee ,  Yong-Ho Jung ,  Heui-Soo Kim ,  Sung-Chul Park ,  Ha-Young Lee ,  Eun-Sil Kim

发明人： Sung-Min Kim ,  Hee-Young Lee ,  Yong-Ho Jung ,  Heui-Soo Kim ,  Sung-Chul Park ,  Ha-Young Lee ,  Eun-Sil Kim

IPC分类号： H02J7/00 ,  H01G2/14

CPC分类号： H02J7/0029 ,  H02J7/345 ,  H02J2007/004

摘要： Disclosed are an electric energy storage device having a good cycle characteristic and a temperature characteristic and a method of charging and discharging the electric energy storage device. The electric energy storage device including a capacitor and a secondary battery combined in series is provided. When the capacitor of the electric energy storage device is an electric double layer capacitor, the capacitor is used to the voltage of OV or less to increase an available energy usage. When this energy storage device is used as a power in a place where a rapid keeping and repairing is difficult such as out in the fields including in the mountain, at the sea, on the road, the cost for keeping and repairing can be largely reduced.

摘要翻译： 公开了具有良好的循环特性和温度特性的蓄电装置以及对蓄电装置进行充放电的方法。 提供包括串联组合的电容器和二次电池的电能存储装置。 当电能存储装置的电容器是双电层电容器时，电容器用于0V或更低的电压以增加可用的能量消耗。 当这种能量储存装置用于诸如在山地，海上，道路上等领域中难以进行快速保养和修复的地方的动力时，保持和修理的成本可以大大降低 。

公开(公告)号：US20070254564A1

公开(公告)日：2007-11-01

申请号：US10580617

申请日：2005-02-16

申请人： Eu-Gene Song ,  Ju-Yeol Lee ,  Sung-Min Kim ,  Jae-Seok Kim ,  Hyun-Woo Lee

发明人： Eu-Gene Song ,  Ju-Yeol Lee ,  Sung-Min Kim ,  Jae-Seok Kim ,  Hyun-Woo Lee

IPC分类号： B24D11/00

CPC分类号： B24D11/02 ,  B24B37/22

摘要： Disclosed is a base pad of polishing pad, which is used in conjunction with polishing slurry during a chemical-mechanical polishing or planarizing process, and a multilayer pad using the same. Since the base pad according to the present invention does not have fine pores, it is possible to prevent premeation of polishing slurry and water and to avoid nonuniformity of physical properties. Thereby, it is possible to lengthen the lifetime of the polishing pad.

摘要翻译： 公开了一种在化学机械抛光或平面化处理过程中与抛光浆料结合使用的抛光垫的基垫，以及使用其的多层垫。 由于根据本发明的基底垫不具有细孔，因此可以防止研磨浆料和水的前体化，并且避免物理性能的不均匀性。 由此，可以延长抛光垫的寿命。

公开(公告)号：US20070153786A1

公开(公告)日：2007-07-05

申请号：US11606354

申请日：2006-11-30

申请人： Sung-Min Kim

发明人： Sung-Min Kim

IPC分类号： H04L12/56

CPC分类号： H04L49/901 ,  H04L49/90

摘要： A method and interface are provided for using a memory that distinguishes transmission data from reception data and performs a First-In-First-Out (FIFO) operation on the transmission and reception data in a communication system. In the method, a controller receives from a register a last transmission address provided for dividing one memory module having L addresses into a transmission area having M addresses according to application, where M is less than or equal to L, and a reception area having (L-M) addresses. A codec interface allocates a first address up to the last transmission address of the memory module for the transmission area. The codec interface allocates an address increased by 1 from the last transmission address up to the last address of the memory module for the reception area.

摘要翻译： 提供了一种方法和接口，用于使用区分发送数据与接收数据的存储器，并对通信系统中的发送和接收数据执行先进先出（FIFO）操作。 在该方法中，控制器从寄存器接收用于将具有L个地址的一个存储器模块分配的最后发送地址作为根据应用的具有M个地址的发送区域，其中M小于或等于L，接收区域具有 LM）地址。 编解码器接口为传输区域分配直到存储器模块的最后传输地址的第一地址。 编解码器接口分配从最后发送地址增加1的地址到接收区域的存储器模块的最后地址。

公开(公告)号：US20070111435A1

公开(公告)日：2007-05-17

申请号：US11598374

申请日：2006-11-13

申请人： Sung-Min Kim ,  Eun-Jung Yun ,  Dong-Won Kim

发明人： Sung-Min Kim ,  Eun-Jung Yun ,  Dong-Won Kim

IPC分类号： H01L21/336 ,  H01L29/76 ,  H01L21/8242 ,  H01L29/94

CPC分类号： H01L29/41791 ,  H01L29/66795 ,  H01L29/7839 ,  H01L29/78618 ,  H01L29/78684

摘要： A Schottky barrier FinFET device and a method of fabricating the same are provided. The device includes a lower fin body provided on a substrate. An upper fin body having first and second sidewalls which extend upwardly from a center of the lower fin body and face each other is provided. A gate structure crossing over the upper fin body and covering an upper surface of the upper fin body and the first and second sidewalls is provided. The Schottky barrier FinFET device includes a source and a drain which are formed on the sidewalls of the upper fin body adjacent to sidewalls of the gate structure and made of a metal material layer formed on an upper surface of the lower fin body positioned at both sides of the upper fin body, and the source and drain form a Schottky barrier to the lower and upper fin bodies.

摘要翻译： 提供肖特基势垒FinFET器件及其制造方法。 该装置包括设置在基板上的下部翅片体。 提供具有从下翅片体的中心向上延伸并彼此面对的第一和第二侧壁的上翅片本体。 提供了一种跨越上翅片体并覆盖上翅片体的上表面和第一和第二侧壁的门结构。 肖特基势垒FinFET器件包括源极和漏极，其形成在与鳍结构的侧壁相邻的上翅片体的侧壁上，并且由形成在位于两侧的下翅片体的上表面上的金属材料层 并且源极和漏极对下鳍体和上鳍体形成肖特基势垒。

公开(公告)号：US20050282064A1

公开(公告)日：2005-12-22

申请号：US10873090

申请日：2004-06-22

申请人： Sung-Min Kim ,  Yong-Ho Jung ,  Sung-Chul Park ,  Eun-Sil Kim

发明人： Sung-Min Kim ,  Yong-Ho Jung ,  Sung-Chul Park ,  Eun-Sil Kim

IPC分类号： F24F7/00 ,  H01M2/12

CPC分类号： H01M2/1241

摘要： In a safety vent part and an electric energy storage device having the same, the safety vent part includes a plate coupled to the device, a metal sheet and a metal cap. A hole having a step portion is formed through the plate, and is in communication with an interior of the device. The metal cap having an exhaust nozzle corresponding the hole is coupled into the step portion by a tight fit. The metal sheet is disposed between a bottom surface of the step portion and the metal cap. When an internal pressure of the device is higher than a predetermined breaking pressure, the internal pressure of the device breaks the metal sheet. A gas generated abnormally in the device is exhausted through the hole and exhaust nozzle.

摘要翻译： 在安全排气部分和具有该安全排气部分的电能存储装置中，安全排气部分包括联接到该装置的板，金属板和金属盖。 通过该板形成具有阶梯部的孔，并且与该装置的内部连通。 具有对应于孔的排气喷嘴的金属盖通过紧密配合而联接到台阶部。 金属片设置在台阶部的底面与金属盖之间。 当装置的内部压力高于预定的破坏压力时，装置的内部压力破坏金属板。 在装置中异常生成的气体通过孔和排气喷嘴排出。

公开(公告)号：US20050218395A1

公开(公告)日：2005-10-06

申请号：US11080737

申请日：2005-03-15

申请人： Sung-Min Kim ,  Kyoung-Hwan Yeo ,  In-Soo Jung ,  Si-Young Choi ,  Dong-Won Kim ,  Yong-Hoon Son ,  Young-Eun Lee ,  Byeong-Chan Lee ,  Jong-Wook Lee

发明人： Sung-Min Kim ,  Kyoung-Hwan Yeo ,  In-Soo Jung ,  Si-Young Choi ,  Dong-Won Kim ,  Yong-Hoon Son ,  Young-Eun Lee ,  Byeong-Chan Lee ,  Jong-Wook Lee

IPC分类号： H01L21/20 ,  H01L29/06 ,  H01L29/78

CPC分类号： H01L29/0653 ,  H01L29/78

摘要： Embodiments of the present invention include heterogeneous substrates, integrated circuits formed on such heterogeneous substrates, and methods of forming such substrates and integrated circuits. The heterogeneous substrates according to certain embodiments of the present invention include a first Group IV semiconductor layer (e.g., silicon), a second Group IV pattern (e.g., a silicon-germanium pattern) that includes a plurality of individual elements on the first Group IV semiconductor layer, and a third Group IV semiconductor layer (e.g., a silicon epitaxial layer) on the second Group IV pattern and on a plurality of exposed portions of the first Group IV semiconductor layer. The second Group IV pattern may be removed in embodiments of the present invention. In these and other embodiments of the present invention, the third Group IV semiconductor layer may be planarized.

摘要翻译： 本发明的实施例包括异质衬底，在这种异质衬底上形成的集成电路，以及形成这种衬底和集成电路的方法。 根据本发明的某些实施方案的异质衬底包括第一组IV半导体层（例如，硅），第二组IV图案（例如硅 - 锗图案），其包括第一组IV上的多个单独元件 半导体层和第二组IV模式上的第三组IV半导体层（例如，硅外延层）和第一组IV半导体层的多个暴露部分上。 在本发明的实施例中可以去除第二组IV图案。 在本发明的这些和其它实施例中，第三组IV半导体层可以被平坦化。

公开(公告)号：US10199499B2

公开(公告)日：2019-02-05

申请号：US15060265

申请日：2016-03-03

申请人： Sung-Min Kim ,  Dong-Ho Cha ,  Sunhom Steve Paak

发明人： Sung-Min Kim ,  Dong-Ho Cha ,  Sunhom Steve Paak

IPC分类号： H01L21/84 ,  H01L29/165 ,  H01L29/78 ,  H01L27/11 ,  H01L27/092 ,  H01L27/02

摘要： A semiconductor device includes first through fourth active fins, which extend alongside one another in a first direction; and a field insulating film that covers lower portions of the first through fourth active fins, the first and second active fins protrude from the field insulating film at a first height, the third active fin protrudes from the field insulating film at a second height different from the first height, and an interval between the first and second active fins is different from an interval between the third and fourth active fins.

公开(公告)号：US10103266B2

公开(公告)日：2018-10-16

申请号：US14690575

申请日：2015-04-20

申请人： Sung-Min Kim ,  Kyung-Seok Oh ,  Cheol Kim ,  Heon-Jong Shin ,  Jong-Ryeol Yoo ,  Hyun-Jung Lee ,  Seong-Hoon Jeong

发明人： Sung-Min Kim ,  Kyung-Seok Oh ,  Cheol Kim ,  Heon-Jong Shin ,  Jong-Ryeol Yoo ,  Hyun-Jung Lee ,  Seong-Hoon Jeong

IPC分类号： H01L29/78 ,  H01L21/84 ,  H01L29/66 ,  H01L27/12

摘要： Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a lower fin that protrudes from a substrate and extends in a first direction, an oxide film the lower fin, an upper fin that protrudes from the oxide film and that is spaced apart from the lower fin at a position corresponding to the lower fin, and a gate structure the upper fin that extends in a second direction to intersect the upper fin, wherein germanium (Ge) is included in a portion of the oxide film located between the lower fin and the upper fin.

公开(公告)号：US09281208B2

公开(公告)日：2016-03-08

申请号：US14165970

申请日：2014-01-28

申请人： Sung-Min Kim ,  Ji-Su Kang ,  Dong-Kyu Lee ,  Dong-Ho Cha

发明人： Sung-Min Kim ,  Ji-Su Kang ,  Dong-Kyu Lee ,  Dong-Ho Cha

IPC分类号： H01L21/308 ,  H01L29/66 ,  H01L29/78 ,  H01L21/311

CPC分类号： H01L21/3083 ,  H01L21/31144 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

摘要： A method of forming a semiconductor structure can include forming a photolithography mask on a silicon fin having a hard mask layer thereon extending in a first direction. A trench can be formed through the hard mask layer into the silicon fin using the photolithography mask, where the trench extends in a second direction to separate the silicon fin into first and second fin structures extending end-to-end in the first direction. A portion of the trench formed by the hard mask layer can be widened relative to a lower portion of the trench defined by the first and second fin structures.

摘要翻译： 形成半导体结构的方法可以包括在其上具有在第一方向上延伸的硬掩模层的硅片上形成光刻掩模。 可以使用光刻掩模通过硬掩模层将沟槽形成为硅片，其中沟槽沿第二方向延伸，以将硅片分离成在第一方向上端对端延伸的第一和第二鳍结构。 由硬掩模层形成的沟槽的一部分可以相对于由第一和第二鳍结构限定的沟槽的下部加宽。

公开(公告)号：US09178044B2

公开(公告)日：2015-11-03

申请号：US14287240

申请日：2014-05-27

申请人： Sung-Min Kim ,  Ji-Su Kang ,  Dong-Kyu Lee ,  Dong-Ho Cha

发明人： Sung-Min Kim ,  Ji-Su Kang ,  Dong-Kyu Lee ,  Dong-Ho Cha

IPC分类号： H01L21/3205 ,  H01L21/20 ,  H01L21/36 ,  H01L21/336 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/785 ,  H01L29/66795

摘要： Provided are a semiconductor device and a method for fabricating the same. The method for fabricating a semiconductor device comprises, providing an active fin and a field insulating film including a first trench disposed on the active fin; forming a second trench through performing first etching of the field insulating film that is disposed on side walls and a lower portion of the first trench; forming a first region and a second region in the field insulating film through performing second etching of the field insulating film that is disposed on side walls and a lower portion of the second trench, the first region is disposed adjacent to the active fin and has a first thickness, and the second region is disposed spaced apart from the active fin as compared with the first region and has a second thickness that is thicker than the first thickness; and forming a gate structure on the active fin and the field insulating film.

摘要翻译： 提供一种半导体器件及其制造方法。 制造半导体器件的方法包括：提供有源鳍片和场绝缘膜，其包括设置在有源鳍片上的第一沟槽; 通过对设置在所述第一沟槽的侧壁和下部的所述场绝缘膜进行第一蚀刻来形成第二沟槽; 通过对设置在所述第二沟槽的侧壁和下部的所述场绝缘膜进行第二蚀刻，在所述场绝缘膜中形成第一区域和第二区域，所述第一区域邻近所述活性鳍片设置，并且具有 与第一区域相比，第二区域与有效翅片间隔开，并且具有比第一厚度厚的第二厚度; 并在有源鳍片和场绝缘膜上形成栅极结构。