公开(公告)号：US07375407B2

公开(公告)日：2008-05-20

申请号：US11271833

申请日：2005-11-14

申请人： Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/47

CPC分类号： H01L29/66143 ,  H01L29/872

摘要： A Schottky barrier diode includes a first semiconductor layer and a second semiconductor layer successively formed above a substrate; and a high-resistance region formed in the first semiconductor layer and the second semiconductor layer and having higher resistance than the first semiconductor layer and the second semiconductor layer. A Schottky electrode and an ohmic electrode spaced from each other are formed on the second semiconductor layer in a portion surrounded with the high-resistance region.

摘要翻译： 肖特基势垒二极管包括依次形成在衬底上的第一半导体层和第二半导体层; 以及形成在第一半导体层和第二半导体层中并且具有比第一半导体层和第二半导体层更高的电阻的高电阻区域。 彼此间隔开的肖特基电极和欧姆电极在被高电阻区域包围的部分中形成在第二半导体层上。

公开(公告)号：US20070170463A1

公开(公告)日：2007-07-26

申请号：US11647218

申请日：2006-12-29

申请人： Hiroaki Ueno ,  Manabu Yanagihara ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hiroaki Ueno ,  Manabu Yanagihara ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L31/00

CPC分类号： H01L29/7783 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/432 ,  H01L29/452 ,  H01L29/7787

摘要： A nitride semiconductor device includes: a first semiconductor layer made of first nitride semiconductor; a second semiconductor layer formed on a principal surface of the first semiconductor layer and made of second nitride semiconductor having a bandgap wider than that of the first nitride semiconductor; a control layer selectively formed on, or above, an upper portion of the second semiconductor layer and made of third nitride semiconductor having a p-type conductivity; source and drain electrodes formed on the second semiconductor layer at respective sides of the control layer; a gate electrode formed on the control layer; and a fourth semiconductor layer formed on a surface of the first semiconductor layer opposite to the principal surface, having a potential barrier in a valence band with respect to the first nitride semiconductor and made of fourth nitride semiconductor containing aluminum.

摘要翻译： 氮化物半导体器件包括：由第一氮化物半导体制成的第一半导体层; 第二半导体层，其形成在第一半导体层的主表面上并且由具有比第一氮化物半导体的带隙宽的第二氮化物半导体构成; 选择性地形成在所述第二半导体层的上部并且由上述第二半导体层的上部制成的具有p型导电性的第三氮化物半导体的控制层; 源极和漏极，形成在控制层的相应侧上的第二半导体层上; 形成在所述控制层上的栅电极; 以及形成在与所述主表面相对的所述第一半导体层的表面上的第四半导体层，所述第四半导体层相对于所述第一氮化物半导体具有价带中的势垒，并且由包含铝的第四氮化物半导体制成。

公开(公告)号：US20070126026A1

公开(公告)日：2007-06-07

申请号：US11593016

申请日：2006-11-06

申请人： Hiroaki Ueno ,  Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

发明人： Hiroaki Ueno ,  Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

IPC分类号： H01L31/00

CPC分类号： H01L29/7787 ,  H01L23/3732 ,  H01L29/2003 ,  H01L29/66462 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a first group-III nitride semiconductor layer formed on a substrate; a second group-III nitride semiconductor layer made of a single layer or two or more layers, formed on the first group-III nitride semiconductor layer, and acting as a barrier layer; a source electrode, a drain electrode, and a gate electrode formed on the second group-III nitride semiconductor layer, the gate electrode controlling a current flowing between the source and drain electrodes; and a heat radiation film with high thermal conductivity which covers, as a surface passivation film, the entire surface other than a bonding pad.

摘要翻译： 半导体器件包括：形成在衬底上的第一III族氮化物半导体层; 形成在第一III族氮化物半导体层上并且用作阻挡层的由单层或两层或更多层制成的第二III族氮化物半导体层; 形成在所述第二III族氮化物半导体层上的源电极，漏电极和栅极，所述栅电极控制在所述源极和漏极之间流动的电流; 以及具有高导热性的热辐射膜，其覆盖除了焊盘之外的整个表面作为表面钝化膜。

公开(公告)号：US20060108659A1

公开(公告)日：2006-05-25

申请号：US11272878

申请日：2005-11-15

申请人： Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L31/07

CPC分类号： H01L29/872 ,  H01L21/26506 ,  H01L27/0605 ,  H01L27/0814 ,  H01L29/0692 ,  H01L29/417 ,  H01L29/66143

摘要： A Schottky barrier diode includes a first semiconductor layer and a second semiconductor layer successively formed above a semiconductor substrate with a buffer layer formed between the first and second semiconductor layers and the semiconductor substrate. A Schottky electrode and an ohmic electrode spaced from each other are formed on the second semiconductor layer, and a back face electrode is formed on the back face of the semiconductor substrate. The Schottky electrode or the ohmic electrode is electrically connected to the back face electrode through a via penetrating through at least the buffer layer.

公开(公告)号：US08159848B2

公开(公告)日：2012-04-17

申请号：US12598387

申请日：2008-12-11

申请人： Atsushi Morimoto ,  Matsuo Shiraishi ,  Kouichi Ishikawa ,  Tatsuo Morita ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

发明人： Atsushi Morimoto ,  Matsuo Shiraishi ,  Kouichi Ishikawa ,  Tatsuo Morita ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

IPC分类号： H02M7/217

CPC分类号： H02M3/1582 ,  H02M7/219

摘要： A power conversion circuit includes a bidirectional switch 2. The bidirectional switch 2 has a first gate terminal G1, a second gate terminal G2, a first ohmic terminal S1 and a second ohmic terminal S2. The bidirectional switch 2 has four operation states. In the first state, the bidirectional switch 2 operates as a diode having a cathode as the first ohmic terminal S1 and an anode as the second ohmic terminal S2. In a second state, the bidirectional switch 2 operates as a diode having an anode as the first ohmic terminal S1 and a cathode as the second ohmic terminal S2. In a third state, the bidirectional switch 2 is bidirectionally conductive with via a diode between the first and second ohmic terminals S1 and S2. In a fourth state, the bidirectional switch 2 cuts off a bidirectional current between the first and second ohmic terminals.

摘要翻译： 功率转换电路包括双向开关2.双向开关2具有第一栅极端子G1，第二栅极端子G2，第一欧姆端子S1和第二欧姆端子S2。 双向开关2具有四个操作状态。 在第一状态下，双向开关2作为具有阴极的第二欧姆端子S1和阳极作为第二欧姆端子S2的二极管工作。 在第二状态下，双向开关2作为具有阳极的第二欧姆端子S1和阴极作为第二欧姆端子S2的二极管工作。 在第三状态下，双向开关2通过第一和第二欧姆端子S1和S2之间的二极管双向导通。 在第四状态下，双向开关2切断第一和第二欧姆端子之间的双向电流。

公开(公告)号：US08299737B2

公开(公告)日：2012-10-30

申请号：US12596770

申请日：2008-12-02

申请人： Tatsuo Morita ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Matsuo Shiraishi ,  Atsushi Morimoto ,  Kouichi Ishikawa

发明人： Tatsuo Morita ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Matsuo Shiraishi ,  Atsushi Morimoto ,  Kouichi Ishikawa

IPC分类号： H02P6/14

CPC分类号： H02M7/53871 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/7787 ,  H02P27/08

摘要： A motor driving circuit includes a three-phase inverter circuit 8, including three upper-arm switching elements 56a to 56c for driving upper arms of different phases of a three-phase motor 3, and three lower-arm switching elements 56d to 56f for driving lower arms of different phases. At least one of the upper-arm switching elements 56a to 56c and the lower-arm switching elements 56d to 56f is a semiconductor element that performs a diode operation. The diode operation is an operation in which a voltage less than or equal to a threshold voltage of a gate electrode G is applied to the gate electrode G with reference to a potential of a first ohmic electrode S, thereby conducting a current flow from the first ohmic electrode S to a second ohmic electrode D and blocking a current flow from the second ohmic electrode D to the first ohmic electrode S.

摘要翻译： 电动机驱动电路包括三相逆变器电路8，其包括用于驱动三相电动机3的不同相的上臂的三个上臂开关元件56a至56c和用于驱动的​​三个下臂开关元件56d至56f 不同阶段的下臂。 上臂开关元件56a至56c和下臂开关元件56d至56f中的至少一个是执行二极管操作的半导体元件。 二极管操作是参照第一欧姆电极S的电位将小于或等于栅电极G的阈值电压的电压施加到栅电极G的操作，从而从第一 欧姆电极S连接到第二欧姆电极D并阻塞从第二欧姆电极D到第一欧姆电极S的电流。

公开(公告)号：US08742467B2

公开(公告)日：2014-06-03

申请号：US13613724

申请日：2012-09-13

申请人： Tatsuo Morita ,  Daisuke Ueda ,  Yasuhiro Uemoto ,  Tetsuzo Ueda

发明人： Tatsuo Morita ,  Daisuke Ueda ,  Yasuhiro Uemoto ,  Tetsuzo Ueda

IPC分类号： H01L29/772 ,  H01L29/778

CPC分类号： H01L29/7787 ,  H01L27/0605 ,  H01L29/1066 ,  H01L29/2003

摘要： A bidirectional switching device includes a semiconductor multilayer structure made of a nitride semiconductor, a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor multilayer structure, and a first gate electrode and a second gate electrode. The first gate electrode is covered with a first shield electrode having a potential substantially equal to that of the first ohmic electrode. The second gate electrode is covered with the second shield electrode having a potential substantially equal to that of the second ohmic electrode. An end of the first shield electrode is positioned between the first gate electrode and the second gate electrode, and an end of the second shield electrode is positioned between the second gate electrode and the first gate electrode.

摘要翻译： 双向开关器件包括由半导体多层结构上形成的由氮化物半导体，第一欧姆电极和第二欧姆电极构成的半导体多层结构以及第一栅电极和第二栅电极。 第一栅电极被第一屏蔽电极覆盖，该第一屏蔽电极的电位基本上等于第一欧姆电极的电位。 第二栅电极被第二屏蔽电极覆盖，其电位基本上等于第二欧姆电极的电位。 第一屏蔽电极的端部位于第一栅极电极和第二栅极电极之间，第二屏蔽电极的端部位于第二栅极电极和第一栅极电极之间。

公开(公告)号：US20100135053A1

公开(公告)日：2010-06-03

申请号：US12598387

申请日：2008-12-11

申请人： Atsushi Morimoto ,  Matsuo Shiraishi ,  Kouichi Ishikawa ,  Tatsuo Morita ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

发明人： Atsushi Morimoto ,  Matsuo Shiraishi ,  Kouichi Ishikawa ,  Tatsuo Morita ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

IPC分类号： H02M7/217

CPC分类号： H02M3/1582 ,  H02M7/219

摘要： A power conversion circuit includes a bidirectional switch 2. The bidirectional switch 2 has a first gate terminal G1, a second gate terminal G2, a first ohmic terminal S1 and a second ohmic terminal S2. The bidirectional switch 2 has four operation states. In the first state, the bidirectional switch 2 operates as a diode having a cathode as the first ohmic terminal S1 and an anode as the second ohmic terminal S2. In a second state, the bidirectional switch 2 operates as a diode having an anode as the first ohmic terminal S1 and a cathode as the second ohmic terminal S2. In a third state, the bidirectional switch 2 is bidirectionally conductive with via a diode between the first and second ohmic terminals S1 and S2. In a fourth state, the bidirectional switch 2 cuts off a bidirectional current between the first and second ohmic terminals.

摘要翻译： 功率转换电路包括双向开关2.双向开关2具有第一栅极端子G1，第二栅极端子G2，第一欧姆端子S1和第二欧姆端子S2。 双向开关2具有四个操作状态。 在第一状态下，双向开关2作为具有阴极的第二欧姆端子S1和阳极作为第二欧姆端子S2的二极管工作。 在第二状态下，双向开关2作为具有阳极的第二欧姆端子S1和阴极作为第二欧姆端子S2的二极管工作。 在第三状态下，双向开关2通过第一和第二欧姆端子S1和S2之间的二极管双向导通。 在第四状态下，双向开关2切断第一和第二欧姆端子之间的双向电流。

公开(公告)号：US20100127652A1

公开(公告)日：2010-05-27

申请号：US12596770

申请日：2008-12-02

申请人： Tatsuo Morita ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Matsuo Shiraishi ,  Atsushi Morimoto ,  Kouichi Ishikawa

发明人： Tatsuo Morita ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Matsuo Shiraishi ,  Atsushi Morimoto ,  Kouichi Ishikawa

IPC分类号： H02P6/14

CPC分类号： H02M7/53871 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/7787 ,  H02P27/08

摘要： A motor driving circuit includes a three-phase inverter circuit 8, including three upper-arm switching elements 56a to 56c for driving upper arms of different phases of a three-phase motor 3, and three lower-arm switching elements 56d to 56f for driving lower arms of different phases. At least one of the upper-arm switching elements 56a to 56c and the lower-arm switching elements 56d to 56f is a semiconductor element that performs a diode operation. The diode operation is an operation in which a voltage less than or equal to a threshold voltage of a gate electrode G is applied to the gate electrode G with reference to a potential of a first ohmic electrode S, thereby conducting a current flow from the first ohmic electrode S to a second ohmic electrode D and blocking a current flow from the second ohmic electrode D to the first ohmic electrode S.

摘要翻译： 电动机驱动电路包括三相逆变器电路8，其包括用于驱动三相电动机3的不同相的上臂的三个上臂开关元件56a至56c和用于驱动的​​三个下臂开关元件56d至56f 不同阶段的下臂。 上臂开关元件56a至56c和下臂开关元件56d至56f中的至少一个是执行二极管操作的半导体元件。 二极管操作是参照第一欧姆电极S的电位将小于或等于栅电极G的阈值电压的电压施加到栅电极G的操作，从而从第一 欧姆电极S连接到第二欧姆电极D并阻塞从第二欧姆电极D到第一欧姆电极S的电流。

公开(公告)号：US07663161B2

公开(公告)日：2010-02-16

申请号：US11939899

申请日：2007-11-14

申请人： Kazuhiro Kaibara ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

发明人： Kazuhiro Kaibara ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

IPC分类号： H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L29/739 ,  H01L29/732 ,  H01L29/22 ,  H01L33/00 ,  H01L29/06

CPC分类号： H01L29/7787 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/432

摘要： A transistor includes: a first semiconductor layer and a second semiconductor layer with a first region and a second region, which are sequentially formed above a substrate; a first p-type semiconductor layer formed on a region of the second semiconductor layer other than the first and second regions; and a second p-type semiconductor layer formed on the first p-type semiconductor layer. The first p-type semiconductor layer is separated from a drain electrode by interposing therebetween a first groove having a bottom composed of the first region, and from a source electrode by interposing therebetween a second groove having a bottom composed of the second region.

摘要翻译： 晶体管包括：第一半导体层和具有第一区域和第二区域的第二半导体层，其顺序地形成在衬底上; 形成在除了第一和第二区域之外的第二半导体层的区域上的第一p型半导体层; 以及形成在第一p型半导体层上的第二p型半导体层。 第一p型半导体层与漏电极分离，其间具有由第一区域构成的底部的第一沟槽和源极电极之间插入具有由第二区域构成的底部的第二沟槽。