公开(公告)号：US07141850B2

公开(公告)日：2006-11-28

申请号：US10769573

申请日：2004-01-30

申请人： Mark A. Helm ,  Mark Fischer ,  John T. Moore ,  Scott Jeffrey DeBoer

发明人： Mark A. Helm ,  Mark Fischer ,  John T. Moore ,  Scott Jeffrey DeBoer

IPC分类号： H01L29/792

CPC分类号： H01L29/7881 ,  H01L21/28273 ,  H01L29/511

摘要： In one aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a silicon nitride layer over and against a floating gate; and b) forming a control gate over the silicon nitride layer. In another aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a floating gate layer over a substrate; b) forming a silicon nitride layer over the floating gate layer, the silicon nitride layer comprising a first portion and a second portion elevationally displaced from the first portion, the first portion having a greater stoichiometric amount of silicon than the second portion; and c) forming a control gate over the silicon nitride layer. In yet another aspect, the invention includes a gated semiconductor assembly comprising: a) a substrate; b) a floating gate over the substrate; c) a control gate over the floating gate; and d) an electron barrier layer between the floating gate and the control gate, the electron barrier layer comprising a silicon nitride layer, the silicon nitride layer comprising a first portion and a second portion elevationally displaced from the first portion, the first portion having a greater stoichiometric amount of silicon than the second portion.

摘要翻译： 一方面，本发明包括一种形成门控半导体组件的方法，包括：a）在浮动栅极上形成氮化硅层; 以及b）在所述氮化硅层上形成控制栅极。 另一方面，本发明包括形成门控半导体组件的方法，包括：a）在衬底上形成浮栅; b）在所述浮栅上形成氮化硅层，所述氮化硅层包括从所述第一部分向前倾斜的第一部分和第二部分，所述第一部分具有比所述第二部分更大的化学计量的硅量; 以及c）在所述氮化硅层上形成控制栅极。 在另一方面，本发明包括门控半导体组件，其包括：a）衬底; b）衬底上的浮栅; c）浮动门上的控制门; 以及d）在所述浮动栅极和所述控制栅极之间的电子势垒层，所述电子势垒层包括氮化硅层，所述氮化硅层包括第一部分和从所述第一部分向上偏移的第二部分，所述第一部分具有 比第二部分更大的化学计量的硅。

公开(公告)号：US07057263B2

公开(公告)日：2006-06-06

申请号：US10734419

申请日：2003-12-11

申请人： John T. Moore ,  Scott Jeffrey DeBoer ,  Mark Fischer ,  J. Brett Rolfson ,  Annette L. Martin ,  Ardavan Niroomand

发明人： John T. Moore ,  Scott Jeffrey DeBoer ,  Mark Fischer ,  J. Brett Rolfson ,  Annette L. Martin ,  Ardavan Niroomand

IPC分类号： H01L23/58

CPC分类号： H01L21/0217 ,  G03F7/091 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/0274 ,  H01L21/0332 ,  H01L21/31144 ,  H01L21/312 ,  H01L21/3185

摘要： In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer. In another aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; c) forming a photoresist over and against the barrier layer; d) exposing the photoresist to a patterned beam of light to render at least one portion of the photoresist more soluble in a solvent than an other portion, the barrier layer being an antireflective surface that absorbs light passing through the photoresist; and e) exposing the photoresist to the solvent to remove the at least one portion while leaving the other portion over the barrier layer. In yet another aspect, the invention includes a semiconductor wafer assembly, comprising: a) a silicon nitride material, the material having a surface; b) a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) a photoresist over and against the barrier layer.

公开(公告)号：US20060022845A1

公开(公告)日：2006-02-02

申请号：US11018749

申请日：2004-12-20

申请人： Mark Fischer

发明人： Mark Fischer

IPC分类号： G08B21/00

CPC分类号： G08G5/0013 ,  B64D45/0015 ,  B64D2045/0045 ,  G07C5/008 ,  G07C5/0825 ,  G07C5/0833 ,  G08G5/0086 ,  G08G5/045 ,  H04B7/18506

摘要： The present invention relates to a system and a process for providing improved operational safety for aircraft. The system/process of the instant invention utilizes real-time, two-way transmission of voice and/or text and flight-critical data between an aircraft and a ground-based computer workstation, where transmitted information monitored and acted upon as necessary by a qualified flight safety person, e.g., a appropriately trained individual (including but not limited to a safety pilot or other person trained in safety procedures). This safety person can perform a number of functions that would enhance flight safety, such as reducing the workload of the primary pilot(s), assisting in the performance of routine checklists, monitoring communications with air traffic control, and advising the pilot in the aircraft on how to handle any in-flight situations that may arise. By providing many if not all of the advantages of a second or third pilot in the aircraft cockpit without imposing additional weight or space requirements on the aircraft, the system/process of the instant invention can increase flight safety while reducing the associated costs.

摘要翻译： 本发明涉及一种用于为飞机提供改进的操作安全性的系统和方法。 本发明的系统/过程利用在飞机和地面计算机工作站之间的语音和/或文本和飞行关键数据的实时双向传输，其中发送的信息根据需要被监视和作用 合格的飞行安全人员，例如经过适当培训的人员（包括但不限于安全驾驶员或其他受安全程序培训的人员）。 该安全人员可以执行一些增强飞行安全的功能，例如减少主要飞行员的工作量，协助执行常规清单，监测与空中交通管制的通信，以及向飞机上的飞行员提供咨询 关于如何处理可能出现的任何飞行情况。 通过在飞机驾驶舱中提供许多（如果不是全部）第二或第三飞行员的优点，而不对飞行器施加额外的重量或空间要求，本发明的系统/过程可以增加飞行安全性，同时降低相关成本。

公开(公告)号：US06967146B2

公开(公告)日：2005-11-22

申请号：US10799794

申请日：2004-03-11

申请人： David L. Dickerson ,  Richard H. Lane ,  Charles H. Dennison ,  Kunal R. Parekh ,  Mark Fischer ,  John K. Zahurak

发明人： David L. Dickerson ,  Richard H. Lane ,  Charles H. Dennison ,  Kunal R. Parekh ,  Mark Fischer ,  John K. Zahurak

IPC分类号： H01L21/302 ,  H01L21/033 ,  H01L21/3065 ,  H01L21/76 ,  H01L21/762

CPC分类号： H01L21/76232 ,  H01L21/0332 ,  H01L21/76235

摘要： In one aspect, the invention includes an isolation region forming method comprising: a) forming an oxide layer over a substrate; b) forming a nitride layer over the oxide layer, the nitride layer and oxide layer having a pattern of openings extending therethrough to expose portions of the underlying substrate; c) etching the exposed portions of the underlying substrate to form openings extending into the substrate; d) after etching the exposed portions of the underlying substrate, removing portions of the nitride layer while leaving some of the nitride layer remaining over the substrate; and e) after removing portions of the nitride layer, forming oxide within the openings in the substrate, the oxide within the openings forming at least portions of isolation regions. In another aspect, the invention includes an isolation region forming method comprising: a) forming a silicon nitride layer over a substrate; b) forming a masking layer over the silicon nitride layer; c) forming a pattern of openings extending through the masking layer to the silicon nitride layer; d) extending the openings through the silicon nitride layer to the underlying substrate, the silicon nitride layer having edge regions proximate the openings and having a central region between the edge regions; e) extending the openings into the underlying substrate; f) after extending the openings into the underlying substrate, reducing a thickness of the silicon nitride layer at the edge regions to thin the edge regions relative to the central region; and g) forming oxide within the openings.

摘要翻译： 一方面，本发明包括一种隔离区形成方法，包括：a）在衬底上形成氧化物层; b）在所述氧化物层上形成氮化物层，所述氮化物层和氧化物层具有延伸穿过其中的开口图案以暴露所述下面的衬底的部分; c）蚀刻下面的衬底的暴露部分以形成延伸到衬底中的开口; d）在蚀刻下面的衬底的暴露部分之后，去除氮化物层的部分，同时留下一些保留在衬底上的氮化物层; 以及e）在去除所述氮化物层的部分之后，在所述衬底的所述开口内形成氧化物，所述开口内的氧化物形成至少部分隔离区域。 另一方面，本发明包括一种隔离区形成方法，包括：a）在衬底上形成氮化硅层; b）在氮化硅层上形成掩模层; c）形成延伸穿过掩模层的开口图案到氮化硅层; d）将开口穿过氮化硅层延伸到下面的衬底，氮化硅层具有靠近开口的边缘区域，并且在边缘区域之间具有中心区域; e）将开口延伸到下面的基底中; f）在将开口延伸到下面的基底之后，减小边缘区域处的氮化硅层的厚度，以使边缘区域相对于中心区域变薄; 和g）在开口内形成氧化物。

公开(公告)号：US20050249610A1

公开(公告)日：2005-11-10

申请号：US11112726

申请日：2005-04-21

申请人： Mark Fischer

发明人： Mark Fischer

IPC分类号： F04B17/00 ,  F04B35/00 ,  F04B43/02 ,  F04B43/04 ,  F04B53/16

CPC分类号： F04B43/02 ,  F04B43/026 ,  F04B43/04 ,  F04B53/16

摘要： A pump having top and bottom pieces coupled together by a coupling device features a circumferential clamp that is a lightweight plastic clamp having clamping members, each with one or more strengthening members oriented along a longitudinal axis defined in relation to the top and bottom pieces. The clamping members may include two semi-circular clamping members, each with circumferentially spaced strengthening rib members oriented along the longitudinal axis of the pump housing.

摘要翻译： 具有通过联接装置联接在一起的顶部和底部部件的泵具有圆周夹具，圆周夹具是具有夹紧构件的轻质塑料夹具，每个夹具具有沿着相对于顶部和底部部件限定的纵向轴线定向的一个或多个加强构件。 夹紧构件可以包括两个半圆形夹紧构件，每个夹紧构件具有沿着泵壳体的纵向轴线定向的周向隔开的加强肋构件。

公开(公告)号：US06900515B2

公开(公告)日：2005-05-31

申请号：US10200413

申请日：2002-07-22

申请人： Mark Fischer ,  Zhiping Yin ,  Thomas R. Glass ,  Kunal R. Parekh ,  Gurtej Singh Sandhu

发明人： Mark Fischer ,  Zhiping Yin ,  Thomas R. Glass ,  Kunal R. Parekh ,  Gurtej Singh Sandhu

IPC分类号： H01L21/82 ,  H01L21/8222 ,  H01L23/525 ,  H01L29/00

CPC分类号： H01L23/5256 ,  H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention relates to a laser fuse. The laser fuse comprises an element comprising a heat conductive material. The fuse also includes an absorption element comprising a material with an adjustable capacity for heat or light absorption that overlays the heat conductive element. The fuse also includes an outer insulating element that overlays and encloses the heat conductive element and the absorption element.

公开(公告)号：US06677650B2

公开(公告)日：2004-01-13

申请号：US10047349

申请日：2002-01-14

申请人： Mark Fischer ,  Jigish D. Trivedi ,  Charles H. Dennison ,  Todd R. Abbott ,  Raymond A. Turi

发明人： Mark Fischer ,  Jigish D. Trivedi ,  Charles H. Dennison ,  Todd R. Abbott ,  Raymond A. Turi

IPC分类号： H01L23532

CPC分类号： H01L27/10894 ,  G11C2207/104 ,  H01L21/76889 ,  H01L21/76895 ,  H01L21/76897 ,  H01L27/10855 ,  H01L27/10888

摘要： A process for fabricating system-on-chip devices which contain embedded DRAM along with other components such as SRAM or logic circuits is disclosed. Local interconnects, via salicides and tungsten are formed subsequent to polysilicon plugs required for the operation of the DRAM and SRAM or logic. Also disclosed are systems-on-chips MIM/MIS capacitive devices produced by the inventive process.

摘要翻译： 公开了一种用于制造片上系统的方法，其中包含嵌入式DRAM以及诸如SRAM或逻辑电路的其它组件。 在DRAM和SRAM或逻辑的操作所需的多晶硅插塞之后形成通过硫化物和钨的局部互连。 还公开了由本发明方法制造的片上系统MIM / MIS电容性器件。

公开(公告)号：US06593206B2

公开(公告)日：2003-07-15

申请号：US10076684

申请日：2002-02-14

申请人： David L. Dickerson ,  Richard H. Lane ,  Charles H. Dennison ,  Kunal R. Parekh ,  Mark Fischer ,  John K. Zahurak

发明人： David L. Dickerson ,  Richard H. Lane ,  Charles H. Dennison ,  Kunal R. Parekh ,  Mark Fischer ,  John K. Zahurak

IPC分类号： H01L2176

CPC分类号： H01L21/76232 ,  H01L21/0332 ,  H01L21/76235

摘要： In one aspect, the invention includes an isolation region forming method comprising: a) forming an oxide layer over a substrate; b) forming a nitride layer over the oxide layer, the nitride layer and oxide layer having a pattern of openings extending therethrough to expose portions of the underlying substrate; c) etching the exposed portions of the underlying substrate to form openings extending into the substrate; d) after etching the exposed portions of the underlying substrate, removing portions of the nitride layer while leaving some of the nitride layer remaining over the substrate; and e) after removing portions of the nitride layer, forming oxide within the openings in the substrate, the oxide within the openings forming at least portions of isolation regions. In another aspect, the invention includes an isolation region forming method comprising: a) forming a silicon nitride layer over a substrate; b) forming a masking layer over the silicon nitride layer; c) forming a pattern of openings extending through the masking layer to the silicon nitride layer; d) extending the openings through the silicon nitride layer to the underlying substrate, the silicon nitride layer having edge regions proximate the openings and having a central region between the edge regions; e) extending the openings into the underlying substrate; f) after extending the openings into the underlying substrate, reducing a thickness of the silicon nitride layer at the edge regions to thin the edge regions relative to the central region; and g) forming oxide within the openings.

公开(公告)号：US06326321B1

公开(公告)日：2001-12-04

申请号：US09604849

申请日：2000-06-27

申请人： Scott Jeffrey DeBoer ,  John T. Moore ,  Mark Fischer ,  Randhir P. S. Thakur

发明人： Scott Jeffrey DeBoer ,  John T. Moore ,  Mark Fischer ,  Randhir P. S. Thakur

IPC分类号： H01L2131

CPC分类号： H01L21/28123 ,  H01L21/0276 ,  H01L21/31144 ,  H01L21/3185

摘要： In one aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) enriching a portion of the thickness of the silicon nitride layer with silicon, the portion comprising less than or equal to about 95% of the thickness of the layer of silicon nitride. In another aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) increasing a refractive index of a first portion of the thickness of the silicon nitride layer relative to a refractive index of a second portion of the silicon nitride layer, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer. In yet another aspect, the invention includes semiconductor wafer assembly, comprising: a) a semiconductor wafer substrate; and b) a layer of silicon nitride over the substrate, the layer comprising a thickness and two portions elevationally displaced relative to one another, a first of the two portions having less resistance than a second of the two portions, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer.

摘要翻译： 一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）用硅富集氮化硅层的一部分厚度，该部分包含小于或等于氮化硅层厚度的约95％。 在另一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）相对于所述氮化硅层的第二部分的折射率增加所述氮化硅层的厚度的第一部分的折射率，所述第一部分包括小于或等于所述氮化硅层的厚度的约95％ 氮化硅层。 在另一方面，本发明包括半导体晶片组件，包括：a）半导体晶片衬底; 以及b）在所述衬底上的一层氮化硅，所述层包括相对于彼此高度位移的厚度和两个部分，所述两个部分中的第一部分具有比所述两个部分中的第二部分更小的电阻，所述第一部分包括小于 或等于氮化硅层厚度的约95％。

公开(公告)号：US06323139B1

公开(公告)日：2001-11-27

申请号：US09457093

申请日：1999-12-07

申请人： John T. Moore ,  Scott Jeffrey DeBoer ,  Mark Fischer ,  J. Brett Rolfson ,  Annette L. Martin ,  Ardavan Niroomand

发明人： John T. Moore ,  Scott Jeffrey DeBoer ,  Mark Fischer ,  J. Brett Rolfson ,  Annette L. Martin ,  Ardavan Niroomand

IPC分类号： H01L2131

CPC分类号： H01L21/0217 ,  G03F7/091 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/0274 ,  H01L21/0332 ,  H01L21/31144 ,  H01L21/312 ,  H01L21/3185

摘要： In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer. In another aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; c) forming a photoresist over and against the barrier layer; d) exposing the photoresist to a patterned beam of light to render at least one portion of the photoresist more soluble in a solvent than an other portion, the barrier layer being an antireflective surface that absorbs light passing through the photoresist; and e) exposing the photoresist to the solvent to remove the at least one portion while leaving the other portion over the barrier layer. In yet another aspect, the invention includes a semiconductor wafer assembly, comprising: a) a silicon nitride material, the material having a surface; b) a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) a photoresist over and against the barrier layer.

摘要翻译： 一方面，本发明包括半导体处理方法，包括：a）提供具有表面的氮化硅材料; b）在所述材料的表面上形成阻挡层，所述阻挡层包含硅和氮; 以及c）在所述阻挡层上形成光致抗蚀剂。 另一方面，本发明包括半导体处理方法，包括：a）提供具有表面的氮化硅材料; b）在所述材料的表面上形成阻挡层，所述阻挡层包含硅和氮; c）在阻挡层上形成光致抗蚀剂; d）将所述光致抗蚀剂暴露于图案化的光束以使所述光致抗蚀剂的至少一部分在溶剂中比其它部分更易溶，所述阻挡层是吸收通过所述光致抗蚀剂的光的抗反射表面; 以及e）将所述光致抗蚀剂暴露于所述溶剂以除去所述至少一个部分，同时将所述另一部分留在所述阻挡层上。 在另一方面，本发明包括半导体晶片组件，包括：a）氮化硅材料，该材料具有表面; b）在所述材料的表面上的阻挡层，所述阻挡层包含硅和氮; 以及c）在所述阻挡层上并抵靠所述阻挡层的光致抗蚀剂。