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    INFORMATION RECORDING DEVICE AND INFORMATION RECORDING/REPRODUCTION SYSTEM INCLUDING THE SAME
    51.
    发明申请
    INFORMATION RECORDING DEVICE AND INFORMATION RECORDING/REPRODUCTION SYSTEM INCLUDING THE SAME 审中-公开
    信息记录装置和包括其的信息记录/再现系统

    公开(公告)号：US20110037044A1

    公开(公告)日：2011-02-17

    申请号：US12921471

    申请日：2009-03-10

    申请人： Takeshi Araki ,  Takayuki Tsukamoto ,  Takeshi Yamaguchi

    发明人： Takeshi Araki ,  Takayuki Tsukamoto ,  Takeshi Yamaguchi

    IPC分类号： H01L45/00

    CPC分类号： H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625

    摘要： This disclosure provides an information recording device for use in a non-volatile information recording/reproduction system having a high recording density, the device including a resistive material having less phase separation or the like during switching. This disclosure also provides an information recording/reproduction system including the device. This disclosure provides an information recording device including: a pair of electrodes; and a recording layer between the electrodes, the recording layer recording information by its resistance change, the recording layer including at least one of (a) M3Oz and (b) AxM3—x0z as a main component, in (a) and (b), z being a value representing oxygen deficiency from z=4.5, and in (b), x satisfying 0.00

    摘要翻译： 本公开提供了一种用于具有高记录密度的非易失性信息记录/再现系统中的信息记录装置，该装置包括在切换期间具有较小相位分离等的电阻材料。 本公开还提供了包括该设备的信息记录/再现系统。 本公开提供一种信息记录装置，包括：一对电极; （a）和（b）中的（a）M3Oz和（b）AxM3-x0z中的至少一个作为主要成分，记录层通过其电阻变化记录信息，记录层记录信息， z表示从z = 4.5表示氧缺乏的值，在（b）中，x满足0.00

    INFORMATION RECORDING AND REPRODUCING APPARATUS
    52.
    发明申请
    INFORMATION RECORDING AND REPRODUCING APPARATUS 有权
    信息记录和再现设备

    公开(公告)号：US20100142261A1

    公开(公告)日：2010-06-10

    申请号：US12636606

    申请日：2009-12-11

    申请人： Kohichi KUBO ,  Chikayoshi Kamata ,  Takayuki Tsukamoto ,  Shinya Aoki ,  Takahiro Hirai ,  Toshiro Hiraoka

    发明人： Kohichi KUBO ,  Chikayoshi Kamata ,  Takayuki Tsukamoto ,  Shinya Aoki ,  Takahiro Hirai ,  Toshiro Hiraoka

    IPC分类号： G11C11/00 ,  H01L45/00

    CPC分类号： G11C13/0033 ,  B82Y10/00 ,  G11B9/04 ,  G11B9/149 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/003 ,  G11C16/3427 ,  G11C2213/53 ,  G11C2213/75 ,  H01L27/101 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/147 ,  H01L45/1625

    摘要： An information recording and reproducing apparatus, includes: a stacked structure including an electrode layer and a recording layer; a buffer layer added to the electrode layer; and a voltage application unit configured to apply a voltage to the recording layer, produce a phase change in the recording layer, and record information. The recording layer includes a first layer including a first compound having an ilmenite structure represented by AxMyX3 (0.1≦x≦1.1 and 0.75≦y≦1), the A and the M being mutually different elements, at least one selected from the A and the M being a transition element having a d orbit incompletely filled by electrons, the A being an element including at least one selected from the group consisting of Be, Mg, Fe, Co, Ni, Cu, and Zn, the M being an element including at least one selected from the group consisting of Ti, Ge, Sn, V, Cr, Mn, Fe, Co, Ni, Nb, Ta, Mo, W, Re, Ru, and Rh, the X being an element including at least one selected from the group consisting of O (oxygen) and N (nitrogen).

    摘要翻译： 一种信息记录和再现装置，包括：堆叠结构，包括电极层和记录层; 添加到电极层的缓冲层; 以及电压施加单元，被配置为向所述记录层施加电压，在所述记录层中产生相变，并记录信息。 记录层包括第一层，其包含具有由AxMyX3（0.1＆amp; NlE; x＆nlE; 1.1和0.75＆nlE; y＆nlE; 1）表示的钛铁矿结构的第一化合物，A和M是相互不同的元素， A和M是具有未被电子填充的轨道的过渡元素，A是包括选自Be，Mg，Fe，Co，Ni，Cu和Zn中的至少一种的元素，M是 包括选自由Ti，Ge，Sn，V，Cr，Mn，Fe，Co，Ni，Nb，Ta，Mo，W，Re，Ru和Rh组成的组中的至少一种的元素，X是包括 选自O（氧）和N（氮）中的至少一种。

    Semiconductor memory device
    56.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号：US08759806B2

    公开(公告)日：2014-06-24

    申请号：US13182095

    申请日：2011-07-13

    申请人： Takeshi Yamaguchi ,  Hirofumi Inoue ,  Reika Ichihara ,  Takayuki Tsukamoto ,  Takashi Shigeoka ,  Katsuyuki Sekine ,  Shinya Aoki

    发明人： Takeshi Yamaguchi ,  Hirofumi Inoue ,  Reika Ichihara ,  Takayuki Tsukamoto ,  Takashi Shigeoka ,  Katsuyuki Sekine ,  Shinya Aoki

    IPC分类号： H01L29/02

    CPC分类号： H01L45/146 ,  H01L27/2409 ,  H01L45/08 ,  H01L45/1233

    摘要： A semiconductor memory device in an embodiment comprises memory cells, each of the memory cells disposed between a first line and a second line and having a variable resistance element and a switching element connected in series. The variable resistance element includes a variable resistance layer configured to change in resistance value thereof between a low-resistance state and a high-resistance state. The variable resistance layer is configured by a transition metal oxide. A ratio of transition metal and oxygen configuring the transition metal oxide varies between 1:1 and 1:2 along a first direction directed from the first line to the second line.

    摘要翻译： 实施例中的半导体存储器件包括存储单元，每个存储单元设置在第一线和第二线之间，并且具有串联连接的可变电阻元件和开关元件。 可变电阻元件包括可变电阻层，其被配置为在低电阻状态和高电阻状态之间改变其电阻值。 可变电阻层由过渡金属氧化物构成。 构成过渡金属氧化物的过渡金属和氧的比例沿着从第一线指向第二线的第一方向在1:1和1:2之间变化。

    Nonvolatile semiconductor memory device
    57.
    发明授权
    Nonvolatile semiconductor memory device 有权
    非易失性半导体存储器件

    公开(公告)号：US08576606B2

    公开(公告)日：2013-11-05

    申请号：US13052214

    申请日：2011-03-21

    申请人： Tetsuji Kunitake ,  Takashi Shigeoka ,  Takayuki Tsukamoto ,  Hironori Wakai ,  Hisashi Kato

    发明人： Tetsuji Kunitake ,  Takashi Shigeoka ,  Takayuki Tsukamoto ,  Hironori Wakai ,  Hisashi Kato

    IPC分类号： G11C11/00

    CPC分类号： H01L27/24 ,  G11C8/08 ,  G11C13/0007 ,  G11C13/0023 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0083 ,  H01L27/1021

    摘要： A nonvolatile semiconductor memory device according to an embodiment herein includes a memory cell array. The memory cell array includes memory cells each provided between a first line and a second line and each including a variable resistor. A control circuit applies through the first and second lines a voltage necessary for a forming operation of the memory cell. A current limiting circuit limits a value of a current flowing across the memory cell during the forming operation to a certain limit value. The control circuit repeats an operation of applying the voltage by setting the limit value to a certain value and an operation of changing the limit value from the certain value, until forming of the memory cell is achieved.

    摘要翻译： 根据本文实施例的非易失性半导体存储器件包括存储单元阵列。 存储单元阵列包括各自设置在第一线路和第二线路之间并且各自包括可变电阻器的存储器单元。 控制电路通过第一和第二行施加存储单元的形成操作所需的电压。 电流限制电路将在成形操作期间流过存储器单元的电流的值限制到某一极限值。 控制电路重复通过将极限值设定为一定值来施加电压的操作和从该特定值改变极限值的操作，直到实现存储单元的形成。

    Radio frequency indentification tag
    58.
    发明授权
    Radio frequency indentification tag 有权
    射频识别标签

    公开(公告)号：US08319611B2

    公开(公告)日：2012-11-27

    申请号：US12244842

    申请日：2008-10-03

    申请人： Takayuki Tsukamoto ,  Mutsuya Motojima

    发明人： Takayuki Tsukamoto ,  Mutsuya Motojima

    IPC分类号： H04Q5/22

    CPC分类号： H04B5/02 ,  G06K19/0713 ,  G06K19/0723 ,  H04B5/0031 ,  H04B5/0037 ,  H04B5/0062 ,  H04Q2213/13095 ,  Y02D70/166

    摘要： An ID tag has a stable internal supply voltage and extends the range of communication with the reader/writer during back scattering communication. An ASK-modulated signal pre-boost circuit to which antenna terminals are coupled is coupled in parallel with a rectifying circuit. In the ASK-modulated signal pre-boost circuit, a switch for back scattering, working as a modulator element, is provided. During back scattering communication, when a back scattering signal “1” is transmitted, only the current flowing in the signal receiving path of the modulation/demodulation unit is wasted by turning the switch for back scattering on. Additional current loss other than the loss for impedance matching can be prevented.

    摘要翻译： ID标签具有稳定的内部电源电压，并且在后向散射通信期间扩展与读取器/写入器的通信范围。 天线端子耦合到的ASK调制信号预升压电路与整流电路并联耦合。 在ASK调制信号预升压电路中，提供了用作后向散射的开关，用作调制器元件。 在背散射通信中，当发送背散射信号1时，仅通过转动用于背散射的开关来浪费在调制/解调单元的信号接收路径中流动的电流。 可以防止除了阻抗匹配损失之外的附加电流损耗。

    Semiconductor memory device
    60.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号：US07948790B2

    公开(公告)日：2011-05-24

    申请号：US12558058

    申请日：2009-09-11

    申请人： Takayuki Tsukamoto ,  Reika Ichihara

    发明人： Takayuki Tsukamoto ,  Reika Ichihara

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0007 ,  G11C11/5685 ,  G11C13/0064 ,  G11C13/0069 ,  G11C16/3413 ,  G11C16/3463 ,  G11C2013/009 ,  G11C2211/5642 ,  G11C2213/31 ,  G11C2213/56 ,  G11C2213/71 ,  G11C2213/72

    摘要： A memory cell arranged between first and second wirings includes a variable-resistor element. A controller controls a voltage applied between the first and second wirings. The controller performs a first operation that applies a first voltage between the first and second wirings to switch the variable-resistor element from a first state with a resistance value not less than a first resistance value, to a second state with a resistance value not more than a second resistance value smaller than the first resistance value. The second operation applies a second voltage smaller than the first voltage between the first and second wirings to switch the variable-resistor element from the second state to the first state. In the first operation, a verify voltage is applied between the first and second wirings. Based on the obtained signal, a third voltage smaller than the first voltage is applied between the first and second wirings.

    摘要翻译： 布置在第一和第二布线之间的存储单元包括可变电阻器元件。 控制器控制施加在第一和第二布线之间的电压。 控制器执行第一操作，其在第一和第二布线之间施加第一电压，以将具有不小于第一电阻值的电阻值的第一状态的可变电阻元件切换到具有不大于电阻值的第二状态 比第一电阻值小的第二电阻值。 第二操作施加小于第一和第二布线之间的第一电压的第二电压，以将可变电阻元件从第二状态切换到第一状态。 在第一操作中，在第一和第二布线之间施加验证电压。 基于获得的信号，在第一和第二布线之间施加小于第一电压的第三电压。