Method for correcting differential output mismatch in a passive CMOS mixer circuit
    51.
    发明授权
    Method for correcting differential output mismatch in a passive CMOS mixer circuit 有权
    用于校正无源CMOS混频器电路中的差分输出失配的方法

    公开(公告)号:US07859270B2

    公开(公告)日:2010-12-28

    申请号:US12493357

    申请日:2009-06-29

    IPC分类号: G01R35/00 H04B1/26 H04B17/00

    摘要: A passive CMOS differential mixer circuit with a mismatch correction circuit for balancing the electrical characteristics of the two output paths. Once the output paths of the differential circuit are balanced, or matched as closely as possible, second order intermodulation product generation can be inhibited or at least reduced to acceptable levels. The mismatch correction circuit receives a digital offset signal, and generates one or more voltage signals to be selectively applied to the signal paths of the passive differential mixer circuit. The voltage signals can be adjusted back gate bias voltages applied to the bulk terminals of selected transistors to adjust their threshold voltages, or the voltage signals can be adjusted common mode voltages applied directly to a selected signal path. Since the differential mixer circuit is passive, no DC current contribution to noise is generated. The switching transistors of the mixer circuit can be maintained at minimal dimensions to reduce switching signal drive loading, resulting in lower power consumption and higher operating frequencies than if larger switching transistors were use

    摘要翻译: 一种具有用于平衡两个输出路径的电气特性的失配校正电路的无源CMOS差分混频器电路。 一旦差分电路的输出路径平衡或尽可能匹配,可以抑制二阶互调乘积的产生或至少降低到可接受的水平。 失配校正电路接收数字偏移信号,并产生一个或多个电压信号以选择性地施加到无源差分混频器电路的信号路径。 电压信号可以调节施加到所选晶体管的体积端子的反向栅极偏置电压以调整其阈值电压,或者可以将电压信号调整为直接施加到选定信号路径的共模电压。 由于差分混频器电路是无源的,所以不产生直流电流对噪声的贡献。 混合器电路的开关晶体管可以保持在最小的尺寸以减少开关信号驱动负载,导致比如果使用更大的开关晶体管时更低的功耗和更高的工作频率

    Hybrid linear and polar modulation apparatus
    52.
    发明授权
    Hybrid linear and polar modulation apparatus 有权
    混合线性和极化调制装置

    公开(公告)号:US07623000B2

    公开(公告)日:2009-11-24

    申请号:US11778849

    申请日:2007-07-17

    IPC分类号: H04L27/20 H04L27/36

    CPC分类号: H03C5/00

    摘要: The invention is directed at a hybrid modulation apparatus which combines a polar modulation circuit and a linear modulation circuit. The hybrid apparatus allows a communications device to function as a polar or a linear modulation circuit with less components as the output of the linear modulation circuit is an input of the polar modulation circuit.

    摘要翻译: 本发明涉及组合极性调制电路和线性调制电路的混合调制装置。 混合设备允许通信设备用作具有较少组件的极性或线性调制电路,因为线性调制电路的输出是极坐标调制电路的输入。

    Low noise CMOS transmitter circuit with high range of gain
    53.
    发明授权
    Low noise CMOS transmitter circuit with high range of gain 有权
    低噪声CMOS发射电路具有高增益范围

    公开(公告)号:US07593701B2

    公开(公告)日:2009-09-22

    申请号:US11409092

    申请日:2006-04-24

    IPC分类号: H04B1/04

    摘要: A CMOS automatic gain control (AGC) circuit that receives an analog control voltage and generates a temperature compensated gain voltage to linearly control the gain of a variable gain circuit operating in the sub-threshold region. A PTAT circuit having a resistor network coupled to a current mirror circuit operating in the sub-threshold region establishes a current having an proportional relationship to temperature. This current is used as a supply for a voltage to voltage converter circuit which generates an intermediate voltage in response to the analog control voltage. A linearizing circuit operating in the sub-threshold region pre-conditions the intermediate voltage, which is then applied to a variable gain circuit. The variable gain circuit is operated in the sub-threshold region, and the preconditioned intermediate voltage will control the amount of gain to be substantially linear with respect to the analog control voltage, and with a range of about 85 dB.

    摘要翻译: 一种CMOS自动增益控制(AGC)电路,其接收模拟控制电压并产生温度补偿增益电压,以线性地控制在子阈值区域中工作的可变增益电路的增益。 具有耦合到在次阈值区域中工作的电流镜电路的电阻网络的PTAT电路建立与温度成比例关系的电流。 该电流用作电压到电压转换器电路的电源,其产生响应于模拟控制电压的中间电压。 在亚阈值区域中操作的线性化电路预先规定中间电压,然后将其施加到可变增益电路。 可变增益电路在子阈值区域中工作,并且预处理的中间电压将控制增益量相对于模拟控制电压基本上线性,并且在约85dB的范围内。

    Method and apparatus for reducing leakage in a direct conversion transmitter
    54.
    发明授权
    Method and apparatus for reducing leakage in a direct conversion transmitter 有权
    用于减少直接变换发射机泄漏的方法和装置

    公开(公告)号:US07509101B2

    公开(公告)日:2009-03-24

    申请号:US10833908

    申请日:2004-04-28

    IPC分类号: H04B1/28 H04B1/04

    CPC分类号: H04B1/30 H04B1/0475

    摘要: Methods and apparatus for reducing the amount of leakage in a transmitter are disclosed. In one embodiment, a wireless transmitter is comprises: a divider providing a local oscillation (LO) signal, a plurality of mixers that receive the LO signal and receive a signal to be modulated, a summer coupled to the plurality of mixers, and a plurality of amplifiers serially coupled to the summer. The divider couples to a capacitor, a resistor, and a power supply and the resistor and the capacitor form a pole that attenuates the LO signal present on the power supply.

    摘要翻译: 公开了减少发射机泄漏量的方法和装置。 在一个实施例中,无线发射机包括:提供本地振荡(LO)信号的分频器,接收所述LO信号并接收待调制的信号的多个混频器,耦合到所述多个混频器的加法器,以及多个 的放大器串联耦合到夏天。 分压器耦合到电容器,电阻器和电源,电阻器和电容器形成一个极点,可以衰减电源上存在的LO信号。

    System and method for digital radio receiver
    55.
    发明授权
    System and method for digital radio receiver 有权
    数字无线电接收机的系统和方法

    公开(公告)号:US07376400B2

    公开(公告)日:2008-05-20

    申请号:US10915296

    申请日:2004-08-10

    IPC分类号: H04B1/26 H04B1/28

    CPC分类号: H04B1/30

    摘要: A communications system comprising a processor, a variable oscillator, a radio frequency (RF) quadrature demodulator, a variable capacitor, a continuous-time, sigma-delta analog-to-digital converter (ADC), and a frequency divider, all integrated on a single semiconductor chip. The ADC samples the RF quadrature demodulator output. The processor sets the communications system frequency by controlling the oscillator, the frequency divider and the variable capacitor.

    摘要翻译: 一种通信系统,包括处理器,可变振荡器,射频(RF)正交解调器,可变电容器,连续时间,Σ-Δ模数转换器(ADC)和分频器,所有这些都集成在 单个半导体芯片。 ADC采样RF正交解调器输出。 处理器通过控制振荡器,分频器和可变电容器来设置通信系统频率。

    Method and system for amplifying a signal
    56.
    发明申请
    Method and system for amplifying a signal 有权
    用于放大信号的方法和系统

    公开(公告)号:US20060152288A1

    公开(公告)日:2006-07-13

    申请号:US11031185

    申请日:2005-01-07

    IPC分类号: H03F1/22

    摘要: According to one embodiment of the invention, an amplifier includes a gate bias circuit operable to generate a gate bias voltage and a common gate amplifier that includes a transistor having a gate biased by an output of the gate bias circuit and also having a source connected to an inductor for providing a path to ground for direct current flowing through the transistor. According to another embodiment of the invention, a method for amplifying a signal by an amplifier includes generating a gate bias voltage indicative of a difference between a reference voltage and an output voltage of the amplifier, biasing the gate of the common-gate amplifier with the gate bias voltage, and blocking, by a passive device, alternating current signals from flowing from the source of the transistor to ground.

    摘要翻译: 根据本发明的一个实施例,放大器包括栅极偏置电路,其可操作以产生栅极偏置电压和公共栅极放大器,该公共栅极放大器包括具有由栅极偏置电路的输出偏置的栅极的晶体管,并且源极连接到 电感器,用于为直流电流流过晶体管提供路径。 根据本发明的另一个实施例,一种用于放大放大器的信号的方法包括:生成指示放大器的参考电压和输出电压之间的差异的栅极偏置电压,使公共栅极放大器的栅极偏置 栅极偏置电压和被无源器件阻塞从晶体管的源极流到地的交流信号。

    Fully digital transmitter including a digital band-pass sigma-delta modulator
    57.
    发明授权
    Fully digital transmitter including a digital band-pass sigma-delta modulator 有权
    全数字发射器,包括数字带通Σ-Δ调制器

    公开(公告)号:US07061989B2

    公开(公告)日:2006-06-13

    申请号:US10856217

    申请日:2004-05-28

    IPC分类号: H04L27/04 H04L27/12 H04L27/20

    摘要: A digital transmitter (20) that may be advantageously used in a high-frequency transceiver, such as a wireless telephone handset, is disclosed. The transmitter (20) includes digital upconverter functions (36I, 36Q) that operate in combination with a digital band-pass sigma-delta modulator (40) to generate modulated digital signals at a sample frequency that is a multiple of the transmit frequency. The digital band-pass sigma-delta modulator (40) applies a noise transfer function in a feedback filter (72) in which the center of the pass band corresponds to the transmit frequency, and in which notches in the characteristic can be symmetrically or asymmetrically selected to correspond to specific frequencies, such as the receive band frequency, in which transmit noise is to be minimized. A combined FIR digital filter (42) and MOS power switch array (44) is also disclosed, in which a cascode arrangement of drain-extended MOS power transistors (78) and switching transistors (82) provide the output RF signal, with a coarse gain control (80) applied.

    摘要翻译: 公开了一种可有利地用于诸如无线电话手机的高频收发器中的数字发射机(20)。 发射器(20)包括与数字带通Σ-Δ调制器(40)结合操作的数字上变频器功能(36 I,36 Q),以产生调制数字信号,采样频率为发射频率的倍数 。 数字带通Σ-Δ调制器(40)在反馈滤波器(72)中应用噪声传递函数,其中通带的中心对应于发射频率,并且其中特性中的凹口可以对称或不对称地 被选择为对应于发射噪声将被最小化的特定频率,例如接收频带频率。 还公开了组合FIR数字滤波器(42)和MOS功率开关阵列(44),其中漏极扩展MOS功率晶体管(78)和开关晶体管(82)的共源共栅排列提供输出RF信号,粗略 增益控制(80)应用。

    Using an IF synthesizer to provide raster component of frequency channel spacing
    58.
    发明授权
    Using an IF synthesizer to provide raster component of frequency channel spacing 有权
    使用IF合成器提供频道间隔的光栅分量

    公开(公告)号:US06990154B1

    公开(公告)日:2006-01-24

    申请号:US09706068

    申请日:2000-11-03

    IPC分类号: H04C27/04

    CPC分类号: H03L7/23 H03C3/40

    摘要: In the synthesis of frequency channel spacing in an RF transmission signal, a raster component of the desired frequency channel spacing is provided by an integer IF frequency synthesizer (44). Because the frequencies associated with the IF synthesizer are lower then those associated with an RF frequency synthesizer (48), the IF synthesizer can incorporate the desired raster using a lower feedback divisor (N) than can the RF synthesizer.

    摘要翻译: 在RF传输信号中的频道间隔的合成中,期望的频道间隔的光栅分量由整数IF频率合成器(44)提供。 因为与IF合成器相关联的频率低于与RF频率合成器(48)相关联的频率,所以IF合成器可以使用比RF合成器低的反馈除数(N)来合并期望的光栅。

    System and method for digital radio receiver
    59.
    发明申请
    System and method for digital radio receiver 有权
    数字无线电接收机的系统和方法

    公开(公告)号:US20050070325A1

    公开(公告)日:2005-03-31

    申请号:US10915296

    申请日:2004-08-10

    CPC分类号: H04B1/30

    摘要: A communications system comprising a processor, a variable oscillator, a radio frequency (RF) quadrature demodulator, a variable capacitor, a continuous-time, sigma-delta analog-to-digital converter (ADC), and a frequency divider, all integrated on a single semiconductor chip. The ADC samples the RF quadrature demodulator output. The processor sets the communications system frequency by controlling the oscillator, the frequency divider and the variable capacitor.

    摘要翻译: 一种通信系统,包括处理器,可变振荡器,射频(RF)正交解调器,可变电容器,连续时间,Σ-Δ模数转换器(ADC)和分频器,所有这些都集成在 单个半导体芯片。 ADC采样RF正交解调器输出。 处理器通过控制振荡器,分频器和可变电容器来设置通信系统频率。

    Sample and hold phase detector having low spurious performance and method

    公开(公告)号:US06525521B2

    公开(公告)日:2003-02-25

    申请号:US09790377

    申请日:2001-02-22

    IPC分类号: G01R1334

    CPC分类号: H03L7/091 H03D13/006

    摘要: A method for lowering the spurious output of a sample and hold phase detector includes the steps of charging a ramp node (502) to a first voltage level after a sample period (606) has occurred. After the ramp node (502) is charged to the first voltage level, the ramp node is charged to a second voltage level during period (610). By precharging the ramp node (502) during the hold period (614), it reduces any leakage current in the SH switch (514), which minimizes any voltage drift thereby improving the spurious performance of the SH phase detector (500).