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36 条记录 (耗时 0.014 秒)

    Signal reproducing device
    2.
    发明授权
    Signal reproducing device 有权
    信号再现装置

    公开(公告)号：US08314646B2

    公开(公告)日：2012-11-20

    申请号：US12920091

    申请日：2008-09-02

    申请人： Seiya Kasai

    发明人： Seiya Kasai

    IPC分类号： G06F7/42

    CPC分类号： H03F3/211 ,  H03F2200/162 ,  H03F2200/366 ,  H03F2200/372 ,  H03F2200/375

    摘要： The purpose is to detect minute electrical signals embedded in noise with a simple device configuration and easily reduce the area of the device by utilizing a semiconductor device in particular. This signal reproducing device (1) includes: N FETs (61 to 6N) each receiving a common input signal (VIN) at a gate terminal and having a bias voltage (VDD) applied to a drain terminal; and an adder circuit (4) connected to source terminals of the FETs (61 to 6N), for combining currents between the drain terminals and the source terminals of the FETs (61 to 6N) and outputting the resulting current, wherein the FETs (61 to 6N) and the bias voltage (VDD) are set so that a voltage at the gate terminal having the common input signal (VIN) applied thereto falls within a subthreshold region of voltages less than a threshold voltage of the FETs (61 to 6N).

    摘要翻译： 其目的是通过简单的器件配置来检测嵌入噪声中的微小电信号，特别是通过利用半导体器件容易地减小器件的面积。 该信号再现装置（1）包括：N个FET（61至6N），每个FET在栅极端接收公共输入信号（VIN），并且具有施加到漏极端子的偏置电压（VDD） 以及连接到FET（61至6N）的源极端子的加法器电路（4），用于组合FET（61至6N）的漏极端子和源极端子之间的电流并输出所得到的电流，其中FET（61 至6N），并且偏置电压（VDD）被设置为使得施加有公共输入信号（VIN）的栅极端子处的电压落在小于FET（61至6N）的阈值电压的电压的亚阈值区域内， 。

    SIGNAL REPRODUCING DEVICE
    5.
    发明申请
    SIGNAL REPRODUCING DEVICE 有权
    信号再现设备

    公开(公告)号：US20110050332A1

    公开(公告)日：2011-03-03

    申请号：US12920091

    申请日：2008-09-02

    申请人： Seiya Kasai

    发明人： Seiya Kasai

    IPC分类号： H03K5/00

    CPC分类号： H03F3/211 ,  H03F2200/162 ,  H03F2200/366 ,  H03F2200/372 ,  H03F2200/375

    摘要： The purpose is to detect minute electrical signals embedded in noise with a simple device configuration and easily reduce the area of the device by utilizing a semiconductor device in particular. This signal reproducing device (1) includes: N FETs (61 to 6N) each receiving a common input signal (VIN) at a gate terminal and having a bias voltage (VDD) applied to a drain terminal; and an adder circuit (4) connected to source terminals of the FETs (61 to 6N), for combining currents between the drain terminals and the source terminals of the FETs (61 to 6N) and outputting the resulting current, wherein the FETs (61 to 6N) and the bias voltage (VDD) are set so that a voltage at the gate terminal having the common input signal (VIN) applied thereto falls within a subthreshold region of voltages less than a threshold voltage of the FETs (61 to 6N).

    摘要翻译： 其目的是通过简单的器件配置来检测嵌入噪声中的微小电信号，特别是通过利用半导体器件容易地减小器件的面积。 该信号再现装置（1）包括：N个FET（61至6N），每个FET在栅极端接收公共输入信号（VIN），并且具有施加到漏极端子的偏置电压（VDD） 以及连接到FET（61至6N）的源极端子的加法器电路（4），用于组合FET（61至6N）的漏极端子和源极端子之间的电流并输出所得到的电流，其中FET（61 至6N），并且偏置电压（VDD）被设置为使得施加有公共输入信号（VIN）的栅极端子处的电压落在小于FET（61至6N）的阈值电压的电压的亚阈值区域内， 。

    Charge or particle sensing
    7.
    发明授权
    Charge or particle sensing 失效
    电荷或粒子感测

    公开(公告)号：US07183555B2

    公开(公告)日：2007-02-27

    申请号：US10500794

    申请日：2003-01-20

    申请人： Pierre Jarron

    发明人： Pierre Jarron

    IPC分类号： G01T1/24

    CPC分类号： H03F3/087 ,  H03F2200/162 ,  H03F2200/357 ,  H04N5/3742 ,  H04N5/3745

    摘要： A sensing arrangement for sensing charged particles and/or quanta of electromagnetic radiation has a sensor device (12) and amplifier circuitry (14). The sensor device (12) provides a sensor signal to an imput mode (vin) of the amplifier (14) to cause the level at the amplifier output mode (vout) to change. A negative feetback device (T1) responds to the change in level of the output node (Vour) to vary the feedback effect to increase the loop again of said amplifier circuitry (14). A current mirror (T2,T3) resets the input node (vin) to its initial level. Single particle and integrating sensor arrangements are disclosed.

    摘要翻译： 用于感测带电粒子和/或电磁辐射量子的感测装置具有传感器装置（12）和放大器电路（14）。 传感器装置（12）将传感器信号提供给放大器（14）的输入模式（vin），以使放大器输出模式（vout）处的电平改变。 负的背部设备（T 1）响应于输出节点（Vour）的电平变化，以改变反馈效应，以再次增加所述放大器电路（14）的环路。 电流镜（T 2，T 3）将输入节点（vin）重置为初始电平。 公开了单颗粒和积分传感器装置。

    Low noise CMOS transmitter circuit with high range of gain
    8.
    发明授权
    Low noise CMOS transmitter circuit with high range of gain 有权
    低噪声CMOS发射电路具有高增益范围

    公开(公告)号：US07593701B2

    公开(公告)日：2009-09-22

    申请号：US11409092

    申请日：2006-04-24

    申请人： Abdellatif Bellaouar ,  Michel J. G. J. P. Frechette

    发明人： Abdellatif Bellaouar ,  Michel J. G. J. P. Frechette

    IPC分类号： H04B1/04

    CPC分类号： H03G1/04 ,  H03F1/26 ,  H03F3/24 ,  H03F3/347 ,  H03F3/45071 ,  H03F2200/162 ,  H03F2200/447

    摘要： A CMOS automatic gain control (AGC) circuit that receives an analog control voltage and generates a temperature compensated gain voltage to linearly control the gain of a variable gain circuit operating in the sub-threshold region. A PTAT circuit having a resistor network coupled to a current mirror circuit operating in the sub-threshold region establishes a current having an proportional relationship to temperature. This current is used as a supply for a voltage to voltage converter circuit which generates an intermediate voltage in response to the analog control voltage. A linearizing circuit operating in the sub-threshold region pre-conditions the intermediate voltage, which is then applied to a variable gain circuit. The variable gain circuit is operated in the sub-threshold region, and the preconditioned intermediate voltage will control the amount of gain to be substantially linear with respect to the analog control voltage, and with a range of about 85 dB.

    摘要翻译： 一种CMOS自动增益控制（AGC）电路，其接收模拟控制电压并产生温度补偿增益电压，以线性地控制在子阈值区域中工作的可变增益电路的增益。 具有耦合到在次阈值区域中工作的电流镜电路的电阻网络的PTAT电路建立与温度成比例关系的电流。 该电流用作电压到电压转换器电路的电源，其产生响应于模拟控制电压的中间电压。 在亚阈值区域中操作的线性化电路预先规定中间电压，然后将其施加到可变增益电路。 可变增益电路在子阈值区域中工作，并且预处理的中间电压将控制增益量相对于模拟控制电压基本上线性，并且在约85dB的范围内。

    Input stag of an operational amplifier
    10.
    发明授权
    Input stag of an operational amplifier 有权
    运算放大器的输入级

    公开(公告)号：US06462619B1

    公开(公告)日：2002-10-08

    申请号：US09756259

    申请日：2001-01-08

    申请人： Vadim V. Ivanov ,  Shilong Zhang

    发明人： Vadim V. Ivanov ,  Shilong Zhang

    IPC分类号： H03F345

    CPC分类号： H03F3/45219 ,  H03F2200/162

    摘要： An input to a rail-to-rail, FET, operational amplifier having a transconductance that is constant throughout the operating range of the operational amplifier is presented. The input of an operational amplifier typically includes an input stage, a current source and a current transfer circuit, wherein the input stage comprises both N-type transistors and P-type transistors. The present application discloses the use of a duplicate of those elements: a proportional input stage, a proportional current source, and a proportional current transfer circuit, which together are used to emulate the operation of the input stage. By monitoring these proportional duplicates, one can determine when both input pairs are operating. When both input pairs are operating, a minimum selector circuit interfaces with the current transfer circuit to reduce the current supplying one of the input pair transistors, thus reducing the overall transconductance of the circuit.

    摘要翻译： 提出了一种具有在运算放大器的整个工作范围内恒定的跨导的轨至轨FET运算放大器的输入。 运算放大器的输入通常包括输入级，电流源和电流传输电路，其中输入级包括N型晶体管和P型晶体管。 本申请公开了使用这些元件的副本：比例输入级，比例电流源和比例电流传输电路，它们一起用于模拟输入级的操作。 通过监视这些比例重复，可以确定两个输入对何时运行。 当两个输入对都工作时，最小选择器电路与电流传输电路相连接，以减少供给输入对晶体管之一的电流，从而减小电路的整体跨导。