Hollow cathode enhanced magnetron sputter device
    51.
    发明授权
    Hollow cathode enhanced magnetron sputter device 失效
    空心阴极增强磁控溅射装置

    公开(公告)号:US4588490A

    公开(公告)日:1986-05-13

    申请号:US736918

    申请日:1985-05-22

    IPC分类号: C23F4/00 C23C14/35 H01J37/34

    CPC分类号: H01J37/3405

    摘要: A plasma sputter etching/deposition system comprising an electron-emitting hollow cathode arc-source combined with a conventional plasma sputter etching/deposition system such as a magnetron. The electrons emitted are coupled into the intrinsic high energy, e.g., magnetic field and are accelerated by the plasma potential and cause a significant increase plasma density. The resultant combination allows much greater sputtering/deposition efficiency than was possible with previous devices. According to a further aspect of the invention, switched operation is possible, whereby etching may vary from isotropic to anisotropic. A side discharge hollow cathode structure is also described for enhancing certain sputtering/deposition processes, wherein electrons may be emitted from one or more openings at the side of a hollow cathode chamber to achieve more uniform electron emission in a large process chamber.

    摘要翻译: 等离子体溅射蚀刻/沉积系统,其包括与常规等离子体溅射蚀刻/沉积系统如磁控管组合的电子发射空心阴极电弧源。 所发射的电子被耦合到固有的高能量例如磁场中,并被等离子体电势加速并且引起显着增加的等离子体密度。 所得到的组合允许比以前的装置更大的溅射/沉积效率。 根据本发明的另一方面,切换操作是可能的,由此蚀刻可以从各向同性到各向异性。 还描述了用于增强某些溅射/沉积工艺的侧面放电中空阴极结构,其中电子可以从中空阴极室侧面的一个或多个开口发射,以在大的处理室中实现更均匀的电子发射。

    Electron beam sculpting of tunneling junction for nanopore DNA sequencing
    52.
    发明授权
    Electron beam sculpting of tunneling junction for nanopore DNA sequencing 有权
    用于纳米孔DNA测序的隧道结的电子束雕刻

    公开(公告)号:US08858764B2

    公开(公告)日:2014-10-14

    申请号:US13606815

    申请日:2012-09-07

    IPC分类号: H01L21/00 G01N33/487

    CPC分类号: G01N33/48721 Y10S977/712

    摘要: A technique for a nanodevice is provided that includes a reservoir filled with a conductive fluid and a membrane separating the reservoir. The membrane includes an electrode layer having a tunneling junction formed therein. A nanopore is formed through the membrane, and the nanopore is formed through other layers of the membrane such that the nanopore is aligned with the tunneling junction of the electrode layer. When a voltage is applied to the electrode layer, a tunneling current is generated by a base in the tunneling junction to be measured as a signature for distinguishing the base. When an organic coating is formed on an inside surface of the tunneling junction, transient bonds are formed between the electrode layer and the base.

    摘要翻译: 提供了一种纳米器件的技术,其包括填充有导电流体的储存器和分离储存器的膜。 膜包括其中形成有隧道结的电极层。 通过膜形成纳米孔,并且纳米孔通过膜的其它层形成,使得纳米孔与电极层的隧道结对准。 当向电极层施加电压时,通过作为区分基底的标记的待测量的隧道结中的基底产生隧穿电流。 当在隧道结的内表面上形成有机涂层时,在电极层和基底之间形成瞬态结合。

    Crossed slit structure for nanopores
    53.
    发明申请
    Crossed slit structure for nanopores 审中-公开
    用于纳米孔的交叉狭缝结构

    公开(公告)号:US20140004300A1

    公开(公告)日:2014-01-02

    申请号:US13555251

    申请日:2012-07-23

    IPC分类号: B32B3/10

    摘要: For a cross slit structure that contains a nanopore, a layer is produced including a first spacer that penetrates through the layer. A subsequent layer over, and in direct contact with, the layer is also produced. The subsequent layer includes a second spacer penetrating through the subsequent layer. The first spacer and the second spacer are selectively etched away, creating a first slit and a second slit. Respective projections of these slits are crossing one another at an angle. At such a crossing an opening is formed which provides for fluid connectivity through the two layers.

    摘要翻译: 对于包含纳米孔的交叉狭缝结构,产生包括穿透层的第一间隔物的层。 还产生了与层直接接触的后续层。 随后的层包括贯穿后续层的第二间隔物。 选择性地蚀刻掉第一间隔物和第二间隔物,形成第一狭缝和第二狭缝。 这些狭缝的各个投影以一定角度相互交叉。 在这样一个交叉口处,形成一个开口,其提供通过两层的流体连通性。

    Precisely tuning feature sizes on hard masks via plasma treatment
    59.
    发明授权
    Precisely tuning feature sizes on hard masks via plasma treatment 有权
    通过等离子体处理在硬掩模上精确调整特征尺寸

    公开(公告)号:US08084319B2

    公开(公告)日:2011-12-27

    申请号:US12704665

    申请日:2010-02-12

    IPC分类号: H01L21/8238

    摘要: Methods are provided for fabricating devices. A first layer is formed. A hardmask on the first layer is formed. Features on the hardmask are patterned. The sizes of features on the hardmask are reduced by applying a plasma treatment process to form reduced size features. Also, the size of features on the hardmask can be enlarged to form enlarged size features by applying the plasma treatment process and/or removing the oxidized part of the feature during plasma treatment process. Another method may include a first layer formed on a substrate and a second layer formed on the first layer. First features are patterned on the first layer, and second features are patterned on the second layer. A size of second features on the second layer is closed due to the different oxidation rate of the two layers during the plasma treatment process, to form a self-sealed channel and/or self-buried trench.

    摘要翻译: 提供了制造器件的方法。 形成第一层。 形成第一层上的硬掩模。 硬掩模上的特征被图案化。 通过应用等离子体处理工艺来形成尺寸减小的特征,可减少硬掩模上的特征尺寸。 此外,通过在等离子体处理过程中应用等离子体处理工艺和/或去除特征的氧化部分,可以扩大硬掩模上的特征的尺寸以形成扩大的尺寸特征。 另一种方法可以包括形成在基底上的第一层和形成在第一层上的第二层。 第一特征在第一层上被图案化,并且第二特征被图案化在第二层上。 由于在等离子体处理过程中两层的氧化速率不同,所以第二层上的第二特征的尺寸是封闭的,以形成自密封通道和/或自埋式沟槽。

    POST DEPOSITION METHOD FOR REGROWTH OF CRYSTALLINE PHASE CHANGE MATERIAL
    60.
    发明申请
    POST DEPOSITION METHOD FOR REGROWTH OF CRYSTALLINE PHASE CHANGE MATERIAL 有权
    晶体相变材料的沉积后沉积方法

    公开(公告)号:US20110227021A1

    公开(公告)日:2011-09-22

    申请号:US13150705

    申请日:2011-06-01

    IPC分类号: H01L45/00

    摘要: Techniques for forming a phase change memory cell. An example apparatus includes a substrate and a bottom electrode carried by the substrate. The bottom electrode is a thermal conductor. A phase change layer, including phase change material, is disposed over the bottom electrode. A thermal insulating layer is disposed above the phase change layer. A heater is configured to temporarily melt the phase change material such that the phase change material crystallizes without voids within a switching region after melting.

    摘要翻译: 形成相变存储单元的技术。 示例性装置包括由基板承载的基板和底部电极。 底部电极是导热体。 包括相变材料的相变层设置在底部电极上。 隔热层设置在相变层的上方。 加热器被配置为暂时熔化相变材料,使得相变材料在熔化后在开关区域内没有空隙结晶。