公开(公告)号：US20160079089A1

公开(公告)日：2016-03-17

申请号：US14849852

申请日：2015-09-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Daisuke KUROSAKI ,  Yukinori SHIMA ,  Takuya HANDA

IPC: H01L21/477 ,  H01L21/02

CPC classification number: H01L21/477 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02172 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02614 ,  H01L21/02631 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78693

Abstract: In a semiconductor device including an oxide semiconductor, a change in electrical characteristics is inhibited and reliability is improved. The semiconductor device is manufactured by a method including first to fourth steps. The first step includes a step of forming an oxide semiconductor film, the second step includes a step of forming an oxide insulating film over the oxide semiconductor film, the third step includes a step of forming a protective film over the oxide insulating film, and the fourth step includes a step of adding oxygen to the oxide insulating film through the protective film. In the first step, the oxide semiconductor film is formed under a condition in which an oxygen vacancy is formed. The oxygen from the oxide insulating film fills the oxygen vacancy after the fourth step.

Abstract translation: 在包括氧化物半导体的半导体器件中，电特性的变化被抑制，可靠性提高。 半导体器件通过包括第一至第四步骤的方法制造。 第一步骤包括形成氧化物半导体膜的步骤，第二步骤包括在氧化物半导体膜上形成氧化物绝缘膜的步骤，第三步骤包括在氧化物绝缘膜上形成保护膜的步骤， 第四步骤包括通过保护膜向氧化物绝缘膜添加氧的步骤。 在第一步骤中，在形成氧空位的条件下形成氧化物半导体膜。 来自氧化物绝缘膜的氧填充第四步后的氧空位。

公开(公告)号：US20150348998A1

公开(公告)日：2015-12-03

申请号：US14721362

申请日：2015-05-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Masami JINTYOU ,  Daisuke KUROSAKI ,  Yukinori SHIMA ,  Toshimitsu OBONAI

IPC: H01L27/12 ,  H01L21/44

CPC classification number: H01L27/1225 ,  H01L27/1255 ,  H01L29/78648 ,  H01L29/7869

Abstract: Provided is a transistor which includes an oxide semiconductor film in a channel region. A change from a shift value before light irradiation to a shift value under light irradiation is greater than or equal to −1 V and less than or equal to 0.5 V, where the shift value is a gate voltage at a point of intersection of an axis of 1×10−12 A and a steepest tangent line of the logarithm of a drain current in drain current-gate voltage characteristics of the transistor, and where the light irradiation is performed on the oxide semiconductor film with light having an energy greater than or equal to a band gap of the oxide semiconductor film.

Abstract translation: 提供了在沟道区域中包括氧化物半导体膜的晶体管。 在光照射之前的偏移值到光照射下的移动值的变化大于或等于-1V且小于或等于0.5V，其中移位值是轴的交点处的栅极电压 1×10-12A的最大切线和晶体管的漏极电流 - 栅极电压特性中的漏极电流的对数的最快切线，并且其中用氧化物半导体膜对具有能量大于或等于 等于氧化物半导体膜的带隙。

公开(公告)号：US20150333088A1

公开(公告)日：2015-11-19

申请号：US14710029

申请日：2015-05-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Masami JINTYOU ,  Daisuke KUROSAKI

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/4908 ,  H01L29/78648 ,  H01L29/78696

Abstract: In a semiconductor device using a transistor including an oxide semiconductor, a change in electrical characteristics is inhibited and reliability is improved. The transistor includes a first gate electrode; a first insulating film over the first gate electrode; an oxide semiconductor film over the first insulating film; a source electrode electrically connected to the oxide semiconductor film; a drain electrode electrically connected to the oxide semiconductor film; a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode; and a second gate electrode over the second insulating film. The second insulating film includes oxygen. The second gate electrode includes the same metal element as at least one of metal elements of the oxide semiconductor film and has a region thinner than the oxide semiconductor film.

Abstract translation: 在使用包括氧化物半导体的晶体管的半导体器件中，电特性的变化被抑制，可靠性提高。 晶体管包括第一栅电极; 第一栅电极上的第一绝缘膜; 第一绝缘膜上的氧化物半导体膜; 与氧化物半导体膜电连接的源电极; 电连接到所述氧化物半导体膜的漏电极; 氧化物半导体膜上的第二绝缘膜，源电极和漏电极; 以及在所述第二绝缘膜上方的第二栅电极。 第二绝缘膜包括氧。 第二栅极包括与氧化物半导体膜的金属元素中的至少一个相同的金属元素，并且具有比氧化物半导体膜更薄的区域。

公开(公告)号：US20150228803A1

公开(公告)日：2015-08-13

申请号：US14608224

申请日：2015-01-29

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi KOEZUKA ,  Masami JINTYOU ,  Yukinori SHIMA ,  Daisuke KUROSAKI ,  Masataka NAKADA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78693 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. Furthermore, the first transistor provided in the driver circuit portion may include the oxide semiconductor film in which a first film and a second film are stacked, and the second transistor provided in the pixel portion may include the oxide semiconductor film which differs from the first film in the atomic ratio of metal elements.

Abstract translation: 该半导体器件包括设置在驱动电路部分中的第一晶体管和设置在像素部分中的第二晶体管; 第一晶体管和第二晶体管具有不同的结构。 在每个晶体管的氧化物半导体膜中，杂质元素包含在不与栅电极重叠的区域中。 含有杂质元素的氧化物半导体膜的区域用作低电阻区域。 此外，含有杂质元素的氧化物半导体膜的区域与含有氢的膜接触。 此外，设置在驱动器电路部分中的第一晶体管可以包括堆叠第一膜和第二膜的氧化物半导体膜，并且设置在像素部分中的第二晶体管可以包括与第一膜不同的氧化物半导体膜 以金属元素的原子比计。

公开(公告)号：US20150228799A1

公开(公告)日：2015-08-13

申请号：US14615031

申请日：2015-02-05

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi KOEZUKA ,  Masami JINTYOU ,  Yukinori SHIMA ,  Daisuke KUROSAKI ,  Masataka NAKADA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L27/1251 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/124 ,  H01L29/78603 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.

Abstract translation: 提供了包括其中导通电流高的氧化物半导体的半导体器件。 该半导体器件包括设置在驱动电路部分中的第一晶体管和设置在像素部分中的第二晶体管; 第一晶体管和第二晶体管具有不同的结构。 此外，第一晶体管和第二晶体管是具有顶栅结构的晶体管。 在每个晶体管的氧化物半导体膜中，杂质元素包含在不与栅电极重叠的区域中。 含有杂质元素的氧化物半导体膜的区域用作低电阻区域。 此外，含有杂质元素的氧化物半导体膜的区域与含有氢的膜接触。 设置在驱动电路部分的第一晶体管包括设置氧化物半导体膜的两个栅电极。

公开(公告)号：US20250157933A1

公开(公告)日：2025-05-15

申请号：US19022942

申请日：2025-01-15

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi KOEZUKA ,  Toshimitsu OBONAI ,  Masami JINTYOU ,  Daisuke KUROSAKI

IPC: H01L23/532 ,  H01L21/02 ,  H01L21/263 ,  H01L21/265

Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer. The first insulating layer includes a third region overlapping with the first conductive layer and a fourth region not overlapping with the first conductive layer. Furthermore, the second region and the fourth region contain phosphorus or boron.

公开(公告)号：US20240072065A1

公开(公告)日：2024-02-29

申请号：US18387146

申请日：2023-11-06

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Kenichi OKAZAKI ,  Daisuke KUROSAKI ,  Yasutaka NAKAZAWA ,  Kazunori WATANABE ,  Koji KUSUNOKI

IPC: H01L27/12 ,  G02F1/1368 ,  G06F3/041 ,  G06F3/044 ,  H01L29/786

CPC classification number: H01L27/1229 ,  G02F1/1368 ,  G06F3/04166 ,  G06F3/0446 ,  H01L29/7869 ,  H01L29/78696

Abstract: A display device includes a liquid crystal element, a transistor, a scan line, and a signal line. The liquid crystal element includes a pixel electrode, a liquid crystal layer, and a common electrode. The scan line and the signal line are each electrically connected to the transistor. The scan line and the signal line each include a metal layer. The transistor is electrically connected to the pixel electrode. A semiconductor layer of the transistor includes a stack of a first metal oxide layer and a second metal oxide layer. The first metal oxide layer includes a region with lower crystallinity than the second metal oxide layer. The transistor includes a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region are each configured to transmit visible light. Visible light passes through the first region and the liquid crystal element and exits from the display device.

公开(公告)号：US20220350213A1

公开(公告)日：2022-11-03

申请号：US17863575

申请日：2022-07-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kenichi OKAZAKI ,  Yukinori SHIMA ,  Daisuke KUROSAKI ,  Masataka NAKADA

IPC: G02F1/1362 ,  G02F1/1368

Abstract: The manufacturing yield of a display device is improved. The resistance of a display device to ESD is increased. The display device includes a substrate, a display portion, a connection terminal, a first wiring, and a second wiring. The first wiring is electrically connected to the connection terminal and includes a portion positioned between the connection terminal and the display portion. The second wiring is electrically connected to the connection terminal, is positioned between the connection terminal and an end portion of the substrate, and includes a portion in which a side surface is exposed at an end portion of the substrate. The display portion includes a transistor. The transistor includes a semiconductor layer, a gate insulating layer, and a gate electrode. The semiconductor layer and the second wiring include a metal oxide.

公开(公告)号：US20220128850A1

公开(公告)日：2022-04-28

申请号：US17562384

申请日：2021-12-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami JINTYOU ,  Daisuke KUROSAKI ,  Masakatsu OHNO ,  Junichi KOEZUKA

IPC: G02F1/1368 ,  H01L27/12 ,  H01L33/62 ,  H01L29/786

Abstract: A highly reliable semiconductor device is provided. A second insulating layer is positioned over a first insulating layer. A semiconductor layer is positioned between the first insulating layer and the second insulating layer. A third insulating layer is positioned over the second insulating layer. A fourth insulating layer is positioned over the third insulating layer. A first conductive layer includes a region overlapping with the semiconductor layer, and is positioned between the third insulating layer and the fourth insulating layer. The third insulating layer includes a region in contact with a bottom surface of the first conductive layer and a region in contact with the fourth insulating layer. The fourth insulating layer is in contact with a top surface and a side surface of the first conductive layer. A fifth insulating layer is in contact with a top surface and a side surface of the semiconductor layer. The fifth insulating layer includes a first opening and a second opening in a region overlapping with the semiconductor layer and not overlapping with the first conductive layer. A second conductive layer and a third conductive layer are electrically connected to the semiconductor layer in the first opening and the second opening, respectively. The third to fifth insulating layers include metal, and oxygen or nitrogen. A sixth insulating layer includes a region in contact with a top surface and a side surface of the fifth insulating layer and a region in contact with the first insulating layer.

公开(公告)号：US20200381460A1

公开(公告)日：2020-12-03

申请号：US16999237

申请日：2020-08-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kenichi OKAZAKI ,  Daisuke KUROSAKI ,  Yasutaka NAKAZAWA ,  Kazunori WATANABE ,  Koji KUSUNOKI

IPC: H01L27/12 ,  G02F1/1368 ,  H01L29/786

Abstract: A display device includes a liquid crystal element, a transistor, a scan line, and a signal line. The liquid crystal element includes a pixel electrode, a liquid crystal layer, and a common electrode. The scan line and the signal line are each electrically connected to the transistor. The scan line and the signal line each include a metal layer. The transistor is electrically connected to the pixel electrode. A semiconductor layer of the transistor includes a stack of a first metal oxide layer and a second metal oxide layer. The first metal oxide layer includes a region with lower crystallinity than the second metal oxide layer. The transistor includes a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region are each configured to transmit visible light. Visible light passes through the first region and the liquid crystal element and exits from the display device.