公开(公告)号：US11355528B2

公开(公告)日：2022-06-07

申请号：US16890756

申请日：2020-06-02

Applicant: Samsung Display Co., Ltd.

Inventor： Jay Bum Kim ,  Myeong Ho Kim ,  Kyoung Seok Son ,  Seung Jun Lee ,  Seung Hun Lee ,  Jun Hyung Lim

IPC: H01L27/12 ,  H01L27/32

Abstract: A display device includes: a bending region including a bending peripheral opening passing through the first interlayer insulating film and the first gate insulating film and a bending opening in the bending peripheral opening and passing through the second interlayer insulating film and the buffer layer to expose the substrate, a first sidewall of the bending peripheral opening includes a side surface of the first interlayer insulating film and a side surface of the first gate insulating film, the second interlayer insulating film covers the first sidewall of the bending peripheral opening, the bending opening includes a second sidewall including a side surface of the buffer layer and a portion of a side surface of the second interlayer insulating film arranged with the side surface of the buffer layer, and the first via layer fills the bending opening.

公开(公告)号：US11251247B2

公开(公告)日：2022-02-15

申请号：US16843764

申请日：2020-04-08

Applicant: Samsung Display Co., Ltd.

Inventor： Hyung Jun Kim ,  Myoung Hwa Kim ,  Tae Sang Kim ,  Yeon Keon Moon ,  Joon Seok Park ,  Sang Woo Sohn ,  Sang Won Shin ,  Jun Hyung Lim ,  Hye Lim Choi

IPC: H01L21/00 ,  H01L27/00 ,  H01L29/00 ,  H01L27/32 ,  H01L29/786 ,  H01L29/24 ,  H01L29/66 ,  H01L21/02 ,  H01L21/4763 ,  H01L21/465 ,  H01L21/4757 ,  H01L27/12

Abstract: A display device and a method for fabricating the same are provided. The display device comprises pixels connected to scan lines, and to data lines crossing the scan lines, each of the pixels including a light emitting element, and a first transistor configured to control a driving current supplied to the light emitting element according to a data voltage applied from the data line, the first transistor including a first active layer having an oxide semiconductor, and a first oxide layer on the first active layer and having a crystalline oxide containing tin (Sn).

公开(公告)号：US20210143189A1

公开(公告)日：2021-05-13

申请号：US17036619

申请日：2020-09-29

Applicant: Samsung Display Co., LTD.

Inventor： Jay Bum Kim ,  Myeong Ho Kim ,  Kyoung Seok Son ,  Seung Jun Lee ,  Seung Hun Lee ,  Jun Hyung Lim

IPC: H01L27/12

Abstract: A display device includes a substrate, a first active layer on the substrate, a first insulation layer on the first active layer, a first gate electrode on the first insulation layer, the first gate electrode overlapping the first active layer, a second insulation layer on the first gate electrode, a second active layer on the second insulation layer, a first capacitor electrode on the second insulation layer, the first capacitor electrode overlapping the first gate electrode, a third insulation layer on the second active layer and the first capacitor electrode, a second gate electrode on the third insulation layer, the second gate electrode overlapping the second active layer, and a second capacitor electrode on the third insulation layer, the second capacitor electrode overlapping the first gate electrode and electrically connected to the first capacitor electrode.

公开(公告)号：US10580902B2

公开(公告)日：2020-03-03

申请号：US15691207

申请日：2017-08-30

Applicant: Samsung Display Co., Ltd.

Inventor： Ji Hun Lim ,  Joon Seok Park ,  Jay Bum Kim ,  Jun Hyung Lim ,  Kyoung Seok Son

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L29/423

Abstract: A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a second doped region, a source region, a drain region, and a channel region. The channel region is positioned between the source region and the drain region. The first doped region is positioned between the channel region and the source region. The second doped region is positioned between the channel region and the drain region. A doping concentration of the first doped region is lower than a doping concentration of the source region. A doping concentration of the second doped region is lower than a doping concentration of the drain region. The source electrode is electrically connected to the source region. The drain electrode is electrically connected to the drain region. The gate electrode overlaps the channel region.

公开(公告)号：US09870735B2

公开(公告)日：2018-01-16

申请号：US14926922

申请日：2015-10-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ji Hun Lim ,  Yeon Keon Moon ,  Masataka Kano ,  Jun Hyung Lim

IPC: G09G3/36 ,  G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0842 ,  G09G2320/043

Abstract: A display device includes: a plurality of pixels, wherein each of the plurality of pixels includes at least two double-gate transistors including a first gate electrode and a second gate electrode; conduction between source electrodes and drain electrodes of the at least two double-gate transistors is controlled by a voltage applied to the first gate electrode, and electrical connection between the second gate electrode and the first gate electrode of each of the at least two double-gate transistors is determined depending on a polarity of a voltage applied on average to each of the at least two double-gate transistors.

公开(公告)号：US09601518B2

公开(公告)日：2017-03-21

申请号：US14856405

申请日：2015-09-16

Applicant: Samsung Display Co., Ltd.

Inventor： Yeon Keon Moon ,  Masataka Kano ,  So Young Koo ,  Myoung Hwa Kim ,  Jun Hyung Lim

IPC: H01L29/12 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L27/1225 ,  H01L27/0705 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/127 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78648 ,  H01L29/7869

Abstract: A thin film transistor display panel including: a first insulating substrate; a first semiconductor disposed between the first insulating substrate and a first gate insulating layer; a gate electrode disposed on the first gate insulating layer, the gate electrode overlapping the first semiconductor; a second gate insulating layer disposed on the gate electrode; a second semiconductor disposed on the second gate insulating layer, the second semiconductor overlapping the gate electrode; an interlayer insulating layer disposed on the second semiconductor; and a source electrode and a drain electrode disposed on the interlayer insulating layer spaced apart from each other, the source electrode and the drain electrode connected to the first semiconductor and the second semiconductor.

公开(公告)号：US09478667B2

公开(公告)日：2016-10-25

申请号：US14661470

申请日：2015-03-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yeon Keon Moon ,  Masataka Kano ,  Sung-Hoon Yang ,  Ji Hun Lim ,  So Young Koo ,  Myoung Hwa Kim ,  Jun Hyung Lim

IPC: G02F1/136 ,  G02F1/1333 ,  H01L29/786 ,  H01L29/66 ,  G02F1/1368

CPC classification number: H01L29/78645 ,  G02F1/1368 ,  G02F2001/13685 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78648

Abstract: A thin film transistor substrate includes a substrate, a bottom gate on the substrate, a first insulating layer on the substrate and on the bottom gate, a drain on the first insulating layer, a source on the first insulating layer, the source including a first source at a first side of the drain and a second source at a second side of the drain, an active layer on the first insulating layer, the active layer including a first active layer contacting the drain and the first source and a second active layer contacting the drain and the second source, a second insulating layer on the drain, the source, and the active layer, and a top gate on the second insulating layer.

Abstract translation: 薄膜晶体管衬底包括衬底，衬底上的底栅，衬底上的第一绝缘层和底栅，第一绝缘层上的漏极，第一绝缘层上的源，源包括第一绝缘层 漏极的第一侧的源极和在漏极的第二侧的第二源极，在第一绝缘层上的有源层，有源层包括接触漏极和第一源极的第一有源层和与第一源极接触的第二有源层 漏极和第二源极，漏极，源极和有源层上的第二绝缘层，以及第二绝缘层上的顶栅极。

公开(公告)号：US09159839B2

公开(公告)日：2015-10-13

申请号：US14180171

申请日：2014-02-13

Applicant: Samsung Display Co., Ltd.

Inventor： Gun Hee Kim ,  Jin Hyun Park ,  Kyoung Won Lee ,  Byung Du Ahn ,  Jee-Hun Lim ,  Jun Hyung Lim

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1288

Abstract: A thin film transistor array panel includes: a gate electrode disposed on a substrate, an insulating layer disposed on the gate electrode, an oxide semiconductor disposed on the gate insulating layer, source electrode overlapping a portion of the oxide semiconductor, a drain electrode overlapping another portion of the oxide semiconductor; and a buffer layer disposed between the oxide semiconductor and the source electrode and between the oxide semiconductor and the drain electrode. The buffer layer comprises tin as a doping material. A weight percent of the doping material is greater than approximately 0% and less than or equal to approximately 20%.

Abstract translation: 薄膜晶体管阵列面板包括：设置在基板上的栅极电极，设置在栅电极上的绝缘层，设置在栅极绝缘层上的氧化物半导体，与氧化物半导体的一部分重叠的源电极，与另一个重叠的漏电极 部分氧化物半导体; 以及设置在氧化物半导体和源电极之间以及氧化物半导体和漏电极之间的缓冲层。 缓冲层包含锡作为掺杂材料。 掺杂材料的重量百分比大于约0％且小于或等于约20％。

公开(公告)号：US08957415B2

公开(公告)日：2015-02-17

申请号：US13664180

申请日：2012-10-30

Applicant: Samsung Display Co., Ltd.

Inventor： Byung Du Ahn ,  Jun Hyung Lim ,  Jin Seong Park

IPC: H01L29/12

CPC classification number: H01L29/78693

Abstract: A thin film transistor includes: a gate electrode on a substrate; a source electrode; a drain electrode positioned in a same layer as the source electrode and facing the source electrode; an oxide semiconductor layer positioned between the gate electrode and the source electrode or drain electrode; and a gate insulating layer positioned between the gate electrode and the source electrode or drain electrode. The oxide semiconductor layer includes titanium oxide (TiOx) doped with niobium (Nb).

Abstract translation: 薄膜晶体管包括：衬底上的栅电极; 源电极; 位于与源电极相同的层并且面对源电极的漏电极; 位于所述栅电极和所述源电极或漏电极之间的氧化物半导体层; 以及位于栅电极和源电极或漏电极之间的栅极绝缘层。 氧化物半导体层包括掺杂有铌（Nb）的氧化钛（TiOx）。

公开(公告)号：US12225771B2

公开(公告)日：2025-02-11

申请号：US17318350

申请日：2021-05-12

Applicant: Samsung Display Co., Ltd.

Inventor： Hyungjun Kim ,  Soyoung Koo ,  Eok Su Kim ,  Yunyong Nam ,  Jun Hyung Lim ,  Kyungjin Jeon

IPC: H10K59/121 ,  H10K59/126 ,  H10K71/00 ,  H10K59/12 ,  H10K59/123

Abstract: A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.