Semiconductor integrated circuit with voltage-detecting circuit and signal transmitting and receiving system
    51.
    发明授权
    Semiconductor integrated circuit with voltage-detecting circuit and signal transmitting and receiving system 失效
    具有电压检测电路和信号发射和接收系统的半导体集成电路

    公开(公告)号:US06944003B2

    公开(公告)日:2005-09-13

    申请号:US10365527

    申请日:2003-02-13

    CPC分类号: H02H9/046

    摘要: A first semiconductor integrated circuit is connected to a second semiconductor integrated circuit with a cable. In the first semiconductor integrated circuit, when a power supply voltage becomes less than a set voltage detection level, a voltage-detecting circuit outputs a voltage-detected signal to lower the voltage of the cable and to stop the operation. The second semiconductor integrated circuit detects the decrease in the voltage of the cable to recognize the halt of the operation of the first semiconductor integrated circuit. In the first semiconductor integrated circuit thus configured, in testing the operation under low-voltage conditions in which the power supply voltage is less than the set voltage detection level, the voltage-detecting circuit receives a control signal from an external terminal to stop the operation forcibly. Consequently, even when the power supply voltage is made lower than the set voltage-detecting level, the first semiconductor integrated circuit properly operates until the power supply voltage reaches a predetermined lower limit of operating voltage. Thus, evaluation of operation is possible under low-voltage conditions.

    摘要翻译: 第一半导体集成电路通过电缆连接到第二半导体集成电路。 在第一半导体集成电路中,当电源电压变得小于设定电压检测电平时,电压检测电路输出电压检测信号来降低电缆的电压并停止工作。 第二半导体集成电路检测电缆的电压的降低以识别第一半导体集成电路的操作停止。 在这样配置的第一半导体集成电路中,在电源电压小于设定电压检测电平的低电压条件下进行测试时,电压检测电路从外部端子接收控制信号,停止动作 强制。 因此,即使电源电压低于设定电压检测电平,第一半导体集成电路也可以正常工作,直到电源电压达到预定的工作电压下限。 因此,在低电压条件下可以进行运行评估。

    Nucleic acid analysis apparatus
    52.
    发明申请
    Nucleic acid analysis apparatus 审中-公开
    核酸分析仪

    公开(公告)号:US20050196778A1

    公开(公告)日:2005-09-08

    申请号:US11013403

    申请日:2004-12-17

    摘要: An apparatus measures individual measurement sites on a DNA chip in a short period of time. The DNA chip is irradiated by light-emitting diodes (LEDs) so as to excite fluorescent dye at each measurement site, and fluorescence emitted from the individual measurement sites is detected all at once. Since substantially uniform measurement conditions can be obtained for each measurement site, measurement accuracy increases. The read mechanism requires less space and is less costly, thereby decreasing the failure rate and virtually eliminating the need for maintenance of the apparatus.

    摘要翻译: 一种装置在短时间内测量DNA芯片上的各个测量位置。 DNA芯片被发光二极管(LED)照射,以便在每个测量部位激发荧光染料,并且一次检测到从各测量点发射的荧光。 由于每个测量点可以获得大致均匀的测量条件,所以测量精度提高。 读取机构需要更少的空间并且成本更低,从而降低故障率并且几乎消除了维护设备的需要。

    Broadcast receiver
    55.
    发明申请
    Broadcast receiver 失效
    广播接收机

    公开(公告)号:US20050088577A1

    公开(公告)日:2005-04-28

    申请号:US10944900

    申请日:2004-09-21

    申请人: Satoshi Takahashi

    发明人: Satoshi Takahashi

    CPC分类号: H04N5/64

    摘要: A broadcast receiver comprising: a tuner having an input plug which receives the radio-frequency signal, has its base portion connected to a circuit board and its tip portion protruded outward through one of the two end surfaces of a shield case which are opposed to each other in the direction of length, the tip portion being bent through a predetermined angle with respect to the base portion and the base portion being supported by the shield case so that it can rotate on its axis, the tuner being mounted so that one of the four side surfaces of the shield case except the two end surfaces which are opposed to each other in the direction of length is parallel to a display panel of a display unit.

    摘要翻译: 一种广播接收机,包括:具有接收所述射频信号的输入插头的调谐器,其基部连接到电路板,并且其顶端部分通过与每个所述屏蔽壳体相对的屏蔽壳体的两个端面之一向外突出 另一个在长度方向上,尖端部分相对于基部弯曲预定角度,并且基部部分由屏蔽壳体支撑,使得其可以在其轴线上旋转,调谐器被安装成使得调谐器中的一个 除了在长度方向上彼此相对的两个端面之外,屏蔽壳体的四个侧表面平行于显示单元的显示面板。

    Capillary electrophoretic instrument and capillary array assembly
    57.
    发明授权
    Capillary electrophoretic instrument and capillary array assembly 有权
    毛细管电泳仪和毛细管阵列组件

    公开(公告)号:US06572752B1

    公开(公告)日:2003-06-03

    申请号:US09671818

    申请日:2000-09-27

    IPC分类号: G01N27453

    摘要: The troublesomeness during the setting of a plurality of capillaries is eliminated by composing pairs of electrodes, which are electrically connected to the common electrode, and capillaries. By bringing electrodes installed in the vicinity of each capillary disposed at the pitch of wells on the side of sample plate (within the area of the wells) into electrical contact with a common electrode, the capillaries and electrodes are made integral in construction. When a voltage is applied to the electrophoretic instrument via a common electrode portion, the voltage is applied to the electrodes for each capillary. This enables an inexpensive microtiter plate, etc. to be used and a multiple of capillaries to be simultaneously inserted, attached and detached.

    摘要翻译: 通过构成电连接到公共电极的电极对和毛细管来消除在多个毛细管的设置期间的麻烦。通过将设置在每个毛细管附近的电极安装在位于 样品板(在孔的区域内)与公共电极电接触,毛细管和电极在结构上是一体的。 当通过公共电极部分向电泳仪施加电压时,对每个毛细管的电极施加电压。 这使得可以使用廉价的微量滴定板等,同时插入,附着和分离多个毛细管。

    Method of forming on a semiconductor substrate a capacitor electrode having hemispherical grains
    58.
    发明授权
    Method of forming on a semiconductor substrate a capacitor electrode having hemispherical grains 有权
    在半导体衬底上形成具有半球形晶粒的电容器电极的方法

    公开(公告)号:US06362044B1

    公开(公告)日:2002-03-26

    申请号:US09665134

    申请日:2000-09-19

    IPC分类号: H01L218242

    CPC分类号: H01L28/84

    摘要: An improved capacitor electrode made of polysilicon having a rough surface on a semiconductor substrate is formed by (a) removing a spontaneous oxidation film adhering to an amorphous silicon surface; (b) heating the amorphous silicon to a designated temperature; (c) spraying SiH4 at a designated temperature on the amorphous silicon to form an amorphous silicon/polysilicon mixed-phase active layer on the surface; (d) annealing at a designated temperature to form an HSG so as to roughen the amorphous silicon surface; (e) PH3-annealing the HSG-forming polysilicon, wherein PH3 is introduced at a designated concentration at the start of heating to a designated temperature; and (f) nitriding the amorphous silicon surface at the stated temperature by continuously introducing NH3 gas instead of PH3.

    摘要翻译: 通过(a)去除附着在非晶硅表面上的自发氧化膜,形成由半导体衬底上具有粗糙表面的多晶硅制成的改进的电容器电极; (b)将非晶硅加热至指定温度; (c)在指定温度下在非晶硅上喷涂SiH4,以在表面上形成非晶硅/多晶硅混合相活性层; (d)在指定温度退火以形成HSG,以粗化非晶硅表面; (e)对形成HSG的多晶硅进行PH3退火,其中在加热开始时以指定浓度引入PH3至指定温度; 和(f)通过连续引入NH 3气体代替PH 3,在所述温度下氮化非晶硅表面。

    Semiconductor integrated circuit and semiconductor integrated circuit system having serially interconnectable data buses
    59.
    发明授权
    Semiconductor integrated circuit and semiconductor integrated circuit system having serially interconnectable data buses 有权
    具有串行可互连数据总线的半导体集成电路和半导体集成电路系统

    公开(公告)号:US06297675B1

    公开(公告)日:2001-10-02

    申请号:US09478530

    申请日:2000-01-06

    IPC分类号: H03B100

    CPC分类号: H03K19/018514 Y10T307/549

    摘要: A data line pair and a strobe line pair are provided between first and second chips to exchange data therebetween. The first chip includes an output circuit and a controller for controlling the output circuit. The second chip includes an input circuit. For example, the output circuit supplies a direct current from a power supply to one of the data lines. Then, the input circuit feeds back the received current to the output circuit through a pair of terminal resistors and the other data line. Subsequently, the output circuit supplies the fed back direct current to one of the strobe lines. In response, the input circuit feeds back the received current again to the output circuit through another pair of terminal resistors and the other strobe line. And then the fed back current is drained to the ground. Thus, compared to driving the data and strobe line pairs separately with the same amount of current supplied, the current dissipation can be halved. In this manner, the present invention is applicable to reduction of current dissipation when data should be transmitted at high speeds through multiple data bus pairs that are driven with a current supplied.

    摘要翻译: 在第一和第二芯片之间提供数据线对和选通线对,以在它们之间交换数据。 第一芯片包括输出电路和用于控制输出电路的控制器。 第二芯片包括输入电路。 例如,输出电路将电流从电源提供给数据线之一。 然后,输入电路通过一对端子电阻和另一条数据线将接收的电流反馈到输出电路。 随后,输出电路将反馈的直流电流提供给选通线之一。 作为响应,输入电路通过另一对端子电阻器和另一个选通线路将接收到的电流再次反馈到输出电路。 然后将反馈电流排到地面。 因此,与以相同的电流量驱动数据和选通线对相比,电流消耗可以减半。 以这种方式,本发明可应用于当通过以所提供的电流驱动的多个数据总线对以高速传输数据时,减少电流消耗。

    ATM switching apparatus and ATM communications network
    60.
    发明授权
    ATM switching apparatus and ATM communications network 失效
    ATM交换设备和ATM通信网络

    公开(公告)号:US06282197B1

    公开(公告)日:2001-08-28

    申请号:US09013697

    申请日:1998-01-26

    IPC分类号: H04L1228

    摘要: Disclosed is an ATM switching apparatus capable of reducing a probability an IAM acceptance being rejected due to a difference in bandwidth acquiring algorithm. The ATM switching apparatus is constructed such that when receiving an IAR due to the difference in bandwidth calculation algorithm for the IAM indicating a use of a certain VPC, a calculated bandwidth value is set in an estimated free bandwidth value about the VPC within a bandwidth management table, a value given by Calculation Bandwidth Value/Free bandwidth Value is set in a ratio, and the VPC is selected by using not the free bandwidth value but the estimated free bandwidth value (=Free Bandwidth Value×Ratio) when transmitting the IAM. It is another contrivance that when the free bandwidth value changes, the estimated free bandwidth value is also changed to establish “Estimated Free Bandwidth Value=Free Bandwidth Value×Ratio” without changing the ratio.

    摘要翻译: 公开了一种ATM交换装置,其能够降低由于带宽获取算法的差异而拒绝的IAM接受的概率。 ATM交换装置被构造成使得当由于IAM的带宽计算算法的差异而指示使用某个VPC时接收到IAR时,计算的带宽值被设置在关于带宽管理内的VPC的估计的有效带宽值 表中,由计算带宽值/自由带宽值给出的值按比例设定,并且在发送IAM时,不使用空闲带宽值,而是使用估计的可用带宽值(=自由带宽值xRatio)来选择VPC。 另一个设计是,当自由带宽值发生变化时,估计的有效带宽值也会改变,以建立“估计的自由带宽值=自由带宽值xRatio”而不改变比率。