公开(公告)号：US08533566B2

公开(公告)日：2013-09-10

申请号：US13020318

申请日：2011-02-03

申请人： Ulrich Backhausen ,  Michael Goessel ,  Thomas Kern ,  Thomas Rabenalt

发明人： Ulrich Backhausen ,  Michael Goessel ,  Thomas Kern ,  Thomas Rabenalt

IPC分类号： G11C29/00

CPC分类号： H03M13/152 ,  G06F11/1068 ,  H03M13/098 ,  H03M13/155 ,  H03M13/2906 ,  H03M13/47 ,  H03M13/618

摘要： When coding user data, it may be desirable to mark user data as invalid. This may arise, by way of example, in applications in which a stored data item needs to be updated by virtue of an updated data item additionally being stored and the old stored data item being marked as invalid. In order to mark the invalidity of a stored data item by means of the value of the data item and to be able to apply an error-recognizing or error-correcting coding dependably, the user data are extended by supplementary data and the coding is applied to the extended user data.

摘要翻译： 当对用户数据进行编码时，可能希望将用户数据标记为无效。 这可以通过示例的方式出现在应用中，其中存储的数据项需要通过另外存储的更新的数据项被更新，并且旧的存储的数据项被标记为无效。 为了通过数据项的值来标记存储的数据项的无效性，并且能够可靠地应用错误识别或纠错编码，用户数据通过补充数据进行扩展并且应用编码 扩展用户数据。

公开(公告)号：US20130212452A1

公开(公告)日：2013-08-15

申请号：US13430147

申请日：2012-03-26

申请人： Thomas Kern ,  Ulrich Backhausen ,  Michael Goessel ,  Thomas Rabenalt

发明人： Thomas Kern ,  Ulrich Backhausen ,  Michael Goessel ,  Thomas Rabenalt

IPC分类号： G06F11/07

CPC分类号： H03M13/3746 ,  G05B9/03 ,  G05B19/0428 ,  G06F11/00 ,  G06F11/1048 ,  G06F11/1479 ,  G06F11/1641 ,  H03M13/033 ,  H03M13/155 ,  H03M13/19 ,  H03M13/258 ,  H03M13/2948 ,  H03M13/2957 ,  H03M13/2966 ,  H03M13/299 ,  H03M13/37 ,  H03M13/3738 ,  H03M13/3784 ,  H03M13/6575

摘要： An apparatus for comparing pairs of binary words includes an intermediate value determiner and an error detector. The intermediate value determiner determines an intermediate binary word so that the intermediate binary word is equal to a reference binary word for a first pair of equal or inverted binary words, so that the intermediate binary word is equal to the inverted reference binary word for a second pair of equal or inverted binary words and so that the intermediate binary word is unequal to the reference binary word and the inverted reference binary word for a pair of unequal and uninverted binary words, if the intermediate value determiner works faultlessly. Further, the error detector provides an error signal based on the intermediate binary word so that the error signal indicates whether or not the binary words of a pair of binary words are equal or inverted.

摘要翻译： 用于比较二进制字对的装置包括中间值确定器和误差检测器。 中间值确定器确定中间二进制字，使得中间二进制字等于第一对相等或反转二进制字的参考二进制字，使得中间二进制字等于第二对的反转参考二进制字 如果中间值确定器无故障地工作，则使中间二进制字不对等于参考二进制字和反向参考二进制字，用于一对不等的和未反相的二进制字。 此外，误差检测器基于中间二进制字提供误差信号，使得误差信号指示一对二进制字的二进制字是否相等或反转。

公开(公告)号：US20080245327A1

公开(公告)日：2008-10-09

申请号：US12079058

申请日：2008-03-24

申请人： Wolfgang Christgen ,  Thomas Kern

发明人： Wolfgang Christgen ,  Thomas Kern

IPC分类号： F01L1/34

CPC分类号： F01L1/185 ,  F01L1/2405 ,  Y10T74/2107

摘要： The invention proposes a valve train (1) of an internal combustion engine (2), said valve train (1) comprising a support element (10) and a finger lever (5) or a rocker arm for operating a gas exchange valve, said finger lever (5) or rocket arm comprising a joint socket (8) comprising a semispherical portion (12) for mounting the finger lever (5) or rocker arm on a joint head (9) of the support element and further comprising, adjacent to the semispherical portion, a depression (13) from which a spray bore (20) starts to extend through the joint socket. This spray bore (20) is in hydraulic communication with a supply bore (19) that extends through the joint head. The invention provides a valve body (15a, 15b) that is arranged for displacement in the depression and comprises a projection (18), so that, in the closed position of the gas exchange valve, the spray bore and the supply bore are substantially or entirely separated hydraulically from each other by a snapping of the projection into the supply bore.

摘要翻译： 本发明提出了一种内燃机（2）的气门机构（1），所述气门机构（1）包括支撑元件（10）和用于操作气体交换阀的指杆（5）或摇臂 手指杆（5）或火箭臂包括一个关节插座（8），该接头插座（8）包括用于将指状杆（5）或摇臂安装在支撑元件的关节头部（9）上的半球形部分（12） 半球形部分，凹部（13），喷孔（20）从该凹部开始延伸穿过接头插座。 该喷孔（20）与延伸穿过接头的供应孔（19）液压连通。 本发明提供了一种阀体（15a，15b），其设置成在凹陷中移位并且包括突起（18），使得在气体交换阀的关闭位置，喷射孔和供应孔是 基本上或完全地通过将突起卡入供应孔中而彼此液压地分离。

公开(公告)号：US07295477B2

公开(公告)日：2007-11-13

申请号：US11229003

申请日：2005-09-16

申请人： Luca de Ambroggi ,  Thomas Kern

发明人： Luca de Ambroggi ,  Thomas Kern

IPC分类号： G11C7/10

CPC分类号： G11C16/0475 ,  G11C16/0491 ,  G11C16/12 ,  G11C16/24

摘要： A semiconductor memory device comprises a wordline (40), a first bitline (21a), two second bitlines (22a, 22b), a first memory cell (100a) and a second memory cell (100b). The first memory cell (100a) is coupled to the wordline (40), one of the second bitlines (22a) and the first bitline (21a). The second memory cell (100b) is coupled to the wordline (40), the other second bitline (22b) and the first bitline (21a). Each memory cell (100a, 100b) stores a first bit (101) and a second bit (102). The semiconductor device further comprises a programming unit (2) coupled to the wordline (40) and the first and the second bitlines (21a, 22a, 22b). The programming unit (2) enables to apply a first programming potential (V1) to the wordline (40) and to apply a third programming potential (V3) to the second bitlines (22a, 22b) while applying a second programming potential (V2) to the first bitline (21a) in order to program the first bit (101) of the second memory cell (100b) and the second bit (102) of the first memory cell (100a).

摘要翻译： 半导体存储器件包括字线（40），第一位线（21a），两个第二位线（22a，22b），第一存储器单元（100A）和第二存储器单元（100b）。 第一存储单元（100a）耦合到字线（40），第二位线（22A）和第一位线（21a）之一。 第二存储单元（100b）耦合到字线（40），另一第二位线（22b）和第一位线（21a）。 每个存储单元（100a，100b）存储第一位（101）和第二位（102）。 半导体器件还包括耦合到字线（40）和第一和第二位线（21a，22a，22b）的编程单元（2）。 编程单元（2）使得能够将第一编程电位（V1）施加到字线（40）并且将第三编程电位（V 3）施加到第二位线（22a，22b），同时施加第二编程 为了对第一存储单元（100b）的第一位（101）和第一存储单元（100a）的第二位（102）进行编程，电位（V 2）到第一位线（21a）。

公开(公告)号：US06711080B2

公开(公告)日：2004-03-23

申请号：US10100583

申请日：2002-03-18

申请人： Thomas Kern ,  Esther Vega Ordonez ,  Matthias von Daak

发明人： Thomas Kern ,  Esther Vega Ordonez ,  Matthias von Daak

IPC分类号： G11C702

CPC分类号： G11C16/28

摘要： The invention relates to an evaluation circuit for reading out the information stored in a memory cell, the current (read-out current) carried on a bit line (3) being assessed, the evaluation circuit (10) comprising a bit line decoder (2) and a precharge and converter circuit (4). In order to reduce the read-out duration particularly in the case of large scale integrated memory cells (1), a current source (6) is provided, which increases the read-out current (Imeas) by an offset current (Ioff).

摘要翻译： 本发明涉及一种用于读出存储在存储单元中的信息的评估电路，被评估的位线（3）上承载的当前（读出电流），评估电路（10）包括位线解码器（2） ）和预充电和转换器电路（4）。 为了减小读出时间，特别是在大规模集成存储单元（1）的情况下，提供电流源（6），其通过偏移电流（Ioff）增加读出电流（Imeas）。

公开(公告)号：US06525963B2

公开(公告)日：2003-02-25

申请号：US09974618

申请日：2001-10-09

申请人： Thomas Kern ,  Jürgen Peter

发明人： Thomas Kern ,  Jürgen Peter

IPC分类号： G11C1606

CPC分类号： G11C29/74 ,  G11C29/846

摘要： A programmable read-only memory and a method for operating the read-only memory are described. The memory contains at least one memory cell field with a plurality of memory cells, in addition to a plurality of memory segments formed of memory cells in which data and/or program parts can be stored. The memory further contains at least one redundant memory segment formed of memory cells and is assigned to one of the memory segments. The memory segment and the redundant memory segments assigned to the memory segment together form a memory block, in which all the memory segments have the same data content. At least one selection circuit for controlling the transfer of data and/or program parts to or from the memory segments of a memory block is assigned to each memory block.

公开(公告)号：US5946249A

公开(公告)日：1999-08-31

申请号：US145212

申请日：1998-08-31

申请人： Georg Georgakos ,  Thomas Kern ,  Diether Sommer ,  Thomas Zettler

发明人： Georg Georgakos ,  Thomas Kern ,  Diether Sommer ,  Thomas Zettler

IPC分类号： G11C16/10 ,  G11C29/28 ,  G11C13/00

CPC分类号： G11C29/28 ,  G11C16/10

摘要： A circuit configuration for a programmable nonvolatile memory having memory cells organized in rows and columns, includes a programming circuit which contains a first device for testing purposes that applies a programming current to a first predetermined number of memory cells in parallel for a first predetermined time period. During a second predetermined time period, the device thereupon connects a second predetermined number, which is greater than the first number, in parallel an applies the programming current to them. A method is provided for operating the circuit configuration.

摘要翻译： 一种用于具有以行和列组织的存储器单元的可编程非易失性存储器的电路配置，包括编程电路，其包含用于测试目的的第一设备，用于将编程电流并行地施加到第一预定数量的存储器单元达第一预定时间段 。 在第二预定时间段期间，该装置在其上并联连接大于第一数目的第二预定数量并行编程电流。 提供了一种用于操作电路配置的方法。

公开(公告)号：US09203437B2

公开(公告)日：2015-12-01

申请号：US13720780

申请日：2012-12-19

申请人： Thomas Kern ,  Ulrich Backhausen ,  Thomas Rabenalt ,  Christian Badack ,  Michael Goessel

发明人： Thomas Kern ,  Ulrich Backhausen ,  Thomas Rabenalt ,  Christian Badack ,  Michael Goessel

IPC分类号： H03M13/15 ,  H03M13/00 ,  H03M13/53

CPC分类号： H03M13/152 ,  H03M13/1575 ,  H03M13/616

摘要： A circuitry is proposed for the correction of errors in a possibly erroneous binary word v′=v′1, . . . , v′n relative to a codeword v=v1, . . . , vn, in particular 3-bit errors containing an adjacent 2-bit error (burst error). The circuitry comprises a syndrome generator and a decoder. A modified BCH is used wherein n′ column vectors of a first BCH code submatrix are paired as column vector pairs so that a componentwise XOR combination of the two column vectors of each column vector pair produces an identical column vector K that is different from all column vectors of the first BCH submatrix. A second BCH submatrix comprises corresponding column vectors as the third power, according to Galois field arithmetic, of the column vector in the first BCH submatrix. The syndrome generated by the syndrome generator can be checked against the columns of the first and second submatrices.

摘要翻译： 提出了用于校正可能错误的二进制字v'= v'1中的错误的电路。 。 。 ，v'n相对于码字v = v1，。 。 。 ，vn，特别是包含相邻2位错误（突发错误）的3位错误。 电路包括校正子发生器和解码器。 使用修改的BCH，其中第一BCH码子矩阵的n个列向量作为列向量对配对，使得每个列向量对的两个列向量的分量XOR组合产生与所有列不同的相同列向量K 第一个BCH子矩阵的向量。 第二BCH子矩阵包括根据第一BCH子矩阵中的列向量的伽罗瓦域算术的作为第三功率的相应的列向量。 可以针对第一和第二子矩阵的列检查由发生器产生的综合征。

公开(公告)号：US08947784B2

公开(公告)日：2015-02-03

申请号：US13823034

申请日：2010-10-26

申请人： Thomas Kern

发明人： Thomas Kern

IPC分类号： G02B3/14 ,  B29D11/00 ,  G02B26/00

CPC分类号： G02B3/14 ,  B29D11/00403 ,  G02B26/004

摘要： A variable focus lens has a housing (1) and an actuator (8) which are mutually displaceable along an optical axis (A) of the lens. A primary membrane (15) is arranged between a first chamber (24, 26) and a second chamber (30, 32), with the first and second chambers being filled with liquids of similar density but different indices of refraction. First and second auxiliary membranes (19, 17) are provided for volume compensation. The first auxiliary membrane (19) forms a wall section of the first chamber (24, 26), and the second auxiliary membrane (17) forms a wall section of the second chamber (30, 32), at least one or both of the auxiliary membranes facing environmental air at its outer side.

摘要翻译： 可变焦距透镜具有可沿着透镜的光轴（A）相互移位的壳体（1）和致动器（8）。 初级膜（15）布置在第一室（24,26）和第二室（30,32）之间，其中第一和第二室充满类似密度但不同折射率的液体。 第一和第二辅助膜（19,17）用于体积补偿。 第一辅助膜（19）形成第一腔室（24,26）的壁部分，第二辅助膜（17）形成第二腔室（30,32）的壁部分，至少一个或两个 辅助膜在其外侧面向环境空气。

公开(公告)号：US08913435B2

公开(公告)日：2014-12-16

申请号：US13233292

申请日：2011-09-15

申请人： Ulrich Backhausen ,  Thomas Kern ,  Joerg Syassen

发明人： Ulrich Backhausen ,  Thomas Kern ,  Joerg Syassen

IPC分类号： G11C16/30 ,  G11C16/10

CPC分类号： G11C16/10

摘要： A device includes a non-volatile memory and a control unit, wherein the control unit is configured to change over programming of data of the non-volatile memory from a first programming mode to a second, different programming mode based on the occurrence of a control signal.

摘要翻译： 一种设备包括非易失性存储器和控制单元，其中控制单元被配置为基于控制的发生将非易失性存储器的数据从第一编程模式切换到第二不同的编程模式 信号。