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公开(公告)号:US20210341844A1
公开(公告)日:2021-11-04
申请号:US17378507
申请日:2021-07-16
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Ming-Hui WENG , Chen-Yu LIU , Cheng-Han WU , Ching-Yu CHANG , Chin-Hsiang LIN
Abstract: A method includes illuminating radiation to a resist layer over a substrate to pattern the resist layer. The patterned resist layer is developed by using a positive tone developer. The patterned resist layer is rinsed using a basic aqueous rinse solution. A pH value of the basic aqueous rinse solution is lower than a pH value of the developer, and a rinse temperature of rinsing the patterned resist layer is in a range of about 20° C. to about 40° C.
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公开(公告)号:US20210063888A1
公开(公告)日:2021-03-04
申请号:US16885077
申请日:2020-05-27
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chun-Chih HO , Ching-Yu CHANG , Chin-Hsiang LIN
IPC: G03F7/36 , H01L21/027
Abstract: A method of forming a patterned photoresist layer includes the following operations: (i) forming a patterned photoresist on a substrate; (ii) forming a molding layer covering the patterned photoresist; (iii) reflowing the patterned photoresist in the molding layer; and (iv) removing the molding layer from the reflowed patterned photoresist. In some embodiments, the molding layer has a glass transition temperature that is greater than or equal to the glass transition temperature of the patterned photoresist. In yet some embodiments, the molding layer has a glass transition temperature that is 3° C.-30° C. less than the glass transition temperature of the patterned photoresist.
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公开(公告)号:US20200335340A1
公开(公告)日:2020-10-22
申请号:US16921032
申请日:2020-07-06
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Shih-Chun HUANG , Chiu-Hsiang CHEN , Ya-Wen YEH , Yu-Tien SHEN , Po-Chin CHANG , Chien Wen LAI , Wei-Liang LIN , Ya Hui CHANG , Yung-Sung YEN , Li-Te LIN , Pinyen LIN , Ru-Gun LIU , Chin-Hsiang LIN
IPC: H01L21/033 , H01L21/027 , H01L21/311 , H01L21/02 , H01L21/265
Abstract: A method of manufacturing a semiconductor device including operations of forming a first hard mask over an underlying layer on a substrate by a photolithographic and etching method, forming a sidewall spacer pattern having a first sidewall portion and a second sidewall portion on opposing sides of the first hard mask, etching the first sidewall portion, etching the first hard mask and leaving the second sidewall portion bridging a gap of the etched first hard mask, and processing the underlying layer using the second hard mask.
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公开(公告)号:US20200146154A1
公开(公告)日:2020-05-07
申请号:US16723818
申请日:2019-12-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Siao-Shan WANG , Cheng-Han WU , Ching-Yu CHANG , Chin-Hsiang LIN
Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate. The patterned resist layer has a first pattern width, and the patterned resist layer has a first pattern profile having a first proportion of active sites. In some examples, the patterned resist layer is coated with a treatment material. In some embodiments, the treatment material bonds to surfaces of the patterned resist layer to provide a treated patterned resist layer having a second pattern profile with a second proportion of active sites greater than the first proportion of active sites. By way of example, and as part of the coating the patterned resist layer with the treatment material, a first pattern shrinkage process may be performed, where the treated patterned resist layer has a second pattern width less than a first pattern width.
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公开(公告)号:US20200135452A1
公开(公告)日:2020-04-30
申请号:US16731664
申请日:2019-12-31
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Tsung-Han KO , Joy CHENG , Ching-Yu CHANG , Chin-Hsiang LIN
IPC: H01L21/027 , H01L21/033 , H01L21/308 , H01L21/266 , G03F7/038 , G03F7/20 , G03F7/40 , G03F7/09 , G03F7/039 , G03F7/38 , G03F7/26
Abstract: A method for performing a photolithography process is provided. The method includes forming a layer over a substrate, and exposing a portion of the layer to form an exposed region. The method also includes performing a baking process on the layer, so that voids are formed in the exposed region of the layer. The method further includes filling the void with a post treatment coating material, and the post treatment coating material is over the exposed region of the layer.
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公开(公告)号:US20200098558A1
公开(公告)日:2020-03-26
申请号:US16137742
申请日:2018-09-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Yu LIU , Tzu-Yang LIN , Ya-Ching CHANG , Ching-Yu CHANG , Chin-Hsiang LIN
Abstract: A method is provided including forming a first layer over a substrate and forming an adhesion layer over the first layer. The adhesion layer has a composition including an epoxy group. A photoresist layer is formed directly on the adhesion layer. A portion of the photoresist layer is exposed to a radiation source. The composition of the adhesion layer and the exposed portion of the photoresist layer cross-link using the epoxy group. Thee photoresist layer is then developed (e.g., by a negative tone developer) to form a photoresist pattern feature, which may overlie the formed cross-linked region.
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公开(公告)号:US20200041915A1
公开(公告)日:2020-02-06
申请号:US16525510
申请日:2019-07-29
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Shinn-Sheng YU , Ru-Gun LIU , Hsu-Ting HUANG , Kenji YAMAZOE , Minfeng CHEN , Shuo-Yen CHOU , Chin-Hsiang LIN
IPC: G03F7/20
Abstract: A method of manufacturing a semiconductor device includes dividing a number of dies along an x axis in a die matrix in each exposure field in an exposure field matrix delineated on the semiconductor substrate, wherein the x axis is parallel to one edge of a smallest rectangle enclosing the exposure field matrix. A number of dies is divided along a y axis in the die matrix, wherein the y axis is perpendicular to the x axis. Sequences SNx0, SNx1, SNx, SNxr, SNy0, SNy1, SNy, and SNyr are formed. p*(Nbx+1)−2 stepping operations are performed in a third direction and first sequence exposure/stepping/exposure operations and second sequence exposure/stepping/exposure operations are performed alternately between any two adjacent stepping operations as well as before a first stepping operation and after a last stepping operation. A distance of each stepping operation in order follows the sequence SNx.
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公开(公告)号:US20200006121A1
公开(公告)日:2020-01-02
申请号:US16374150
申请日:2019-04-03
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Ru-Gun LIU , Chin-Hsiang LIN , Chih-Ming LAI , Wei-Liang LIN , Yung-Sung YEN
IPC: H01L21/768 , H01L27/12
Abstract: In accordance with an aspect of the present disclosure, in a pattern forming method for a semiconductor device, a first opening is formed in an underlying layer disposed over a substrate. The first opening is expanded in a first axis by directional etching to form a first groove in the underlying layer. A resist pattern is formed over the underlying layer. The resist pattern includes a second opening only partially overlapping the first groove. The underlying layer is patterned by using the resist pattern as an etching mask to form a second groove.
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公开(公告)号:US20190384170A1
公开(公告)日:2019-12-19
申请号:US16163425
申请日:2018-10-17
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: An-Ren ZI , Chin-Hsiang LIN , Ching-Yu CHANG
IPC: G03F7/004 , G03F7/20 , G03F7/16 , G03F7/38 , G03F7/11 , G03F7/30 , G03F7/42 , G03F7/039 , G03F7/038 , H01L21/027
Abstract: A method of forming a photoresist pattern includes forming a protective layer over a photoresist layer formed on a substrate, and selectively exposing the protective layer and the photoresist layer to actinic radiation. The protective layer and the photoresist layer are developed to form a pattern in the photoresist layer, and the protective layer is removed. The protective layer includes a polymer having pendant fluorocarbon groups and pendant acid leaving groups.
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公开(公告)号:US20190164746A1
公开(公告)日:2019-05-30
申请号:US15905501
申请日:2018-02-26
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yu-Ling Chang CHIEN , Chien-Chih CHEN , Chin-Hsiang LIN , Ching-Yu CHANG , Joy CHENG
IPC: H01L21/02 , H01L21/027 , H01L21/311 , C09D133/12 , C09D125/06 , C09D125/16
Abstract: In a method of manufacturing a semiconductor device, an underlying structure is formed. A surface grafting layer is formed on the underlying structure. A photo resist layer is formed on the surface grafting layer. The surface grafting layer includes a coating material including a backbone polymer, a surface grafting unit coupled to the backbone polymer and an adhesion unit coupled to the backbone polymer.
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