Liquid crystal display device and process of manufacture
    51.
    发明授权
    Liquid crystal display device and process of manufacture 有权
    液晶显示装置及制造工艺

    公开(公告)号:US08599352B2

    公开(公告)日:2013-12-03

    申请号:US13596205

    申请日:2012-08-28

    IPC分类号: G02F1/1343

    摘要: A liquid crystal display device and method includes a pair of substrates with liquid crystal sandwiched therebetween, a plurality of intersecting scanning signal lines and image signal lines, a thin film transistor formed corresponding to each intersection, a pixel electrode which is formed in a pixel region and connected to the thin film transistor, a gate insulating film, and a protective insulating film. At least one of the scanning signal lines and the image signal lines are each formed of a laminated film including a first layer and a second layer, wherein the first layer is formed of a copper film having a purity of at least 99.5%, and the second layer is formed of an alloy film containing copper as a main component. The first layer and the second layer are collectively subjected to wet etching with an etchant having a predetermined pH.

    摘要翻译: 一种液晶显示装置和方法,包括一对夹在其间的液晶的基板,多个相交的扫描信号线和图像信号线,对应于每个交点形成的薄膜晶体管,形成在像素区域中的像素电极 并连接到薄膜晶体管,栅极绝缘膜和保护绝缘膜。 扫描信号线和图像信号线中的至少一个各自由包括第一层和第二层的层叠膜形成,其中第一层由纯度为至少99.5%的铜膜形成,并且 第二层由含有铜作为主要成分的合金膜形成。 第一层和第二层用具有预定pH的蚀刻剂共同进行湿蚀刻。

    SEMICONDUCTOR INTEGRATED CIRCUIT AND MULTI-ANGLE VIDEO SYSTEM
    52.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT AND MULTI-ANGLE VIDEO SYSTEM 有权
    半导体集成电路和多角度视频系统

    公开(公告)号:US20120105679A1

    公开(公告)日:2012-05-03

    申请号:US13274324

    申请日:2011-10-15

    IPC分类号: H04N5/217 H04N5/76

    摘要: The present invention is provided to lessen load on a bus in the case of storing image data captured by a plurality of cameras into a semiconductor memory. To a semiconductor integrated circuit, a plurality of cameras and a semiconductor memory can be coupled. The semiconductor integrated circuit includes a plurality of first interfaces, a second interface, a bus, and a plurality of image processing modules. The image processing modules include a process of performing distortion correction on image data in a pre-designated region, and writing the image data in the region subjected to the distortion correction into the semiconductor memory via the bus and the second interface. By excluding image data out of the pre-designated region from an object of distortion correction in the image processing modules, the amount of image data transferred to the semiconductor memory is reduced.

    摘要翻译: 提供本发明以在将由多个摄像机捕获的图像数据存储到半导体存储器的情况下减少总线上的负载。 对于半导体集成电路,可以耦合多个摄像机和半导体存储器。 半导体集成电路包括多个第一接口,第二接口,总线和多个图像处理模块。 图像处理模块包括对预先指定区域中的图像数据进行失真校正的处理,并且经过失真校正的区域中的图像数据经由总线和第二接口写入半导体存储器。 通过从图像处理模块中的失真校正对象中排除预先指定区域之外的图像数据,减少了传送到半导体存储器的图像数据量。

    IMAGE FORMING APPARATUS AND PRINTING METHOD
    53.
    发明申请
    IMAGE FORMING APPARATUS AND PRINTING METHOD 有权
    图像形成装置和打印方法

    公开(公告)号:US20110216375A1

    公开(公告)日:2011-09-08

    申请号:US13032718

    申请日:2011-02-23

    申请人: Takaaki Suzuki

    发明人: Takaaki Suzuki

    IPC分类号: H04N1/00

    CPC分类号: H04N1/00 Y02D10/1592

    摘要: Certain embodiments provide an image forming apparatus including: a memory; a read unit; a scanner processor configured to transfer image data at a first transfer speed; an image processing unit; a print unit; a printer processor to transfer print image data at a second transfer rate; a main processor to cause the printer processor to switch the second transfer speed to another, and cause the scanner processor to switch the first transfer speed to another; and a switching controller to control operation of the print unit in a plurality of operation modes corresponding to the plurality of print speeds, cause the main processor to switch the operation clock, cause the scanner processor and the printer processor respectively to switch each transfer speed to another.

    摘要翻译: 某些实施例提供一种图像形成装置,包括:存储器; 读单元; 扫描器处理器,被配置为以第一传送速度传送图像数据; 图像处理单元; 打印单元; 打印机处理器,以第二传送速率传送打印图像数据; 主处理器使打印机处理器将第二传送速度切换到另一传送速度,并使扫描仪处理器将第一传送速度切换到另一传送速度; 以及切换控制器,用于以与多个打印速度对应的多种操作模式来控制打印单元的操作,使得主处理器切换操作时钟,分别使扫描仪处理器和打印机处理器将每个传送速度切换到 另一个。

    FLUID AGITATION METHOD, FLUID AGITATION SYSTEM, AND CARTRIDGE
    54.
    发明申请
    FLUID AGITATION METHOD, FLUID AGITATION SYSTEM, AND CARTRIDGE 有权
    流体动力学方法,流体动力学系统,和方法

    公开(公告)号:US20110019497A1

    公开(公告)日:2011-01-27

    申请号:US12934030

    申请日:2009-03-27

    IPC分类号: B01F11/00 B65D25/00

    CPC分类号: B01F11/0266 G01N33/49

    摘要: A fluid agitation method is provided, whereby a swirling flow is generated in a trace amount of fluid, thereby agitating the fluid. The fluid agitation method includes introducing the fluid into an agitation chamber (3) including a wall having an uneven mass distribution, and applying oscillation (F) to the wall with frequencies varying in a predetermined frequency range. The uneven mass distribution of the wall is attained, for example, by arranging a plurality of thickened portions (11 to 18) of different thicknesses in a ring.

    摘要翻译: 提供流体搅拌方法,由此在微量流体中产生旋流,从而搅动流体。 流体搅拌方法包括将流体引入包括具有不均匀质量分布的壁的搅拌室(3)中,并且在预定频率范围内变化的频率向壁施加振荡(F)。 壁的质量分布不均匀,例如通过在环中布置不同厚度的多个增厚部(11〜18)来实现。

    Broadcast Reception Device
    56.
    发明申请
    Broadcast Reception Device 审中-公开
    广播接收设备

    公开(公告)号:US20080231750A1

    公开(公告)日:2008-09-25

    申请号:US10598818

    申请日:2006-01-18

    申请人: Takaaki Suzuki

    发明人: Takaaki Suzuki

    IPC分类号: H04N5/445

    摘要: A broadcast reception device that provides correct information to a user using SI even when plural types of SI are distributed.The broadcast reception device includes: a primary storage unit (1808) and a secondary storage unit (1807) which store a main service-list; and a CPU (1806) which acquires, from a broadcast signal, SI constructed using NIT, NTT, and SVCT, and SI constructed using LVCT, updates the main service-list based on service data included in the NIT, NTT, and SVCT SI when that SI has been acquired, and updates the main service-list based on service data included in the LVCT SI when that SI has been acquired.

    摘要翻译: 即使在多种类型的SI被分发的情况下,也可以使用SI向用户提供正确信息的广播接收装置。 广播接收装置包括:存储主服务列表的主存储单元(1808)和辅助存储单元(1807); 以及从广播信号获取使用NIT,NTT和SVCT构造的SI以及使用LVCT构造的SI的CPU(1806),基于包括在NIT,NTT和SVCT SI中的服务数据来更新主服务列表 当已经获取了SI时,并且当获取了SI时,基于包括在LVCT SI中的服务数据来更新主服务列表。

    Image display
    57.
    发明申请
    Image display 审中-公开
    图像显示

    公开(公告)号:US20070216279A1

    公开(公告)日:2007-09-20

    申请号:US11657694

    申请日:2007-01-25

    IPC分类号: H01J19/06 H01J1/62

    CPC分类号: H01J31/127 H01J29/04

    摘要: It is an object of the present invention to provide an image display using a thin film electronic source having a structure for separating picture elements in a self-alignment manner. The structure of bus wiring (scanning line) for powering the electronic source is formed by a stacked structure including a lower layer 17 made of an alloy of CrMo, an intermediate layer 18 made of Al or an alloy of Al, and an upper layer 19 made of Cr, from a cathode substrate 10. The CrMo alloy in the lower layer 17 includes 30 wt % or more of Mo. Such a stacked structure can be used to process one side of the lower layer 17 to form an undercut relative to the intermediate layer 18. The undercut serves as a picture element separating structure in sputtering of an upper electrode 13 of the electronic source and achieves picture element separation in a self-alignment manner.

    摘要翻译: 本发明的目的是提供一种使用具有以自对准方式分离图像元素的结构的薄膜电子源的图像显示。 用于为电子源供电的总线布线(扫描线)的结构通过堆叠结构形成,该堆叠结构包括由AlM或Al合金制成的中间层18和CrMo的合金制成的下层17和上层19 由阴极基板10制成。 下层17中的CrMo合金包括30重量%以上的Mo。这种堆叠结构可用于处理下层17的一侧以相对于中间层18形成底切。 底切用作电子源的上电极13的溅射中的像素分离结构,以自对准的方式实现像素分离。

    Semiconductor integrated circuit achieving reliable data latching
    60.
    发明授权
    Semiconductor integrated circuit achieving reliable data latching 失效
    半导体集成电路实现可靠的数据锁存

    公开(公告)号:US5952857A

    公开(公告)日:1999-09-14

    申请号:US63439

    申请日:1998-04-21

    申请人: Takaaki Suzuki

    发明人: Takaaki Suzuki

    摘要: A semiconductor integrated circuit receiving a plurality of input signals each exhibiting a signal-level change during a predetermined time span includes a timing-detection circuit which detects timing of said signal-level change of said input signals, and detects which input signal is furthest behind in terms of a signal-level-change timing among said plurality of input signals within said predetermined time span. The semiconductor integrated circuit further includes first delay-adjustment circuits which delay said plurality of input signals, respectively, in response to an output signal from the timing-detection circuit to generate delayed input signals such that signal-level-change timings of said delayed input signals are aligned to said signal-level-change timing of said furthest behind input signal, and latch circuits each latching a respective one of said delayed input signals at the same timing.

    摘要翻译: 接收在预定时间范围内呈现信号电平变化的多个输入信号的半导体集成电路包括检测所述输入信号的所述信号电平变化的定时的定时检测电路,并且检测哪个输入信号是最远的 在所述预定时间范围内的所述多个输入信号中的信号电平改变定时。 半导体集成电路还包括响应于来自定时检测电路的输出信号分别延迟所述多个输入信号的第一延迟调整电路,以产生延迟的输入信号,使得所述延迟输入的信号电平改变定时 信号与所述最远离输入信号的所述信号电平改变定时对准,并且每个锁存电路在相同的定时锁存相应的所述延迟的输入信号。