Apparatus and method for aligning parts
    51.
    发明授权
    Apparatus and method for aligning parts 失效
    对准零件的装置和方法

    公开(公告)号:US06691855B1

    公开(公告)日:2004-02-17

    申请号:US09097013

    申请日:1998-06-15

    IPC分类号: B65G4714

    CPC分类号: H05K13/028 B65G47/1407

    摘要: There is disclosed a part-aligning apparatus that is simple in structure, less damages chip parts, and operates well even if its chip discharge passage is clogged or overflows. The apparatus has a part-holding chamber for accommodating a number of chip parts. An arc-shaped chute groove is formed in the inner surface of the bottom of the part-holding chamber to orient the chip parts in a given direction and to guide the sliding chips. A gate port is formed at the lower end of the chute groove to pass the sliding chip parts one by one. The discharge passage is formed tangent to the chute groove to align the passed chip parts in a row and to deliver them. Claw portions for removing clogging are formed on the inner surface of a rotary drum that forms the part-holding chamber. The claw portions urge any chip part halted in the gate port in an abnormal posture toward an opposite direction different from the direction in which the chips are delivered.

    摘要翻译: 公开了一种结构简单,损坏芯片部件的部件对齐装置,即使其芯片排出通道堵塞或溢出也能够良好地运行。 该装置具有容纳多个芯片部件的部分保持室。 在所述部件保持室的底部的内表面上形成有弧形的斜槽,以使所述芯片部件沿给定方向定向并引导所述滑动芯片。 在滑槽的下端形成有一个门口,一个接一个地通过滑动片。 排出通道形成为与滑槽相切,以使经过的芯片部分成一排排列并将其输送。 在形成部分保持室的旋转鼓的内表面上形成用于除去堵塞的爪部。 爪部将异常姿势的任何芯片部分阻止在门口中的任何芯片部分朝向与输送芯片的方向不同的相反方向。

    Apparatus for transporting parts
    52.
    发明授权
    Apparatus for transporting parts 有权
    运输零件的装置

    公开(公告)号:US06338608B1

    公开(公告)日:2002-01-15

    申请号:US09307772

    申请日:1999-05-10

    IPC分类号: B65G5912

    CPC分类号: H05K13/0434

    摘要: A part transporting apparatus comprises a guiding groove for lining up parts in one row and guiding the parts; a transporting member which is provided at the base of the guiding groove and transports the parts in a forward direction by itself moving forwards and backwards along the groove; and a driving means for reciprocally driving the transporting member in the forward and backward directions; wherein the transporting member is advanced slowly and retracted rapidly, so as to transport the parts forwards. Provided to this arrangement are: a stopper which operates so as to open and close in the width direction of the guiding groove, and hold the second part from the front of the row of parts being transported on the upper plane of the transporting member; and a shutter for opening and closing at the tip of the guiding groove, so as to cover the space above the first part in the row so as to prevent the part from flying out. The shutter is opened synchronously with the transporting member immediately before forward movement of the transporting member is completed, thereby extracting the first part separated from the second part. Such an arrangement provides for an apparatus for transporting parts, wherein the first part and second part can be separated in a sure manner even in the event that the parts are non-magnetic material, and wherein ease and stability of extracting of the first part is facilitated.

    摘要翻译: 一部分输送装置包括用于排列一排中的部分并引导部分的引导槽; 传送构件,其设置在引导槽的基部并通过其沿着槽向前和向后沿向前方向传送部件; 以及用于沿前后方向往复驱动传送部件的驱动装置; 其中传送构件缓慢前进并且迅速地缩回,以便将部件向前运送。 提供这样一种装置:一个在引导槽的宽度方向上打开和关闭的止动器,并且从传送部件的上平面上被传送的部分行的前部保持第二部分; 以及用于在引导槽的顶端打开和关闭的挡板,以便覆盖行中的第一部分上方的空间,以防止该部件飞出。 在完成传送部件的向前移动之前,快门与传送部件同步地打开,从而提取与第二部分分离的第一部分。 这种布置提供了用于运输部件的装置,其中即使在部件是非磁性材料的情况下,第一部分和第二部分可以以可靠的方式分离,并且其中第一部分的提取的容易性和稳定性是 方便了

    Production method of a vertical type MOSFET
    53.
    发明授权
    Production method of a vertical type MOSFET 失效
    垂直型MOSFET的制造方法

    公开(公告)号:US6015737A

    公开(公告)日:2000-01-18

    申请号:US515176

    申请日:1995-08-15

    摘要: A vertical type power MOSFET remarkably reduces its ON-resistance per area. A substantial groove formation in which a gate structure is constituted is performed beforehand utilizing the LOCOS method before the formation of a p-type base layer and an n.sup.+ -type source layer. The p-type base layer and the n.sup.+ -type source layer are then formed by double diffusion in a manner of self-alignment with respect to a LOCOS oxide film, simultaneously with which channels are set at sidewall portions of the LOCOS oxide film. Thereafter the LOCOS oxide film is removed to provide a U-groove so as to constitute the gate structure. Namely, the channels are set by the double diffusion of the manner of self-alignment with respect to the LOCOS oxide film, so that the channels, which are set at the sidewall portions at both sides of the groove, provide a structure of exact bilateral symmetry, there is no positional deviation of the U-groove with respect to the base layer end, and the length of the bottom face of the U-groove can be made minimally short. Therefore, the unit cell size is greatly reduced, and the ON-resistance per area is greatly decreased.

    摘要翻译: 垂直型功率MOSFET可显着降低每个区域的导通电阻。 在形成p型基极层和n +型源极层之前,利用LOCOS方法预先利用构成栅极结构的实质的槽形成。 然后通过相对于LOCOS氧化物膜的自对准的双扩散形成p型基极层和n +型源极层,同时将通道设置在LOCOS氧化物膜的侧壁部分。 此后,去除LOCOS氧化物膜以提供U形槽以构成栅极结构。 即,通过相对于LOCOS氧化膜的自对准方式的双扩散来设定通道,使得设置在凹槽两侧的侧壁部分处的通道提供精确双边的结构 U形槽相对于基底层端部没有位置偏离,U槽的底面的长度最短。 因此,单元电池尺寸大大降低,并且每个面积的导通电阻大大降低。

    Manufacturing method of semiconductor device
    54.
    发明授权
    Manufacturing method of semiconductor device 失效
    半导体器件的制造方法

    公开(公告)号:US5776812A

    公开(公告)日:1998-07-07

    申请号:US413410

    申请日:1995-03-30

    摘要: A manufacturing method of a MOSFET having a channel part on the side surface of a groove, which does not permit the introduction of defects or contaminant into the channel part and which can make the shape of the groove uniform. An n.sup.- -type epitaxial layer having a low impurity concentration is formed on a main surface of an n.sup.+ -type semiconductor substrate. This surface is specified as a main surface, and chemical dry etching is applied to a specified region of this main surface. A region including a surface generated by the chemical dry etching is selectively oxidized to form a selective oxide film to a specified thickness. Following this process, p-type and n-type impurities are doubly diffused from the main surface to define the length of the channel and form a base layer and a source layer. Furthermore, the n.sup.+ -type semiconductor substrate is specified as a drain layer. After the double diffusion, a gate electrode is formed through a gate oxide film and a source electrode and a drain electrode are formed.

    摘要翻译: 一种MOSFET的制造方法,其具有在槽的侧面上的通道部分,其不允许将缺陷或污染物引入通道部分中并且可以使槽的形状均匀。 在n +型半导体衬底的主表面上形成具有低杂质浓度的n型外延层。 该表面被指定为主表面,并且化学干蚀刻被施加到该主表面的指定区域。 包括通过化学干蚀刻生成的表面的区域被选择性地氧化以形成具有特定厚度的选择性氧化膜。 在该过程之后,p型和n型杂质从主表面双重扩散以限定通道的长度并形成基层和源层。 此外,n +型半导体衬底被指定为漏极层。 在双扩散之后,通过栅极氧化膜形成栅电极,形成源电极和漏电极。

    Coaxial microstripline transducer
    56.
    发明授权
    Coaxial microstripline transducer 失效
    同轴微带换能器

    公开(公告)号:US5525075A

    公开(公告)日:1996-06-11

    申请号:US259675

    申请日:1994-06-13

    摘要: A coaxial microstripline transducer, having an inner conductor with a center conductor portion arranged in a recess portion of a resin case and a terminal portion which is integral with the center conductor portion and formed so as to lead to a lower surface of the resin case. An outer conductor has a first conductor portion arranged along at least a part of an inner peripheral surface of the recess portion and a second conductor portion which is integral with the first conductor portion and extended to the lower surface across an upper surface and across a pair of side surfaces opposed to each other of the resin case. The inner and outer conductors are fixed to the resin case. The outer conductor is preferably made of sheet metal material so as to enjoy low high-frequency losses. The first conductor portion advantageously is resilient and projects into the recess portion of the resin case to grip and engage a plug inserted into the transducer.

    摘要翻译: 一种同轴微带线换能器,其具有布置在树脂壳体的凹部中的中心导体部分的内部导体和与中心导体部分成一体并形成为引导到树脂壳体的下表面的端子部分。 外导体具有沿着凹部的内周面的至少一部分配置的第一导体部和与第一导体部成一体并且跨越上表面延伸到下表面的第二导体部 的与树脂壳体相对的侧面。 内导体和外导体固定在树脂外壳上。 外部导体优选由金属板材制成,以便享受低的高频损失。 第一导体部分有利地是弹性的并且突出到树脂壳体的凹部中以夹持并接合插入到换能器中的插头。

    Coupling device for electric devices
    57.
    发明授权
    Coupling device for electric devices 失效
    电气设备用耦合装置

    公开(公告)号:US4659159A

    公开(公告)日:1987-04-21

    申请号:US706270

    申请日:1985-02-27

    申请人: Shigeki Takahashi

    发明人: Shigeki Takahashi

    CPC分类号: H05K5/0204 H01R13/629

    摘要: Disclosed is a coupling device for a connectable electric unit such as, for example, a portable video recorder and a main electric unit having a mounting surface on which the connectable electric unit is to be set and incorporating therein, for example, a television tuner. The coupling device includes an extendable and retractable stopper which is provided to either the main or connectable electric unit in the position in which the connectable unit is mounted on the main unit so that the stopper prevents the coupling between the connectors of both units whenever the connectable unit is set in a posture other than its predetermined posture. The coupling device also includes an unlocking button for retracting the stopper only when the connectable unit is mounted on the mounting surface of the main electric unit in its predetermined or specified direction. With this arrangement, the connectors are surely connected together and therefore, can be prevented from being broken or damaged.

    摘要翻译: 公开了一种用于可连接电气单元的耦合装置,例如便携式录像机和具有安装表面的主电单元,可安装电气单元将在其上设置并结合在其中,例如电视调谐器。 联接装置包括可延伸和可缩回的止动件,该止动件设置在可连接单元安装在主单元上的位置上的主要或可连接的电气单元上,使得止动件防止两个单元的连接器之间的联接, 单元被设置为除了其预定姿势之外的姿势。 联接装置还包括用于仅当可连接单元沿其预定或指定方向安装在主电单元的安装表面上时才能使止动器缩回的解锁按钮。 通过这种布置,连接器可靠地连接在一起,因此可以防止连接器断裂或损坏。

    Lateral semiconductor device
    58.
    发明授权
    Lateral semiconductor device 有权
    侧面半导体器件

    公开(公告)号:US09240445B2

    公开(公告)日:2016-01-19

    申请号:US14113419

    申请日:2012-05-10

    摘要: A lateral semiconductor device includes a semiconductor layer, an insulating layer, and a resistive field plate. The semiconductor layer includes a first semiconductor region and a second semiconductor region at a surface portion, and the second semiconductor region makes a circuit around the first semiconductor region. The insulating layer is formed on a surface of the semiconductor layer and is disposed between the first and second semiconductor regions. The resistive field plate is formed on a surface of the insulating layer. Between the first and second semiconductor regions, a first section and a second section are adjacent to each other along a circumferential direction around the first semiconductor region. The resistive field plate includes first and second resistive field plate sections respectively formed in the first and second sections, and the first and second resistive field plate sections are separated from each other.

    摘要翻译: 横向半导体器件包括半导体层,绝缘层和电阻场板。 半导体层包括在表面部分处的第一半导体区域和第二半导体区域,并且第二半导体区域在第一半导体区域周围形成电路。 绝缘层形成在半导体层的表面上并且设置在第一和第二半导体区之间。 电阻场板形成在绝缘层的表面上。 在第一和第二半导体区域之间,第一部分和第二部分沿着围绕第一半导体区域的圆周方向彼此相邻。 电阻场板包括分别形成在第一和第二部分中的第一和第二电阻场板部分,并且第一和第二电阻场板部分彼此分离。

    Method for manufacturing nonvolatile memory device
    59.
    发明授权
    Method for manufacturing nonvolatile memory device 有权
    非易失性存储器件的制造方法

    公开(公告)号:US08981507B2

    公开(公告)日:2015-03-17

    申请号:US13534673

    申请日:2012-06-27

    IPC分类号: H01L43/12

    CPC分类号: H01L43/12

    摘要: According to one embodiment, a method for manufacturing a nonvolatile memory device including a plurality of memory cells is disclosed. Each of the plurality of memory cells includes a base layer including a first electrode, a magnetic tunnel junction device provided on the base layer, and a second electrode provided on the magnetic tunnel junction device. The magnetic tunnel junction device includes a first magnetic layer, a tunneling barrier layer provided on the first magnetic layer, and a second magnetic layer provided on the tunneling barrier layer. The method can include etching a portion of the second magnetic layer and a portion of the first magnetic layer by irradiating gas clusters onto a portion of a surface of the second magnetic layer or a portion of a surface of the first magnetic layer.

    摘要翻译: 根据一个实施例,公开了一种用于制造包括多个存储单元的非易失性存储器件的方法。 多个存储单元中的每一个包括基底层,其包括第一电极,设置在基底层上的磁性隧道结器件和设置在磁性隧道结装置上的第二电极。 磁隧道结装置包括第一磁性层,设置在第一磁性层上的隧道势垒层,以及设置在隧道势垒层上的第二磁性层。 该方法可以包括通过将气体簇照射到第二磁性层的表面的一部分或第一磁性层的表面的一部分上来蚀刻第二磁性层的一部分和第一磁性层的一部分。

    Method of manufacturing magnetic memory
    60.
    发明授权
    Method of manufacturing magnetic memory 失效
    制造磁记忆体的方法

    公开(公告)号:US08716034B2

    公开(公告)日:2014-05-06

    申请号:US13226868

    申请日:2011-09-07

    IPC分类号: H01L21/00

    CPC分类号: H01L43/12 H01L29/82

    摘要: According to one embodiment, a method of manufacturing a magnetic memory, the method includes forming a first magnetic layer having a variable magnetization, forming a tunnel barrier layer on the first magnetic layer, forming a second magnetic layer on the tunnel barrier layer, the second magnetic layer having an invariable magnetization, forming a hard mask layer as a mask on the second magnetic layer, patterning the second magnetic layer by using the mask of the hard mask layer, and executing a GCIB-irradiation by using the mask of the hard mask layer, after the patterning.

    摘要翻译: 根据一个实施例,一种制造磁存储器的方法,该方法包括形成具有可变磁化强度的第一磁性层,在第一磁性层上形成隧道势垒层,在隧道势垒层上形成第二磁性层, 具有不变磁化的磁性层,在第二磁性层上形成硬掩模层作为掩模,通过使用硬掩模层的掩模对第二磁性层进行构图,并使用硬掩模的掩模执行GCIB照射 层,图案后。