公开(公告)号：US5152168A

公开(公告)日：1992-10-06

申请号：US631018

申请日：1990-12-21

申请人： Gabriele Barlocchi ,  Fabrizio Ghironi

发明人： Gabriele Barlocchi ,  Fabrizio Ghironi

IPC分类号： G01B7/28 ,  H01L21/66 ,  H01L21/68

CPC分类号： H01L21/681 ,  G01B7/28 ,  H01L22/12

摘要： A method for the quantitative assessment of the degree of geometrical deformation undergone by a surface profile of a wafer following the formation of a conformal surface layer employs a simple mechanical profilometer, whose stylus is run over a target morphological detail comprising at least two mutually parallel ridges or reliefs which rise above the plane of the surface of the wafer for a height of between 0.1 and 0.5 .mu.m, and which enclose between them a depression of a width of between 2 and 4 .mu.m, in order to determine the elevation of the bottom of the valley between the two ridges relative to the plane of the surface of the wafer from which the ridges rise following the formation of one or more similar surface layers. The vertical measurement of the elevation undergone by the bottom of the valley in itself represents a quantitative index of the vertical and horizontal geometrical deformation undergone by the details of the surface profile of the wafer. In order to determine characteristics of automatic alignability by a particular apparatus employing said target details for automatic alignment, it is possible to establish a maximum value for said distortion index, determined as above, above which the automatic alignment capability is lost.

公开(公告)号：US07705416B2

公开(公告)日：2010-04-27

申请号：US10667113

申请日：2003-09-18

申请人： Gabriele Barlocchi ,  Flavio Villa

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： H01L29/00

CPC分类号： H01L21/2007 ,  H01L21/30608 ,  H01L21/3086 ,  H01L21/76251 ,  H01L21/76262 ,  H01L21/764

摘要： A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting epitaxial growth; and growing a monocrystalline epitaxial layer above the substrate and the cavities. Thereby, the cavity is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane. The original wafer must have a plurality of elongate cavities or channels, parallel and adjacent to one another. Trenches are then excavated in the epitaxial layer as far as the channels, and the dividers between the channels are removed by timed TMAH etching.

摘要翻译： 在单晶半导体材料的晶片中形成掩埋空穴的方法，其中至少一个腔通过定时的TMAH蚀刻硅在单晶半导体材料的衬底中形成; 用抑制外延生长的材料覆盖空腔; 以及在衬底和空腔上生长单晶外延层。 因此，腔体被单晶材料完全包围。 从该晶片开始，可以形成薄膜。 原始晶片必须具有彼此平行并相邻的多个细长空腔或通道。 然后在外延层中挖沟直到沟道，并且通过定时TMAH蚀刻去除沟道之间的分隔线。

公开(公告)号：US07071073B2

公开(公告)日：2006-07-04

申请号：US10331189

申请日：2002-12-26

申请人： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

发明人： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

IPC分类号： H01L21/76

CPC分类号： H01L21/76262 ,  H01L21/31662 ,  H01L21/76208

摘要： For manufacturing an SOI substrate, the following steps are carried out: providing a wafer of semiconductor material; forming, inside the wafer, a plurality of passages forming a labyrinthine cavity and laterally delimiting a plurality of pillars of semiconductor material; and oxidizing the pillars of semiconductor material to form a buried insulating layer. For forming the labyrinthine cavity, a trench is first formed in a substrate; an epitaxial layer is grown, which closes the trench at the top; the wafer is annealed so as to deform the pillars and cause them to assume a minimum-energy handlebar-like shape, and a peripheral portion of the wafer is removed to reach the labyrinthine cavity, and side inlet openings are formed in the labyrinthine cavity. Oxidation is performed by feeding an oxidizing fluid through the side inlet openings.

公开(公告)号：US06362070B1

公开(公告)日：2002-03-26

申请号：US09558934

申请日：2000-04-26

申请人： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

发明人： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

IPC分类号： H01L2176

CPC分类号： H01L21/02238 ,  H01L21/02299 ,  H01L21/31662 ,  H01L21/32 ,  H01L21/76208 ,  H01L21/76248

摘要： A process for manufacturing a SOI wafer with buried oxide regions without cusps that includes forming, in a wafer of monocrystalline semiconductor material, trenches extending between, and delimiting laterally, protruding regions; forming masking regions, implanted with nitrogen ions, the masking regions surrounding completely the tips of the protruding regions; and forming retarding regions on the bottom of the trenches, wherein nitrogen is implanted at a lower dose than the masking regions. A thermal oxidation is then carried out and starts at the bottom portion of the protruding regions and then proceeds downwards; thereby, a continuous region of buried oxide is formed and is overlaid by non-oxidized regions corresponding to the tips of the protruding regions and forming nucleus regions for a subsequent epitaxial growth. The masking regions and the retarding regions are formed through two successive implants, including an angle implant, wherein the protruding regions shield the bottom portions of the adjacent protruding regions, as well as the bottom of the trenches, and a vertical implant is made perpendicularly to the wafer.

摘要翻译： 一种用于制造具有埋藏氧化物区域而没有尖端的SOI晶片的方法，包括在单晶半导体材料的晶片中形成在横向延伸并限定突出区域的沟槽; 形成掩蔽区域，注入氮离子，掩蔽区域完全围绕突出区域的尖端; 以及在沟槽的底部形成延迟区域，其中以比掩蔽区域低的剂量注入氮。 然后进行热氧化，并从突出区域的底部开始，然后向下移动; 由此，形成了埋入氧化物的连续区域，并且由对应于突出区域的尖端的非氧化区域覆盖并形成用于随后的外延生长的核区域。 掩模区域和延迟区域通过两个连续的植入物形成，包括角度注入，其中突出区域屏蔽相邻突出区域的底部以及沟槽的底部，垂直植入物垂直于 晶圆。

公开(公告)号：US07294536B2

公开(公告)日：2007-11-13

申请号：US10327702

申请日：2002-12-20

申请人： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

发明人： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

IPC分类号： H01L21/00

CPC分类号： H01L21/76283 ,  H01L21/3003 ,  H01L21/3247 ,  H01L21/76289 ,  H01L21/764 ,  H01L29/0649 ,  Y10S438/967

摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.

摘要翻译： 一种制造SOI晶片的方法，包括以下步骤：在半导体材料的晶片中形成限定半导体材料结构的空腔; 通过热过程稀释结构; 并完全氧化结构。

公开(公告)号：US20060063352A1

公开(公告)日：2006-03-23

申请号：US11225883

申请日：2005-09-13

申请人： Gabriele Barlocchi ,  Flavio Villa

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： H01L21/30 ,  H01L21/20

CPC分类号： H01L21/3247 ,  H01L21/3043 ,  H01L21/76251 ,  H01L21/76259

摘要： A process manufactures a wafer using semiconductor processing techniques. A bonding layer is formed on a top surface of a first wafer; a deep trench is dug in a substrate of semiconductor material belonging to a second wafer. A top layer of semiconductor material is formed on top of the substrate so as to close the deep trench at the top and form at least one buried cavity. The top layer of the second wafer is bonded to the first wafer through the bonding layer. The two wafers are subjected to a thermal treatment that causes bonding of at least one portion of the top layer to the first wafer and widening of the buried cavity. In this way, the portion of the top layer bonded to the first wafer is separated from the rest of the second wafer, to form a composite wafer.

摘要翻译： 一种工艺使用半导体处理技术制造晶片。 在第一晶片的顶表面上形成接合层; 在属于第二晶片的半导体材料的衬底中挖出深沟槽。 半导体材料的顶层形成在衬底的顶部上，以封闭顶部的深沟槽并形成至少一个埋入空腔。 第二晶片的顶层通过结合层结合到第一晶片。 对这两个晶片进行热处理，其导致顶层的至少一部分与第一晶片的接合和掩埋腔的加宽。 以这种方式，将结合到第一晶片的顶层的部分与第二晶片的其余部分分离，以形成复合晶片。

公开(公告)号：US20060017131A9

公开(公告)日：2006-01-26

申请号：US10327702

申请日：2002-12-20

申请人： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

发明人： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

IPC分类号： H01L29/00

CPC分类号： H01L21/76283 ,  H01L21/3003 ,  H01L21/3247 ,  H01L21/76289 ,  H01L21/764 ,  H01L29/0649 ,  Y10S438/967

摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.

公开(公告)号：US06974693B2

公开(公告)日：2005-12-13

申请号：US10874902

申请日：2004-06-23

申请人： Gabriele Barlocchi ,  Flavio Villa

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： B01L3/00 ,  B01L7/00 ,  C12M1/34

CPC分类号： B01L7/52 ,  B01L3/502707 ,  B01L2200/12 ,  B01L2300/0645 ,  B01L2300/0825 ,  B01L2300/1827 ,  B01L2300/1883

摘要： Integrated microreactor, formed in a monolithic body and including a semiconductor material region and an insulating layer; a buried channel extending in the semiconductor material region; a first and a second access trench extending in the semiconductor material region and in the insulating layer, and in communication with the buried channel; a first and a second reservoir formed on top of the insulating layer and in communication with the first and the second access trench; a suspended diaphragm formed by the insulating layer, laterally to the buried channel; and a detection electrode, supported by the suspended diaphragm, above the insulating layer, and inside the second reservoir.

公开(公告)号：US06929968B2

公开(公告)日：2005-08-16

申请号：US10874905

申请日：2004-06-23

申请人： Gabriele Barlocchi ,  Flavio Villa

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： B01L3/00 ,  B01L7/00 ,  H01L21/00

CPC分类号： B01L7/52 ,  B01L3/502707 ,  B01L2200/12 ,  B01L2300/0645 ,  B01L2300/0825 ,  B01L2300/1827 ,  B01L2300/1883

摘要： Integrated microreactor, formed in a monolithic body and including a semiconductor material region and an insulating layer; a buried channel extending in the semiconductor material region; a first and a second access trench extending in the semiconductor material region and in the insulating layer, and in communication with the buried channel; a first and a second reservoir formed on top of the insulating layer and in communication with the first and the second access trench; a suspended diaphragm formed by the insulating layer, laterally to the buried channel; and a detection electrode, supported by the suspended diaphragm, above the insulating layer, and inside the second reservoir.

摘要翻译： 集成的微反应器，形成在一体的整体中并且包括半导体材料区域和绝缘层; 在半导体材料区域中延伸的掩埋沟道; 在所述半导体材料区域和所述绝缘层中延伸并与所述掩埋沟道连通的第一和第二访问沟槽; 第一和第二储存器，其形成在所述绝缘层的顶部上并且与所述第一和第二接入沟槽连通; 由绝缘层形成的悬浮膜，横向于埋设通道; 以及由悬挂隔膜支撑的检测电极，在绝缘层上方和第二储存器内部。

公开(公告)号：US06670257B1

公开(公告)日：2003-12-30

申请号：US09545260

申请日：2000-04-07

申请人： Gabriele Barlocchi ,  Flavio Villa

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： H01L2176

CPC分类号： H01L21/2007 ,  H01L21/30608 ,  H01L21/3086 ,  H01L21/76251 ,  H01L21/76262 ,  H01L21/764

摘要： A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting epitaxial growth; and growing a monocrystalline epitaxial layer above the substrate and the cavities. Thereby, the cavity is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane. The original wafer must have a plurality of elongate cavities or channels, parallel and adjacent to one another. Trenches are then excavated in the epitaxial layer as far as the channels, and the dividers between the channels are removed by timed TMAH etching.

摘要翻译： 在单晶半导体材料的晶片中形成掩埋空穴的方法，其中至少一个腔通过定时的TMAH蚀刻硅在单晶半导体材料的衬底中形成; 用抑制外延生长的材料覆盖空腔; 以及在衬底和空腔上生长单晶外延层。 因此，腔体被单晶材料完全包围。 从该晶片开始，可以形成薄膜。 原始晶片必须具有彼此平行并相邻的多个细长空腔或通道。 然后在外延层中挖沟直到沟道，并且通过定时TMAH蚀刻去除沟道之间的分隔线。