Air bridge process for forming air gaps
    53.
    发明授权
    Air bridge process for forming air gaps 有权
    用于形成气隙的气桥过程

    公开(公告)号:US06265321B1

    公开(公告)日:2001-07-24

    申请号:US09550264

    申请日:2000-04-17

    IPC分类号: H01L2100

    CPC分类号: H01L21/7682 H01L21/76807

    摘要: A method for reducing RC delay in integrated circuits by lowering the dielectric constant of the intermetal dielectric material between metal interconnects or metal damascene interconnects is described. The dielectric constant of the intermetal dielectric is lowered by introducing air into the intermetal dielectric between metal interconnections. An air bridge comprising a porous material, preferably amorphous silicon, porous silicon oxide, or porous silsesquioxane, is deposited over a layer containing a reactive organic material. An oxygen plasma treatment or an anisotropic etching through the pores in the air bridge layer removes at least a portion of the reactive material, leaving air plugs within the intermetal dielectric.

    摘要翻译: 描述了通过降低金属互连或金属镶嵌互连之间的金属间电介质材料的介电常数来减小集成电路中的RC延迟的方法。 通过在金属互连之间的金属间电介质中引入空气来降低金属间电介质的介电常数。 包括多孔材料,优选非晶硅,多孔氧化硅或多孔倍半硅氧烷的空气桥被沉积在含有反应性有机材料的层上。 通过空气桥接层中的孔的氧等离子体处理或各向异性蚀刻去除至少一部分反应性材料,从而将空气塞留在金属间电介质内。

    Method of fabrication of anti-fuse integrated with dual damascene process
    55.
    发明授权
    Method of fabrication of anti-fuse integrated with dual damascene process 有权
    与双镶嵌工艺集成的抗熔丝的制造方法

    公开(公告)号:US6124194A

    公开(公告)日:2000-09-26

    申请号:US439365

    申请日:1999-11-15

    摘要: A method of fabricating an anti-fuse module and dual damascene interconnect structure comprises the following steps. A semiconductor structure having at least two exposed metal lines covered by a first dielectric layer is provided. A first metal line is within an anti-fuse area and a second metal line is within an interconnect area. A first metal via is formed within the first dielectric layer within the anti-fuse area with the first metal via contacting the first metal line. A SiN layer is deposited over the first dielectric layer and the first metal via. The SiN layer is patterned to form at least two openings. A first opening exposes the first metal via, and a second opening exposes a portion of the first dielectric layer above the second metal line. A fusing element layer is deposited and patterned over the patterned SiN layered structure to form a fusing element over the first metal via. Simultaneously, an anti-fuse metal line is formed over the fusing element to form an anti-fuse module within the anti-fuse area, and a dual damascene interconnect is formed over, and contacting with, the second metal line and within the interconnect area.

    摘要翻译: 一种制造抗熔丝模块和双镶嵌互连结构的方法包括以下步骤。 提供具有被第一介电层覆盖的至少两个暴露的金属线的半导体结构。 第一金属线在反熔丝区内,第二金属线在互连区内。 第一金属通孔形成在反熔丝区域内的第一电介质层内,第一金属通孔接触第一金属线。 在第一介电层和第一金属通孔上沉积SiN层。 图案化SiN层以形成至少两个开口。 第一开口暴露第一金属通孔,第二开口暴露第二电介质层的第二金属线上方的一部分。 在图案化的SiN层状结构上沉积并图案化定影元件层,以在第一金属通孔之上形成定影元件。 同时,在熔断元件上方形成抗熔丝金属线,以在反熔丝区域内形成反熔丝模块,并且在第二金属线之间和互连区内形成双面镶嵌互连 。

    Projector
    57.
    发明授权

    公开(公告)号:US11194237B2

    公开(公告)日:2021-12-07

    申请号:US16198749

    申请日:2018-11-21

    申请人: Yi Xu

    发明人: Yi Xu

    摘要: The invention discloses a novel projector, comprising a sealed shell of electronic projector, an illumination system and a LED light source system, wherein the sealed shell is provided with an optical and internal circulation cooling assembly inside by area; the optical assembly comprises the projector working assembly. The invention is inside a sealed shell; the cold air far below normal temperature generated by semiconductor refrigeration piece takes away the heat on optical device, improving the heat dissipation efficiency. Simultaneously, because the cold air is inside a sealed shell, the optical device can be placed in a dust-free environment. The polarized light conversion prism converts the useless P light in conventional projector imagining into the useful S light, improving the light utilization, and increasing the brightness of projection at the same power. The LED light source is collimated by the collimating lens to meet PCS conversion requirement for polarized light converter.

    Word-line voltage regulating circuit and single power supply memory
    58.
    发明授权
    Word-line voltage regulating circuit and single power supply memory 有权
    字线调压电路和单电源存储器

    公开(公告)号:US08659971B2

    公开(公告)日:2014-02-25

    申请号:US13541600

    申请日:2012-07-03

    IPC分类号: G11C7/00

    CPC分类号: G11C16/12 G11C5/145 G11C8/08

    摘要: A word-line voltage regulating circuit and a single power supply memory are disclosed. The word-line voltage regulating circuit includes: a charge pump for raising an input voltage to a desired value and outputting the raised input voltage as an output voltage; a controller for inputting a refresh signal to the charge pump according to the output voltage of the charge pump; and a comparator for inputting a feedback signal to the charge pump according to a comparison result between the output voltage of the charge pump and a reference voltage. The charge pump works under control of the refresh signal when the memory is in an active mode, and works under control of the feedback signal when the memory is in a standby mode. The word-line voltage regulating circuit can effectively reduce the power consumption and can meet the requirement for proportional scale-down of integrated circuits.

    摘要翻译: 公开了一种字线电压调节电路和单电源存储器。 字线电压调节电路包括:用于将输入电压提高到期望值并输出升高的输入电压作为输出电压的电荷泵; 控制器,用于根据电荷泵的输出电压向电荷泵输入刷新信号; 以及比较器,用于根据电荷泵的输出电压和参考电压之间的比较结果将反馈信号输入到电荷泵。 当存储器处于活动模式时,电荷泵在刷新信号的控制下工作,并且当存储器处于待机模式时在反馈信号的控制下工作。 字线电压调节电路可以有效降低功耗,满足集成电路比例缩小的要求。